/external/clang/test/Parser/ |
H A D | MicrosoftExtensionsInlineAsm.c | 5 void __forceinline InterlockedBitTestAndSet (long *Base, long Bit) argument 8 mov eax, Bit
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/external/vixl/src/vixl/a64/ |
H A D | assembler-a64.h | 82 RegList Bit() const { function in class:vixl::CPURegister 460 : list_(reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit()), 601 return (type_ == other.type()) && ((other.Bit() & list_) != 0); 1383 // Bit test and set flags. 1386 // Bit clear (A & ~B). 1391 // Bit clear (A & ~B) and update status flags. 1720 // Bit revers [all...] |
H A D | instructions-a64.h | 173 int Bit(int pos) const { function in class:vixl::Instruction
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/external/llvm/lib/Fuzzer/ |
H A D | FuzzerMutate.cpp | 51 int Bit = Rand(8); local 52 char Mask = 1 << Bit; 54 if (X & (1 << Bit))
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/external/llvm/lib/TableGen/ |
H A D | TGLexer.h | 46 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List, enumerator in enum:llvm::tgtok::TokKind
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H A D | Record.cpp | 303 if (auto *Bit = dyn_cast<BitInit>(getBit(i))) 304 Result |= static_cast<int64_t>(Bit->getValue()) << i; 329 if (Init *Bit = getBit(e-i-1)) 330 Result += Bit->getAsString(); 365 Init *Bit = CachedInit->getBit(CurBit->getBitNum()); local 366 NewBits[i] = fixBitInit(RV, CurBit, Bit); 383 Init *Bit = CurBitVar->getBit(CurBit->getBitNum()); local 384 NewBits[i] = fixBitInit(RV, CurBit, Bit); 600 Init *OpInit::getBit(unsigned Bit) const { 603 return VarBitInit::get(const_cast<OpInit*>(this), Bit); [all...] |
H A D | TGParser.cpp | 119 unsigned Bit = BitList[i]; local 120 if (NewBits[Bit]) 121 return Error(Loc, "Cannot set bit #" + Twine(Bit) + " of value '" + 123 NewBits[Bit] = BInit->getBit(i); 669 case tgtok::Bit: Lex.Lex(); return BitRecTy::get(); 1296 Init *Bit = Vals[i]->convertInitializerTo(BitRecTy::get()); local 1297 if (!Bit) { 1302 NewBits.push_back(Bit);
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/external/llvm/lib/IR/ |
H A D | Function.cpp | 994 void Function::setValueSubclassDataBit(unsigned Bit, bool On) { argument 995 assert(Bit < 16 && "SubclassData contains only 16 bits"); 997 setValueSubclassData(getSubclassDataFromValue() | (1 << Bit)); 999 setValueSubclassData(getSubclassDataFromValue() & ~(1 << Bit));
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCCodeEmitter.cpp | 411 // Table 2-1 "16-Bit Addressing Forms with the ModR/M byte". We can only 1034 unsigned Bit = 0; local 1040 REX |= 1 << Bit; // set REX.B (Bit=0) and REX.X (Bit=1) 1041 Bit++; 1057 unsigned Bit = 0; local 1062 REX |= 1 << Bit; // REX.B (Bit=0) and REX.X (Bit [all...] |
/external/llvm/lib/Transforms/IPO/ |
H A D | LowerBitSets.cpp | 178 unsigned Bit = 0; local 180 if (BitAllocs[I] < BitAllocs[Bit]) 181 Bit = I; 183 AllocByteOffset = BitAllocs[Bit]; 187 BitAllocs[Bit] = ReqSize; 192 AllocMask = 1 << Bit; 428 for (auto Bit : BSI.Bits) 429 Bits |= uint64_t(1) << Bit; 515 Value *Bit = createBitSetTest(ThenB, BSI, BAI, BitOffset); local 523 P->addIncoming(Bit, Then [all...] |
/external/v8/src/arm64/ |
H A D | instructions-arm64.h | 107 int Bit(int pos) const { function in class:v8::internal::Instruction
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H A D | assembler-arm64-inl.h | 56 inline RegList CPURegister::Bit() const { function in class:v8::internal::CPURegister
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/external/llvm/include/llvm/Support/ |
H A D | CommandLine.h | 1445 template <class T> static unsigned Bit(const T &V) { function in class:llvm::cl::bits_storage 1465 *Location |= Bit(V); 1471 return (*Location & Bit(V)) != 0; 1481 template <class T> static unsigned Bit(const T &V) { 1489 template <class T> void addValue(const T &V) { Bits |= Bit(V); } 1493 template <class T> bool isSet(const T &V) { return (Bits & Bit(V)) != 0; }
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/external/llvm/include/llvm/TableGen/ |
H A D | Record.h | 343 virtual Init *getBit(unsigned Bit) const = 0; 417 Init *getBit(unsigned Bit) const override { 444 Init *getBit(unsigned Bit) const override { 445 assert(Bit < 1 && "Bit index out of range!"); 501 Init *getBit(unsigned Bit) const override { 502 assert(Bit < Bits.size() && "Bit index out of range!"); 503 return Bits[Bit]; 540 Init *getBit(unsigned Bit) cons 881 unsigned Bit; member in class:llvm::VarBitInit [all...] |
/external/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 1301 int64_t Bit = 0; local 1311 Bit = 1; 1314 Bit = 0; 1326 Operands.push_back(AMDGPUOperand::CreateImm(Bit, S, ImmTy));
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 780 uint64_t MV = 0, Bit = 1; local 782 MV |= Bit; 783 Bit <<= ES;
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 32 // (((X ^ XORValue) + AddValue) >> Bit) 35 : XORValue(xorValue), AddValue(addValue), Bit(bit) {} 39 unsigned Bit; member in struct:__anon12753::IPMConversion 2169 DAG.getConstant(Conversion.Bit, DL, MVT::i32)); 2170 if (Conversion.Bit != 31)
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/external/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.cpp | 1169 unsigned Bit = 0; local 1174 if (Bit > 32) { 1179 Idx.LaneMask = 1u << Bit; 1180 ++Bit;
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/external/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 1502 SDValue Bit = DAG.getNode(ISD::SHL, DL, ResTy, One, Op->getOperand(2)); local 1505 DAG.getNOT(DL, Bit, ResTy));
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/external/v8/src/arm/ |
H A D | constants-arm.h | 155 BIC = 14 << 21, // Bit Clear. 289 // Bit encoding P U W. 301 // Bit encoding P U W . 360 // standard SoftwareInterrupCode. Bit 23 is reserved for the stop feature. 481 inline int Bit(int nr) const { function in class:v8::internal::Instruction 498 static inline int Bit(Instr instr, int nr) { function in class:v8::internal::Instruction 551 inline int NValue() const { return Bit(7); } 552 inline int MValue() const { return Bit(5); } 553 inline int DValue() const { return Bit(22); } 555 inline int PValue() const { return Bit(2 [all...] |
/external/v8/src/ppc/ |
H A D | constants-ppc.h | 282 MTFSB1 = 38 << 1, // Move to FPSCR Bit 1 285 MTFSB0 = 70 << 1, // Move to FPSCR Bit 0 373 enum RCBit { // Bit 0 379 enum LKBit { // Bit 0 420 // standard SoftwareInterrupCode. Bit 23 is reserved for the stop feature. 515 inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; } function in class:v8::internal::Instruction 530 static inline int Bit(Instr instr, int nr) { return (instr >> nr) & 1; } function in class:v8::internal::Instruction
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/external/clang/lib/CodeGen/ |
H A D | MicrosoftCXXABI.cpp | 189 // The deleting destructors accept an i32 bitfield as a second parameter. Bit 190 // 1 indicates if the memory should be deleted. Bit 2 indicates if the this 2418 llvm::ConstantInt *Bit = llvm::ConstantInt::get(GuardTy, 1U << GuardNum); local 2421 Builder.CreateICmpNE(Builder.CreateAnd(LI, Bit), Zero); 2429 Builder.CreateStore(Builder.CreateOr(LI, Bit), GuardAddr);
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/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 4045 // Bit 4: Special Reg (cpsr, apsr => 0; spsr => 1) 6052 unsigned Bit = 1; local 6056 Bit = (ITState.Mask >> (5 - ITState.CurPosition)) & 1; 6061 unsigned ITCond = Bit ? ITState.Cond :
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/external/v8/src/s390/ |
H A D | constants-s390.h | 986 enum RCBit { // Bit 0 992 enum LKBit { // Bit 0 1026 // SoftwareInterrupCode. Bit 23 is reserved for the stop feature. 1114 inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; } function in class:v8::internal::Instruction 1144 static inline int Bit(Instr instr, int nr) { return (instr >> nr) & 1; } function in class:v8::internal::Instruction
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