| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FunctionLoweringInfo.cpp | 345 /// CreateReg - Allocate a single virtual register for the given type.
346 unsigned FunctionLoweringInfo::CreateReg(MVT VT) { function in class:FunctionLoweringInfo
371 unsigned R = CreateReg(RegisterVT);
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| /external/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 329 static std::unique_ptr<SparcOperand> CreateReg(unsigned RegNum, unsigned Kind, function in class:__anon12732::SparcOperand
743 Operands.push_back(SparcOperand::CreateReg(RegNo, RegKind, S, E));
804 Op = SparcOperand::CreateReg(RegNo, RegKind, S, E);
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| /external/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86Operand.h | 475 CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc, function in struct:llvm::X86Operand
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| /external/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 300 static std::unique_ptr<AMDGPUOperand> CreateReg(unsigned RegNo, SMLoc S, function in class:__anon12480::AMDGPUOperand
1183 Operands.push_back(AMDGPUOperand::CreateReg(
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| /external/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 582 static std::unique_ptr<HexagonOperand> CreateReg(unsigned RegNum, SMLoc S, function in struct:__anon12570::HexagonOperand
1146 Operands.push_back(HexagonOperand::CreateReg(Register, Begin, End));
1162 Operands.push_back(HexagonOperand::CreateReg(Register, Begin, End));
1172 Operands.push_back(HexagonOperand::CreateReg(
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1640 CreateReg(unsigned RegNum, bool isVector, SMLoc S, SMLoc E, MCContext &Ctx) { function in class:__anon12455::AArch64Operand
2849 AArch64Operand::CreateReg(Reg, true, S, getLoc(), getContext()));
2898 AArch64Operand::CreateReg(Reg, false, S, getLoc(), getContext()));
3125 AArch64Operand::CreateReg(RegNum, false, S, getLoc(), Ctx));
3146 AArch64Operand::CreateReg(RegNum, false, S, getLoc(), Ctx));
3858 Operands[2] = AArch64Operand::CreateReg(
3996 Operands[2] = AArch64Operand::CreateReg(Reg, false, Op.getStartLoc(),
4011 Operands[2] = AArch64Operand::CreateReg(Reg, false, Op.getStartLoc(),
4027 Operands[1] = AArch64Operand::CreateReg(Reg, false, Op.getStartLoc(),
4043 Operands[2] = AArch64Operand::CreateReg(zre
[all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 642 static std::unique_ptr<MipsOperand> CreateReg(unsigned Index, RegKind RegKind, function in class:__anon12657::MipsOperand
1162 return CreateReg(Index, RegKind_Numeric, RegInfo, S, E, Parser);
1170 return CreateReg(Index, RegKind_GPR, RegInfo, S, E, Parser);
1178 return CreateReg(Index, RegKind_FGR, RegInfo, S, E, Parser);
1186 return CreateReg(Index, RegKind_HWRegs, RegInfo, S, E, Parser);
1194 return CreateReg(Index, RegKind_FCC, RegInfo, S, E, Parser);
1202 return CreateReg(Index, RegKind_ACC, RegInfo, S, E, Parser);
1210 return CreateReg(Index, RegKind_MSA128, RegInfo, S, E, Parser);
1218 return CreateReg(Index, RegKind_MSACtrl, RegInfo, S, E, Parser);
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2532 static std::unique_ptr<ARMOperand> CreateReg(unsigned RegNum, SMLoc S, function
3081 Operands.push_back(ARMOperand::CreateReg(RegNo, RegTok.getLoc(),
5915 ARMOperand::CreateReg(NewReg, Op1.getStartLoc(), Op2.getEndLoc());
5936 ARMOperand::CreateReg(PairedReg, Op2.getStartLoc(), Op2.getEndLoc()));
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