/external/llvm/lib/MC/ |
H A D | MCCodeGenInfo.cpp | 18 void MCCodeGenInfo::initMCCodeGenInfo(Reloc::Model RM, CodeModel::Model CM, argument 20 RelocationModel = RM;
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H A D | MCObjectFileInfo.cpp | 835 void MCObjectFileInfo::InitMCObjectFileInfo(StringRef TT, Reloc::Model RM, argument 838 InitMCObjectFileInfo(Triple(TT), RM, CM, ctx); local
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/external/libyuv/files/ |
H A D | winarm.mk | 11 RM=cmd /c del macro 45 $(RM) "source\*.o" libyuv_arm.lib
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/external/llvm/lib/CodeGen/ |
H A D | LLVMTargetMachine.cpp | 78 Reloc::Model RM, CodeModel::Model CM, 81 CodeGenInfo = T.createMCCodeGenInfo(TT.str(), RM, CM, OL); 74 LLVMTargetMachine(const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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H A D | ParallelCG.cpp | 30 const TargetOptions &Options, Reloc::Model RM, 34 M->getTargetTriple(), CPU, Features, Options, RM, CM, OL)); 46 Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, 55 codegen(M.get(), *OSs[0], TheTarget, CPU, Features, Options, RM, CM, 73 [TheTarget, CPU, Features, Options, RM, CM, OL, FileType, 85 Options, RM, CM, OL, FileType); 28 codegen(Module *M, llvm::raw_pwrite_stream &OS, const Target *TheTarget, StringRef CPU, StringRef Features, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, TargetMachine::CodeGenFileType FileType) argument 43 splitCodeGen(std::unique_ptr<Module> M, ArrayRef<llvm::raw_pwrite_stream *> OSs, StringRef CPU, StringRef Features, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, TargetMachine::CodeGenFileType FileType) argument
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/external/llvm/lib/Target/CppBackend/ |
H A D | CPPTargetMachine.h | 27 StringRef FS, const TargetOptions &Options, Reloc::Model RM, 26 CPPTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZSubtarget.cpp | 47 // Return true if GV binds locally under reloc model RM. 48 static bool bindsLocally(const GlobalValue *GV, Reloc::Model RM) { argument 50 if (RM == Reloc::Static) 57 Reloc::Model RM, 66 return bindsLocally(GV, RM); 56 isPC32DBLSymbol(const GlobalValue *GV, Reloc::Model RM, CodeModel::Model CM) const argument
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/external/mesa3d/src/glx/apple/ |
H A D | Makefile | 17 RM=rm macro
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/external/clang/lib/StaticAnalyzer/Checkers/ |
H A D | BuiltinFunctionChecker.cpp | 60 MemRegionManager& RM = C.getStoreManager().getRegionManager(); local 62 RM.getAllocaRegion(CE, C.blockCount(), C.getLocationContext());
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/external/llvm/lib/Target/BPF/ |
H A D | BPFTargetMachine.cpp | 42 Reloc::Model RM, CodeModel::Model CM, 44 : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, RM, CM, 39 BPFTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/external/llvm/lib/Target/ARM/ |
H A D | ARMTargetMachine.cpp | 179 Reloc::Model RM, CodeModel::Model CM, 182 CPU, FS, Options, RM, CM, OL), 251 Reloc::Model RM, CodeModel::Model CM, 253 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) { 265 Reloc::Model RM, CodeModel::Model CM, 267 : ARMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} 274 Reloc::Model RM, CodeModel::Model CM, 276 : ARMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} 283 Reloc::Model RM, CodeModel::Model CM, 285 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, C 176 ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle) argument [all...] |
/external/llvm/lib/Target/BPF/MCTargetDesc/ |
H A D | BPFMCTargetDesc.cpp | 54 static MCCodeGenInfo *createBPFMCCodeGenInfo(const Triple &TT, Reloc::Model RM, argument 58 X->initMCCodeGenInfo(RM, CM, OL);
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonTargetMachine.cpp | 127 Reloc::Model RM, CodeModel::Model CM, 131 "n16:32", TT, CPU, FS, Options, RM, CM, OL), 124 HexagonTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/external/llvm/lib/Target/MSP430/MCTargetDesc/ |
H A D | MSP430MCTargetDesc.cpp | 52 Reloc::Model RM, 56 X->initMCCodeGenInfo(RM, CM, OL); 51 createMSP430MCCodeGenInfo(const Triple &TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430TargetMachine.cpp | 31 Reloc::Model RM, CodeModel::Model CM, 34 Options, RM, CM, OL), 28 MSP430TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/external/llvm/lib/Target/NVPTX/MCTargetDesc/ |
H A D | NVPTXMCTargetDesc.cpp | 53 Reloc::Model RM, 52 createNVPTXMCCodeGenInfo(const Triple &TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/external/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyTargetMachine.cpp | 46 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, 50 TT, CPU, FS, Options, RM, CM, OL), 44 WebAssemblyTargetMachine( const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/external/llvm/lib/Target/X86/ |
H A D | X86TargetMachine.cpp | 107 Reloc::Model RM, CodeModel::Model CM, 109 : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, RM, CM, 104 X86TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreTargetMachine.cpp | 28 Reloc::Model RM, CodeModel::Model CM, 32 TT, CPU, FS, Options, RM, CM, OL), 25 XCoreTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPUTargetMachine.cpp | 44 Reloc::Model RM, CodeModel::Model CM, 48 LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel), 41 AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OptLevel ) argument
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/external/libpng/contrib/pngminim/decoder/ |
H A D | makefile | 14 RM=rm -f macro 102 $(RM) pnglibconf.h pnglibconf.dfn 110 $(RM) pngm2pnm$(O) 111 $(RM) pngm2pnm$(E) 112 $(RM) $(OBJS) 116 $(RM) -r scripts # historical reasons 117 $(RM) $(PNGSRCS) $(PNGH) 118 $(RM) $(ZSRCS) $(ZH) $(ZCONF) 119 $(RM) $(PROGSRCS) $(PROGHDRS) $(PROGDOCS) 128 $(RM) [all...] |
/external/libpng/contrib/pngminim/encoder/ |
H A D | makefile | 14 RM=rm -f macro 101 $(RM) pnglibconf.h pnglibconf.dfn 109 $(RM) pnm2pngm$(O) 110 $(RM) pnm2pngm$(E) 111 $(RM) $(OBJS) 115 $(RM) -r scripts # historical reasons 116 $(RM) $(PNGSRCS) $(PNGH) 117 $(RM) $(ZSRCS) $(ZH) $(ZCONF) 118 $(RM) $(PROGSRCS) $(PROGHDRS) $(PROGDOCS) 127 $(RM) [all...] |
/external/libpng/contrib/pngminim/preader/ |
H A D | makefile | 14 RM=rm -f macro 117 $(RM) pnglibconf.h pnglibconf.dfn 125 $(RM) rpng2-x$(O) 126 $(RM) rpng2-x$(E) 127 $(RM) $(OBJS) 131 $(RM) -r scripts # historical reasons 132 $(RM) $(PNGSRCS) $(PNGH) 133 $(RM) $(ZSRCS) $(ZH) $(ZCONF) 134 $(RM) $(PROGSRCS) $(PROGHDRS) $(PROGDOCS) 143 $(RM) [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetMachine.cpp | 126 Reloc::Model RM, CodeModel::Model CM, 132 Options, RM, CM, OL), 168 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, 170 : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} 176 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, 178 : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} 123 AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool LittleEndian) argument 166 AArch64leTargetMachine( const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 174 AArch64beTargetMachine( const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCTargetDesc.cpp | 76 Reloc::Model RM, 95 RM = Reloc::PIC_; 99 else if (RM == Reloc::Default || RM == Reloc::DynamicNoPIC) 100 RM = Reloc::Static; 103 X->initMCCodeGenInfo(RM, CM, OL); 75 createAArch64MCCodeGenInfo(const Triple &TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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