/external/llvm/lib/Target/X86/AsmParser/ |
H A D | X86AsmInstrumentation.h | 39 void SetInitialFrameRegister(unsigned RegNo) { argument 40 InitialFrameReg = RegNo;
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H A D | X86Operand.h | 45 unsigned RegNo; member in struct:llvm::X86Operand::RegOp 99 return Reg.RegNo; 389 static unsigned getGR32FromGR64(unsigned RegNo) { argument 390 switch (RegNo) { 414 unsigned RegNo = getReg(); local 415 if (X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo)) 416 RegNo = getGR32FromGR64(RegNo); 417 Inst.addOperand(MCOperand::createReg(RegNo)); 475 CreateReg(unsigned RegNo, SMLo argument [all...] |
/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXRegisterInfo.h | 52 const char *getName(unsigned RegNo) const { 54 O << "reg" << RegNo; local
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/external/llvm/lib/Target/SystemZ/Disassembler/ |
H A D | SystemZDisassembler.cpp | 49 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, argument 51 assert(RegNo < Size && "Invalid register"); 52 RegNo = Regs[RegNo]; 53 if (RegNo == 0) 55 Inst.addOperand(MCOperand::createReg(RegNo)); 59 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, 62 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs, 16); 65 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, 68 return decodeRegisterClass(Inst, RegNo, SystemZM [all...] |
/external/llvm/lib/Target/WebAssembly/InstPrinter/ |
H A D | WebAssemblyInstPrinter.cpp | 39 unsigned RegNo) const { 40 assert(RegNo != WebAssemblyFunctionInfo::UnusedReg); 42 OS << "$" << RegNo; local
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/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DbgValueHistoryCalculator.cpp | 78 // \brief Claim that @Var is not described by @RegNo anymore. 79 static void dropRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo, argument 81 const auto &I = RegVars.find(RegNo); 82 assert(RegNo != 0U && I != RegVars.end()); 92 // \brief Claim that @Var is now described by @RegNo. 93 static void addRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo, argument 95 assert(RegNo != 0U); 96 auto &VarSet = RegVars[RegNo]; 115 // @RegNo by inserting @ClobberingInstr to their history. 116 static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo, argument [all...] |
/external/llvm/lib/Target/PowerPC/Disassembler/ |
H A D | PPCDisassembler.cpp | 208 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, argument 210 assert(RegNo < N && "Invalid register number"); 211 Inst.addOperand(MCOperand::createReg(Regs[RegNo])); 215 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo, 218 return decodeRegisterClass(Inst, RegNo, CRRegs); 221 static DecodeStatus DecodeCRRC0RegisterClass(MCInst &Inst, uint64_t RegNo, 224 return decodeRegisterClass(Inst, RegNo, CRRegs); 227 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo, 230 return decodeRegisterClass(Inst, RegNo, CRBITRegs); 233 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo, [all...] |
/external/llvm/lib/Target/X86/InstPrinter/ |
H A D | X86InstComments.cpp | 24 static unsigned getVectorRegSize(unsigned RegNo) { argument 25 if (X86::ZMM0 <= RegNo && RegNo <= X86::ZMM31) 27 if (X86::YMM0 <= RegNo && RegNo <= X86::YMM31) 29 if (X86::XMM0 <= RegNo && RegNo <= X86::XMM31) 31 if (X86::MM0 <= RegNo && RegNo <= X86::MM7)
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/external/llvm/lib/Target/PowerPC/InstPrinter/ |
H A D | PPCInstPrinter.cpp | 39 void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { 40 const char *RegName = getRegisterName(RegNo); 355 unsigned RegNo; local 358 case PPC::CR0: RegNo = 0; break; 359 case PPC::CR1: RegNo = 1; break; 360 case PPC::CR2: RegNo = 2; break; 361 case PPC::CR3: RegNo = 3; break; 362 case PPC::CR4: RegNo = 4; break; 363 case PPC::CR5: RegNo = 5; break; 364 case PPC::CR6: RegNo [all...] |
/external/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyAsmPrinter.cpp | 81 MVT getRegType(unsigned RegNo) const; 92 MVT WebAssemblyAsmPrinter::getRegType(unsigned RegNo) const { 94 TargetRegisterInfo::isVirtualRegister(RegNo) ? 95 MRI->getRegClass(RegNo) : 96 MRI->getTargetRegisterInfo()->getMinimalPhysRegClass(RegNo); 100 DEBUG(errs() << "Unknown type for register number: " << RegNo); 106 unsigned RegNo = MO.getReg(); local 107 assert(TargetRegisterInfo::isVirtualRegister(RegNo) && 109 assert(!MFI->isVRegStackified(RegNo)); 110 unsigned WAReg = MFI->getWAReg(RegNo); [all...] |
/external/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86BaseInfo.h | 722 inline bool isX86_64ExtendedReg(unsigned RegNo) { argument 723 if ((RegNo > X86::XMM7 && RegNo <= X86::XMM15) || 724 (RegNo > X86::XMM23 && RegNo <= X86::XMM31) || 725 (RegNo > X86::YMM7 && RegNo <= X86::YMM15) || 726 (RegNo > X86::YMM23 && RegNo <= X86::YMM31) || 727 (RegNo > X8 750 is32ExtendedReg(unsigned RegNo) argument [all...] |
/external/llvm/include/llvm/MC/ |
H A D | MCTargetAsmParser.h | 136 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, 140 virtual void SetFrameRegister(unsigned RegNo) {} argument 190 virtual bool OmitRegisterFromClobberLists(unsigned RegNo) { return false; } argument
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/external/llvm/lib/MC/MCParser/ |
H A D | COFFAsmParser.cpp | 141 bool ParseSEHRegisterNumber(unsigned &RegNo); 750 bool COFFAsmParser::ParseSEHRegisterNumber(unsigned &RegNo) { argument 776 RegNo = SEHRegNo; 784 RegNo = n;
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/external/llvm/lib/Target/Sparc/Disassembler/ |
H A D | SparcDisassembler.cpp | 134 unsigned RegNo, 137 if (RegNo > 31) 139 unsigned Reg = IntRegDecoderTable[RegNo]; 145 unsigned RegNo, 148 if (RegNo > 31) 150 unsigned Reg = IntRegDecoderTable[RegNo]; 157 unsigned RegNo, 160 if (RegNo > 31) 162 unsigned Reg = FPRegDecoderTable[RegNo]; 169 unsigned RegNo, 133 DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 144 DecodeI64RegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 156 DecodeFPRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 168 DecodeDFPRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 180 DecodeQFPRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 194 DecodeFCCRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 203 DecodeASRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 212 DecodePRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 221 DecodeIntPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcAsmPrinter.cpp | 62 static const char *getRegisterName(unsigned RegNo) { argument 63 return SparcInstPrinter::getRegisterName(RegNo);
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/external/llvm/lib/Target/XCore/Disassembler/ |
H A D | XCoreDisassembler.cpp | 70 static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) { argument 73 return *(RegInfo->getRegClass(RC).begin() + RegNo); 77 unsigned RegNo, 82 unsigned RegNo, 200 unsigned RegNo, 204 if (RegNo > 11) 206 unsigned Reg = getReg(Decoder, XCore::GRRegsRegClassID, RegNo); 212 unsigned RegNo, 216 if (RegNo > 15) 218 unsigned Reg = getReg(Decoder, XCore::RRegsRegClassID, RegNo); 199 DecodeGRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 211 DecodeRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | CallingConvLower.h | 78 unsigned RegNo, MVT LocVT, 82 Ret.Loc = RegNo; 92 unsigned RegNo, MVT LocVT, 95 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP); 130 void convertToReg(unsigned RegNo) { argument 131 Loc = RegNo; 77 getReg(unsigned ValNo, MVT ValVT, unsigned RegNo, MVT LocVT, LocInfo HTP) argument 91 getCustomReg(unsigned ValNo, MVT ValVT, unsigned RegNo, MVT LocVT, LocInfo HTP) argument
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H A D | MachineInstrBuilder.h | 65 const MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0, argument 69 MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
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H A D | MachineOperand.h | 145 unsigned RegNo; // For MO_Register. member in union:llvm::MachineOperand::__anon11927 165 // Register number is in SmallContents.RegNo. 269 return SmallContents.RegNo; 616 Op.SmallContents.RegNo = Reg;
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H A D | MachineRegisterInfo.h | 80 MachineOperand *&getRegUseDefListHead(unsigned RegNo) { argument 81 if (TargetRegisterInfo::isVirtualRegister(RegNo)) 82 return VRegInfo[RegNo].second; 83 return PhysRegUseDefLists[RegNo]; 86 MachineOperand *getRegUseDefListHead(unsigned RegNo) const { 87 if (TargetRegisterInfo::isVirtualRegister(RegNo)) 88 return VRegInfo[RegNo].second; 89 return PhysRegUseDefLists[RegNo]; 231 reg_iterator reg_begin(unsigned RegNo) const { 232 return reg_iterator(getRegUseDefListHead(RegNo)); [all...] |
/external/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 34 unsigned RegNo, uint64_t Address, 37 unsigned RegNo, 40 static DecodeStatus DecodeFPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 43 static DecodeStatus DecodeFPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 46 static DecodeStatus DecodeFPR16RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 49 static DecodeStatus DecodeFPR8RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 52 static DecodeStatus DecodeGPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 56 unsigned RegNo, uint64_t Address, 58 static DecodeStatus DecodeGPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 62 unsigned RegNo, uint64_ 265 DecodeFPR128RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 276 DecodeFPR128_loRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 294 DecodeFPR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 315 DecodeFPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 336 DecodeFPR16RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 357 DecodeFPR8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 378 DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 389 DecodeGPR64spRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 411 DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 422 DecodeGPR32spRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 445 DecodeVectorRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 467 DecodeQQRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 490 DecodeQQQRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 513 DecodeQQQQRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 534 DecodeDDRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 557 DecodeDDDRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 580 DecodeDDDDRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 1559 DecodeGPRSeqPairsClassRegisterClass(MCInst &Inst, unsigned RegClassID, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 1573 DecodeWSeqPairsClassRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument 1582 DecodeXSeqPairsClassRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 534 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); local 539 return RegNo; 544 return 2 * RegNo; 1540 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); 1542 Binary |= (RegNo & 0x1f) << 8; 1549 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(MI.getOperand(I).getReg()); 1550 Binary |= 1 << RegNo; 1566 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg.getReg()); 1578 return RegNo | (Align << 4); 1590 unsigned RegNo [all...] |
/external/llvm/lib/Target/Mips/Disassembler/ |
H A D | MipsDisassembler.cpp | 68 unsigned RegNo, 73 unsigned RegNo, 78 unsigned RegNo, 83 unsigned RegNo, 88 unsigned RegNo, 93 unsigned RegNo, 103 unsigned RegNo, 108 unsigned RegNo, 113 unsigned RegNo, 118 unsigned RegNo, 498 getReg(const void *D, unsigned RC, unsigned RegNo) argument 995 DecodeCPU16RegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1004 DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1017 DecodeGPRMM16RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1028 DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1039 DecodeGPRMM16MovePRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1050 DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1061 DecodePtrRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1071 DecodeDSPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1078 DecodeFGR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1090 DecodeFGR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1102 DecodeCCRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1113 DecodeFCCRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1124 DecodeFGRCCRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1658 DecodeHWRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1669 DecodeAFGR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1682 DecodeACC64DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1694 DecodeHI32DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1706 DecodeLO32DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1718 DecodeMSA128BRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1730 DecodeMSA128HRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1742 DecodeMSA128WRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1754 DecodeMSA128DRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1766 DecodeMSACtrlRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1778 DecodeCOP0RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1790 DecodeCOP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument [all...] |
/external/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsTargetStreamer.cpp | 45 void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) { argument 91 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {} argument 96 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, argument 178 void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) { argument 179 OS << "\t.set\tat=$" << Twine(RegNo) << "\n"; 180 MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo); 361 void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) { argument 363 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n"; 373 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo, argument 378 << StringRef(MipsInstPrinter::getRegisterName(RegNo)) 738 emitDirectiveCpLoad(unsigned RegNo) argument 807 emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg) argument [all...] |
/external/llvm/lib/Target/Sparc/AsmParser/ |
H A D | SparcAsmParser.cpp | 53 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override; 76 // returns true if Tok is matched to a register and returns register in RegNo. 77 bool matchRegisterName(const AsmToken &Tok, unsigned &RegNo, 559 ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) argument 564 RegNo = 0; 569 if (matchRegisterName(Tok, RegNo, regKind)) { 737 unsigned RegNo, RegKind; local 738 if (!matchRegisterName(Parser.getTok(), RegNo, RegKind)) 743 Operands.push_back(SparcOperand::CreateReg(RegNo, RegKind, S, E)); 796 unsigned RegNo; local 882 matchRegisterName(const AsmToken &Tok, unsigned &RegNo, unsigned &RegKind) argument [all...] |