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Searched defs:Rn (Results 1 - 8 of 8) sorted by relevance

/system/core/libpixelflinger/codeflinger/
H A D	ARMAssemblerInterface.cpp	69 int Rn, uint32_t offset) 71 LDR(cc, Rd, Rn, offset); 74 int Rn, uint32_t offset) 76 STR(cc, Rd, Rn, offset); 79 int Rd, int Rn, uint32_t Op2) 81 dataProcessing(opADD, cc, s, Rd, Rn, Op2); 84 int Rd, int Rn, uint32_t Op2) 86 dataProcessing(opSUB, cc, s, Rd, Rn, Op2); 68 ADDR_LDR(int cc, int Rd, int Rn, uint32_t offset) argument 73 ADDR_STR(int cc, int Rd, int Rn, uint32_t offset) argument 78 ADDR_ADD(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 83 ADDR_SUB(int cc, int s, int Rd, int Rn, uint32_t Op2) argument
H A D	ARMAssembler.cpp	217 int s, int Rd, int Rn, uint32_t Op2) 219 mPC++ = (cc<<28) \| (opcode<<21) \| (s<<20) \| (Rn<<16) \| (Rd<<12) \| Op2; 229 int Rd, int Rm, int Rs, int Rn) { 231 LOG_FATAL_IF(Rd==Rm, "MLA(r%u,r%u,r%u,r%u)", Rd,Rm,Rs,Rn); 233 (Rd<<16) \| (Rn<<12) \| (Rs<<8) \| 0x90 \| Rm; 288 void ARMAssembler::BX(int cc, int Rn) argument 290 mPC++ = (cc<<28) \| 0x12FFF10 \| Rn; 299 void ARMAssembler::LDR(int cc, int Rd, int Rn, uint32_t offset) { argument 300 *mPC++ = (cc<<28) \| (1<<26) \| (1<<20) \| (Rn<<16) \| (Rd<<12) \| offset; 302 void ARMAssembler::LDRB(int cc, int Rd, int Rn, uint32_ argument 216 dataProcessing(int opcode, int cc, int s, int Rd, int Rn, uint32_t Op2) argument 228 MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) argument 305 STR(int cc, int Rd, int Rn, uint32_t offset) argument 308 STRB(int cc, int Rd, int Rn, uint32_t offset) argument 312 LDRH(int cc, int Rd, int Rn, uint32_t offset) argument 315 LDRSB(int cc, int Rd, int Rn, uint32_t offset) argument 318 LDRSH(int cc, int Rd, int Rn, uint32_t offset) argument 321 STRH(int cc, int Rd, int Rn, uint32_t offset) argument 331 LDM(int cc, int dir, int Rn, int W, uint32_t reg_list) argument 340 STM(int cc, int dir, int Rn, int W, uint32_t reg_list) argument 355 SWP(int cc, int Rn, int Rd, int Rm) argument 358 SWPB(int cc, int Rn, int Rd, int Rm) argument 371 PLD(int Rn, uint32_t offset) argument 382 QADD(int cc, int Rd, int Rm, int Rn) argument 387 QDADD(int cc, int Rd, int Rm, int Rn) argument 392 QSUB(int cc, int Rd, int Rm, int Rn) argument 397 QDSUB(int cc, int Rd, int Rm, int Rn) argument 414 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument 426 SMLAW(int cc, int y, int Rd, int Rm, int Rs, int Rn) argument 447 UBFX(int cc, int Rd, int Rn, int lsb, int width) argument [all...]
H A D	ARMAssemblerProxy.cpp	161 int Rd, int Rn, uint32_t Op2) 163 mTarget->dataProcessing(opcode, cc, s, Rd, Rn, Op2); 166 void ARMAssemblerProxy::MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) { argument 167 mTarget->MLA(cc, s, Rd, Rm, Rs, Rn); 195 void ARMAssemblerProxy::BX(int cc, int Rn) { argument 196 mTarget->BX(cc, Rn); 212 void ARMAssemblerProxy::LDR(int cc, int Rd, int Rn, uint32_t offset) { argument 213 mTarget->LDR(cc, Rd, Rn, offset); 215 void ARMAssemblerProxy::LDRB(int cc, int Rd, int Rn, uint32_t offset) { argument 216 mTarget->LDRB(cc, Rd, Rn, offse 160 dataProcessing( int opcode, int cc, int s, int Rd, int Rn, uint32_t Op2) argument 218 STR(int cc, int Rd, int Rn, uint32_t offset) argument 221 STRB(int cc, int Rd, int Rn, uint32_t offset) argument 224 LDRH(int cc, int Rd, int Rn, uint32_t offset) argument 227 LDRSB(int cc, int Rd, int Rn, uint32_t offset) argument 230 LDRSH(int cc, int Rd, int Rn, uint32_t offset) argument 233 STRH(int cc, int Rd, int Rn, uint32_t offset) argument 236 LDM(int cc, int dir, int Rn, int W, uint32_t reg_list) argument 239 STM(int cc, int dir, int Rn, int W, uint32_t reg_list) argument 243 SWP(int cc, int Rn, int Rd, int Rm) argument 246 SWPB(int cc, int Rn, int Rd, int Rm) argument 254 PLD(int Rn, uint32_t offset) argument 260 QADD(int cc, int Rd, int Rm, int Rn) argument 263 QDADD(int cc, int Rd, int Rm, int Rn) argument 266 QSUB(int cc, int Rd, int Rm, int Rn) argument 269 QDSUB(int cc, int Rd, int Rm, int Rn) argument 278 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument 285 SMLAW(int cc, int y, int Rd, int Rm, int Rs, int Rn) argument 293 UBFX(int cc, int Rd, int Rn, int lsb, int width) argument 297 ADDR_LDR(int cc, int Rd, int Rn, uint32_t offset) argument 300 ADDR_STR(int cc, int Rd, int Rn, uint32_t offset) argument 303 ADDR_ADD(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 306 ADDR_SUB(int cc, int s, int Rd, int Rn, uint32_t Op2) argument [all...]
H A D	ARMAssemblerInterface.h	124 int Rd, int Rn, 129 int Rd, int Rm, int Rs, int Rn) = 0; 144 virtual void BX(int cc, int Rn) = 0; 155 int Rn, uint32_t offset = __immed12_pre(0)) = 0; 157 int Rn, uint32_t offset = __immed12_pre(0)) = 0; 159 int Rn, uint32_t offset = __immed12_pre(0)) = 0; 161 int Rn, uint32_t offset = __immed12_pre(0)) = 0; 164 int Rn, uint32_t offset = __immed8_pre(0)) = 0; 166 int Rn, uint32_t offset = __immed8_pre(0)) = 0; 168 int Rn, uint32_ 225 ADC(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 229 ADD(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 233 AND(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 237 BIC(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 241 EOR(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 253 ORR(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 257 RSB(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 261 RSC(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 265 SBC(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 269 SUB(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 273 TEQ(int cc, int Rn, uint32_t Op2) argument 277 TST(int cc, int Rn, uint32_t Op2) argument 281 CMP(int cc, int Rn, uint32_t Op2) argument 285 CMN(int cc, int Rn, uint32_t Op2) argument 304 SMLABB(int cc, int Rd, int Rm, int Rs, int Rn) argument 307 SMLATB(int cc, int Rd, int Rm, int Rs, int Rn) argument 310 SMLABT(int cc, int Rd, int Rm, int Rs, int Rn) argument 313 SMLATT(int cc, int Rd, int Rm, int Rs, int Rn) argument 330 SMLAWB(int cc, int Rd, int Rm, int Rs, int Rn) argument 333 SMLAWT(int cc, int Rd, int Rm, int Rs, int Rn) argument [all...]
H A D	MIPS64Assembler.cpp	402 int s, int Rd, int Rn, uint32_t Op2) 418 mMips->AND(Rd, Rn, src); 420 mMips->ANDI(Rd, Rn, src); 427 mMips->ADDU(Rd, Rn, src); 429 mMips->ADDIU(Rd, Rn, src); 436 mMips->SUBU(Rd, Rn, src); 438 mMips->SUBIU(Rd, Rn, src); 445 mMips->DADDU(Rd, Rn, src); 447 mMips->DADDIU(Rd, Rn, src); 454 mMips->DSUBU(Rd, Rn, sr 401 dataProcessing(int opcode, int cc, int s, int Rd, int Rn, uint32_t Op2) argument 604 MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) argument 746 BX(int cc, int Rn) argument 760 LDR(int cc, int Rd, int Rn, uint32_t offset) argument 794 LDRB(int cc, int Rd, int Rn, uint32_t offset) argument 823 STR(int cc, int Rd, int Rn, uint32_t offset) argument 859 STRB(int cc, int Rd, int Rn, uint32_t offset) argument 887 LDRH(int cc, int Rd, int Rn, uint32_t offset) argument 915 LDRSB(int cc, int Rd, int Rn, uint32_t offset) argument 922 LDRSH(int cc, int Rd, int Rn, uint32_t offset) argument 929 STRH(int cc, int Rd, int Rn, uint32_t offset) argument 965 LDM(int cc, int dir, int Rn, int W, uint32_t reg_list) argument 977 STM(int cc, int dir, int Rn, int W, uint32_t reg_list) argument 997 SWP(int cc, int Rn, int Rd, int Rm) argument 1004 SWPB(int cc, int Rn, int Rd, int Rm) argument 1025 PLD(int Rn, uint32_t offset) argument 1040 QADD(int cc, int Rd, int Rm, int Rn) argument 1048 QDADD(int cc, int Rd, int Rm, int Rn) argument 1056 QSUB(int cc, int Rd, int Rm, int Rn) argument 1064 QDSUB(int cc, int Rd, int Rm, int Rn) argument 1121 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument 1160 SMLAW(int cc, int y, int Rd, int Rm, int Rs, int Rn) argument 1183 UBFX(int cc, int Rd, int Rn, int lsb, int width) argument 1196 ADDR_ADD(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 1204 ADDR_SUB(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 1212 ADDR_LDR(int cc, int Rd, int Rn, uint32_t offset) argument 1245 ADDR_STR(int cc, int Rd, int Rn, uint32_t offset) argument [all...]
H A D	Arm64Assembler.cpp	341 int s, int Rd, int Rn, uint32_t Op2) 398 case opADD: mPC++ = A64_ADD_W(Rd, Rn, Rm, shift, amount); break; 399 case opAND: mPC++ = A64_AND_W(Rd, Rn, Rm, shift, amount); break; 400 case opORR: mPC++ = A64_ORR_W(Rd, Rn, Rm, shift, amount); break; 401 case opMVN: mPC++ = A64_ORN_W(Rd, Rn, Rm, shift, amount); break; 402 case opSUB: *mPC++ = A64_SUB_W(Rd, Rn, Rm, shift, amount, s);break; 409 int s, int Rd, int Rn, uint32_t Op2) 420 dataProcessingCommon(opcode, s, Wd, Rn, Op2); 424 dataProcessingCommon(opSUB, 1, mTmpReg3, Rn, Op2); 428 dataProcessingCommon(opSUB, s, Wd, Rn, Op 340 dataProcessingCommon(int opcode, int s, int Rd, int Rn, uint32_t Op2) argument 408 dataProcessing(int opcode, int cc, int s, int Rd, int Rn, uint32_t Op2) argument 463 ADDR_ADD(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 498 ADDR_SUB(int cc, int s, int Rd, int Rn, uint32_t Op2) argument 519 MLA(int cc, int s,int Rd, int Rm, int Rs, int Rn) argument 577 dataTransfer(int op, int cc, int Rd, int Rn, uint32_t op_type, uint32_t size) argument 634 ADDR_LDR(int cc, int Rd, int Rn, uint32_t op_type) argument 638 ADDR_STR(int cc, int Rd, int Rn, uint32_t op_type) argument 642 LDR(int cc, int Rd, int Rn, uint32_t op_type) argument 646 LDRB(int cc, int Rd, int Rn, uint32_t op_type) argument 650 STR(int cc, int Rd, int Rn, uint32_t op_type) argument 655 STRB(int cc, int Rd, int Rn, uint32_t op_type) argument 660 LDRH(int cc, int Rd, int Rn, uint32_t op_type) argument 673 STRH(int cc, int Rd, int Rn, uint32_t op_type) argument 681 LDM(int cc, int dir, int Rn, int W, uint32_t reg_list) argument 702 STM(int cc, int dir, int Rn, int W, uint32_t reg_list) argument 810 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument 852 UBFX(int cc, int Rd, int Rn, int lsb, int width) argument 1002 A64_LDRSTR_Wm_SXTW_0(uint32_t op, uint32_t size, uint32_t Rt, uint32_t Rn, uint32_t Rm) argument 1020 A64_STR_IMM_PreIndex(uint32_t Rt, uint32_t Rn, int32_t simm) argument 1032 A64_LDR_IMM_PostIndex(uint32_t Rt, uint32_t Rn, int32_t simm) argument 1045 A64_ADD_X_Wm_SXTW(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t amount) argument 1056 A64_SUB_X_Wm_SXTW(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t amount) argument 1073 A64_ADD_X(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument 1082 A64_ADD_IMM_X(uint32_t Rd, uint32_t Rn, uint32_t imm, uint32_t shift) argument 1089 A64_SUB_IMM_X(uint32_t Rd, uint32_t Rn, uint32_t imm, uint32_t shift) argument 1096 A64_ADD_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument 1106 A64_SUB_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount, uint32_t setflag) argument 1127 A64_AND_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument 1137 A64_ORR_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument 1147 A64_ORN_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument 1157 A64_CSEL_X(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t cond) argument 1164 A64_CSEL_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t cond) argument 1171 A64_RET(uint32_t Rn) argument 1198 A64_SMADDL(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t Ra) argument 1205 A64_MADD_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t Ra) argument 1212 A64_SBFM_W(uint32_t Rd, uint32_t Rn, uint32_t immr, uint32_t imms) argument 1219 A64_UBFM_W(uint32_t Rd, uint32_t Rn, uint32_t immr, uint32_t imms) argument 1226 A64_UBFM_X(uint32_t Rd, uint32_t Rn, uint32_t immr, uint32_t imms) argument 1234 A64_EXTR_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t lsb) argument [all...]
H A D	MIPSAssembler.cpp	418 int s, int Rd, int Rn, uint32_t Op2) 435 mMips->AND(Rd, Rn, src); 437 mMips->ANDI(Rd, Rn, src); 444 mMips->ADDU(Rd, Rn, src); 446 mMips->ADDIU(Rd, Rn, src); 453 mMips->SUBU(Rd, Rn, src); 455 mMips->SUBIU(Rd, Rn, src); 461 mMips->XOR(Rd, Rn, src); 463 mMips->XORI(Rd, Rn, src); 469 mMips->OR(Rd, Rn, sr 417 dataProcessing(int opcode, int cc, int s, int Rd, int Rn, uint32_t Op2) argument 613 MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) argument 754 BX(int cc, int Rn) argument 768 LDR(int cc, int Rd, int Rn, uint32_t offset) argument 802 LDRB(int cc, int Rd, int Rn, uint32_t offset) argument 831 STR(int cc, int Rd, int Rn, uint32_t offset) argument 867 STRB(int cc, int Rd, int Rn, uint32_t offset) argument 895 LDRH(int cc, int Rd, int Rn, uint32_t offset) argument 923 LDRSB(int cc, int Rd, int Rn, uint32_t offset) argument 930 LDRSH(int cc, int Rd, int Rn, uint32_t offset) argument 937 STRH(int cc, int Rd, int Rn, uint32_t offset) argument 973 LDM(int cc, int dir, int Rn, int W, uint32_t reg_list) argument 985 STM(int cc, int dir, int Rn, int W, uint32_t reg_list) argument 1005 SWP(int cc, int Rn, int Rd, int Rm) argument 1012 SWPB(int cc, int Rn, int Rd, int Rm) argument 1033 PLD(int Rn, uint32_t offset) argument 1048 QADD(int cc, int Rd, int Rm, int Rn) argument 1056 QDADD(int cc, int Rd, int Rm, int Rn) argument 1064 QSUB(int cc, int Rd, int Rm, int Rn) argument 1072 QDSUB(int cc, int Rd, int Rm, int Rn) argument 1140 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument 1189 SMLAW(int cc, int y, int Rd, int Rm, int Rs, int Rn) argument 1210 UBFX(int cc, int Rd, int Rn, int lsb, int width) argument [all...]
/system/core/libpixelflinger/tests/arch-arm64/assembler/
H A D	arm64_assembler_test.cpp	415 uint32_t Rn = 1, uint32_t Rm = 2, uint32_t Rs = 3) 429 regs[Rn] = test.RnValue; 450 case INSTR_ADD: a64asm->ADD(test.cond, test.setFlags, Rd,Rn,op2); break; 451 case INSTR_SUB: a64asm->SUB(test.cond, test.setFlags, Rd,Rn,op2); break; 452 case INSTR_RSB: a64asm->RSB(test.cond, test.setFlags, Rd,Rn,op2); break; 453 case INSTR_AND: a64asm->AND(test.cond, test.setFlags, Rd,Rn,op2); break; 454 case INSTR_ORR: a64asm->ORR(test.cond, test.setFlags, Rd,Rn,op2); break; 455 case INSTR_BIC: a64asm->BIC(test.cond, test.setFlags, Rd,Rn,op2); break; 457 case INSTR_MLA: a64asm->MLA(test.cond, test.setFlags, Rd,Rm,Rs,Rn); break; 458 case INSTR_CMP: a64asm->CMP(test.cond, Rn,op 662 uint32_t Rn = ARMAssemblerInterface::SP; local 753 uint32_t Rd, Rm, Rs, Rn; local [all...]

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