Searched defs:SZ (Results 1 - 11 of 11) sorted by relevance

/external/compiler-rt/test/asan/TestCases/Linux/
H A Dodr-violation.cc29 #ifndef SZ
30 # define SZ 4 macro
34 namespace foo { char G[SZ]; }
/external/mesa3d/src/mesa/drivers/dri/r200/
H A Dradeon_queryobj.h42 static inline void radeon_init_query_stateobj(radeonContextPtr radeon, int SZ) argument
44 radeon->query.queryobj.cmd_size = (SZ);
45 radeon->query.queryobj.cmd = (uint32_t*)CALLOC((SZ) * sizeof(uint32_t));
52 radeon->hw.max_state_size += (SZ);
/external/mesa3d/src/mesa/drivers/dri/radeon/
H A Dradeon_queryobj.h42 static inline void radeon_init_query_stateobj(radeonContextPtr radeon, int SZ) argument
44 radeon->query.queryobj.cmd_size = (SZ);
45 radeon->query.queryobj.cmd = (uint32_t*)CALLOC((SZ) * sizeof(uint32_t));
52 radeon->hw.max_state_size += (SZ);
/external/valgrind/none/tests/mips32/
H A Dbug320057-mips32.c13 #define SZ 48216 + 1024 macro
24 ftruncate(fd, SZ);
25 DO(ftruncate(fd, SZ));
27 ptr = mmap(0, SZ, (PROT_READ | PROT_WRITE), MAP_SHARED, fd, 0);
30 munmap(ptr, SZ);
/external/mesa3d/src/mesa/math/
H A Dm_trans_tmp.h45 if (SZ >= 1) t[i][0] = TRX_4F(f, 0);
46 if (SZ >= 2) t[i][1] = TRX_4F(f, 1);
47 if (SZ >= 3) t[i][2] = TRX_4F(f, 2);
48 if (SZ == 4) t[i][3] = TRX_4F(f, 3); else t[i][3] = 1.0;
71 if (SZ >= 1) t[i][0] = TRX_4FN(f, 0);
72 if (SZ >= 2) t[i][1] = TRX_4FN(f, 1);
73 if (SZ >= 3) t[i][2] = TRX_4FN(f, 2);
74 if (SZ == 4) t[i][3] = TRX_4FN(f, 3); else t[i][3] = 1.0;
137 if (SZ >= 1) TRX_UB(t[i][0], f, 0);
138 if (SZ >
276 #undef SZ macro
[all...]
H A Dm_translate.c134 #define SZ 4 macro
142 #define SZ 3 macro
151 #define SZ 2 macro
157 #define SZ 1 macro
189 #define SZ 4 macro
197 #define SZ 3 macro
207 #define SZ 1 macro
235 #define SZ 4 macro
243 #define SZ 3 macro
252 #define SZ macro
258 #define SZ macro
289 #define SZ macro
297 #define SZ macro
306 #define SZ macro
312 #define SZ macro
342 #define SZ macro
350 #define SZ macro
359 #define SZ macro
365 #define SZ macro
396 #define SZ macro
404 #define SZ macro
413 #define SZ macro
419 #define SZ macro
450 #define SZ macro
458 #define SZ macro
467 #define SZ macro
473 #define SZ macro
489 #define SZ macro
497 #define SZ macro
506 #define SZ macro
512 #define SZ macro
[all...]
/external/jemalloc/test/unit/
H A Dquarantine.c24 #define SZ ZU(256) macro
25 #define NQUARANTINED (QUARANTINE_SIZE/SZ)
31 assert_zu_eq(nallocx(SZ, 0), SZ,
32 "SZ=%zu does not precisely equal a size class", SZ);
44 void *p = mallocx(SZ, 0);
55 #undef SZ macro
/external/opencv3/samples/python2/
H A Ddigits.py39 SZ = 20 # size of each digit is SZ x SZ variable
55 digits = split2d(digits_img, (SZ, SZ))
64 M = np.float32([[1, skew, -0.5*SZ*skew], [0, 1, 0]])
65 img = cv2.warpAffine(img, M, (SZ, SZ), flags=cv2.WARP_INVERSE_MAP | cv2.INTER_LINEAR)
124 return np.float32(digits).reshape(-1, SZ*SZ) / 255.
[all...]
/external/tpm2/
H A DMemoryLib.c205 #define SZ sizeof(s_actionInputBuffer[0]) macro
206 for(size = (size + SZ - 1) / SZ; size > 0; size--)
208 #undef SZ macro
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp2857 unsigned SZ = Ty->getPrimitiveSizeInBits(); local
2858 assert((SZ == 32 || SZ == 64) && "Only 32/64-bit atomic loads supported");
2859 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_L2_loadw_locked
2872 unsigned SZ = Ty->getPrimitiveSizeInBits(); local
2873 assert((SZ == 32 || SZ == 64) && "Only 32/64-bit atomic stores supported");
2874 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_S2_storew_locked
/external/libgdx/backends/gdx-backends-gwt/libs/
H A Dgwt-dev.jarMETA-INF/ META-INF/MANIFEST.MF com/ com/google/ com/google/gwt/ com/google/gwt/core/ ...

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