| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptimizeSZextends.cpp | 118 Instruction *Shl = dyn_cast<Instruction>(Ashr->getOperand(0)); local
119 if (!(Shl && Shl->getOpcode() == Instruction::Shl))
121 Value *Intr = Shl->getOperand(0);
122 Value *ShlOp1 = Shl->getOperand(1);
128 // The first operand of Shl comes from an intrinsic.
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| /external/llvm/unittests/ADT/ |
| H A D | APIntTest.cpp | 30 APInt Shl = One.shl(0); local
31 EXPECT_TRUE(Shl[0]);
32 EXPECT_FALSE(Shl[1]);
|
| /external/llvm/include/llvm/MC/ |
| H A D | MCExpr.h | 428 Shl, ///< Shift left. enumerator in enum:llvm::MCBinaryExpr::Opcode
506 return create(Shl, LHS, RHS, Ctx);
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| /external/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 554 case Instruction::Shl:
805 Instruction *Shl, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne) {
807 const APInt &ShlOp1 = cast<ConstantInt>(Shl->getOperand(1))->getValue();
851 BinaryOperator *Orig = cast<BinaryOperator>(Shl);
862 return InsertNewInstWith(New, *Shl);
804 SimplifyShrShlDemandedBits(Instruction *Shr, Instruction *Shl, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne) argument
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| H A D | InstCombineMulDivRem.cpp | 65 if (I->getOpcode() == Instruction::Shl && !I->hasNoUnsignedWrap()) {
205 Constant *Shl = ConstantExpr::getShl(C1, C2); local
207 BinaryOperator *BO = BinaryOperator::CreateMul(NewOp, Shl);
211 Shl->isNotMinSignedValue())
228 BinaryOperator *Shl = BinaryOperator::CreateShl(NewOp, NewCst); local
231 Shl->setHasNoUnsignedWrap();
235 Shl->setHasNoSignedWrap();
238 return Shl;
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| /external/llvm/lib/Transforms/Scalar/ |
| H A D | Reassociate.cpp | 1030 static BinaryOperator *ConvertShiftToMul(Instruction *Shl) { argument
1031 Constant *MulCst = ConstantInt::get(Shl->getType(), 1);
1032 MulCst = ConstantExpr::getShl(MulCst, cast<Constant>(Shl->getOperand(1)));
1035 BinaryOperator::CreateMul(Shl->getOperand(0), MulCst, "", Shl);
1036 Shl->setOperand(0, UndefValue::get(Shl->getType())); // Drop use of op.
1037 Mul->takeName(Shl);
1040 Shl->replaceAllUsesWith(Mul);
1041 Mul->setDebugLoc(Shl
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 1287 const SDValue &Shl = N->getOperand(0); local
1288 ConstantSDNode *B = dyn_cast<ConstantSDNode>(Shl->getOperand(1));
1299 return getS_BFE(Opcode, SDLoc(N), Shl.getOperand(0),
|
| H A D | AMDGPUISelLowering.cpp | 2333 uint32_t Shl = static_cast<uint32_t>(Src0) << (32 - Offset - Width); local
2334 IntTy Result = static_cast<IntTy>(Shl) >> (32 - Width);
|
| /external/llvm/bindings/ocaml/llvm/ |
| H A D | llvm.ml | 173 | Shl Constructor in type:Opcode/t
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 938 SDValue Shl = DAG.getNode(ISD::SHL, DL, VT, And, ShlCount); local
950 insertDAGNode(DAG, N, Shl);
951 DAG.ReplaceAllUsesWith(N, Shl);
|
| /external/v8/src/crankshaft/ |
| H A D | hydrogen-instructions.cc | 244 void Range::Shl(int32_t value) { function in class:v8::internal::Range
2636 result->Shl(c->Integer32Value());
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 14129 SDValue Shl = DAG.getNode(ISD::SHL, SDLoc(N0), VT, AndLHS, ShlAmt); local
14134 DAG.getConstant(AndMask.getBitWidth() - 1, SDLoc(Shl),
14135 getShiftAmountTy(Shl.getValueType()));
14136 SDValue Shr = DAG.getNode(ISD::SRA, SDLoc(N0), VT, Shl, ShrAmt);
|