/external/llvm/test/MC/AsmParser/ |
H A D | directive_ascii.s | 17 # CHECK: TEST3: 22 TEST3: label
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H A D | directive_values.s | 18 # CHECK: TEST3: 20 TEST3: label
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H A D | directive_fill.s | 21 # CHECK: TEST3 26 TEST3: label
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/external/valgrind/none/tests/mips64/ |
H A D | macro_int.h | 35 #define TEST3(instruction, RSval, RD, RS) \ macro
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H A D | branch_and_jump_instructions.c | 107 #define TEST3(instruction, RDval, RSval, RTval, RD, RS, RT) \ macro 193 TEST3("beq", 0, 0, 1, 2, 3, 4); 194 TEST3("beq", 1, 1, 1, 3, 4, 5); 195 TEST3("beq", 2, 0xffffffff, 0xffffffff, 4, 5, 6); 196 TEST3("beq", 3, 0xffffffff, 0xfffffffe, 5, 6, 7); 197 TEST3("beq", 4, 0xfffffffe, 0xffffffff, 6, 7, 8); 198 TEST3("beq", 5, 0xffffffff, 0xffffffff, 7, 8, 9); 199 TEST3("beq", 6, 0x5, 0x5, 8, 9, 10); 200 TEST3("beq", 7, -3, -4, 9, 10, 11); 201 TEST3("be [all...] |
H A D | macro_load_store.h | 47 #define TEST3(instruction, offset, mem) \ macro
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H A D | move_instructions.c | 93 #define TEST3(instruction, FD, FS, cc, offset) \ macro 210 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 0); 211 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 8); 212 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 16); 213 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 24); 214 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 32) 215 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 40) 216 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 48) 217 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 56) 218 TEST3("mov [all...] |
H A D | cvm_atomic.c | 102 /* TEST3 macro is used for store atomic add and store atomic add doubleword 110 #define TEST3(instruction, offset, mem, value) \ macro 211 TEST3("saa", j, reg_val_double_copy, reg_val_double[j]); 217 TEST3("saad", j, reg_val_double_copy, reg_val_double[j]);
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/external/clang/test/CodeGenCXX/ |
H A D | 2010-06-22-BitfieldInit.cpp | 12 } TEST3; typedef in typeref:struct:_TEST3 14 TEST3 test =
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