Searched defs:dst (Results 1 - 25 of 35) sorted by relevance

12

/art/runtime/base/unix_file/
H A Drandom_access_file_utils.cc23 bool CopyFile(const RandomAccessFile& src, RandomAccessFile* dst) { argument
30 if (dst->Write(&buf[0], n, offset) != n) {
/art/runtime/base/
H A Dstringprintf.cc23 void StringAppendV(std::string* dst, const char* format, va_list ap) { argument
38 dst->append(space, result);
60 dst->append(buf, result);
74 void StringAppendF(std::string* dst, const char* format, ...) { argument
77 StringAppendV(dst, format, ap);
H A Dbit_vector.h260 void CopyTo(void* dst, size_t len) const { argument
264 void* dst_padding = reinterpret_cast<uint8_t*>(dst) + vec_len;
265 memcpy(dst, storage_, vec_len);
268 memcpy(dst, storage_, len);
/art/runtime/
H A Dmonitor_android.cc37 static char* EventLogWriteInt(char* dst, int value) { argument
38 *dst++ = EVENT_TYPE_INT;
39 Set4LE(reinterpret_cast<uint8_t*>(dst), value);
40 return dst + 4;
43 static char* EventLogWriteString(char* dst, const char* value, size_t len) { argument
44 *dst++ = EVENT_TYPE_STRING;
46 Set4LE(reinterpret_cast<uint8_t*>(dst), len);
47 dst += 4;
48 memcpy(dst, value, len);
49 return dst
[all...]
H A Dreflection-inl.h33 const JValue& src, JValue* dst) {
36 dst->SetJ(src.GetJ());
47 dst->SetS(src.GetI());
54 dst->SetI(src.GetI());
61 dst->SetJ(src.GetI());
68 dst->SetF(src.GetI());
71 dst->SetF(src.GetJ());
78 dst->SetD(src.GetI());
81 dst->SetD(src.GetJ());
84 dst
31 ConvertPrimitiveValue(bool unbox_for_result, Primitive::Type srcType, Primitive::Type dstType, const JValue& src, JValue* dst) argument
[all...]
H A Ddex2oat_environment_test.h108 static void Copy(const std::string& src, const std::string& dst) { argument
110 std::ofstream dst_stream(dst, std::ios::binary);
/art/runtime/jdwp/
H A Djdwp_bits.h100 static inline void Write1BE(uint8_t** dst, uint8_t value) { argument
101 Set1(*dst, value);
102 *dst += sizeof(value);
105 static inline void Write2BE(uint8_t** dst, uint16_t value) { argument
106 Set2BE(*dst, value);
107 *dst += sizeof(value);
110 static inline void Write4BE(uint8_t** dst, uint32_t value) { argument
111 Set4BE(*dst, value);
112 *dst += sizeof(value);
115 static inline void Write8BE(uint8_t** dst, uint64_ argument
[all...]
/art/compiler/debug/
H A Delf_gnu_debugdata_writer.h34 static void XzCompress(const std::vector<uint8_t>* src, std::vector<uint8_t>* dst) { argument
73 callbacks.dst_ = dst;
/art/runtime/verifier/
H A Dregister_line.h358 void CopyRegToLockDepth(size_t dst, size_t src) { argument
361 reg_to_lock_depths_.Put(dst, it->second);
/art/runtime/interpreter/
H A Dinterpreter_goto_table_impl.cc377 uint32_t dst = inst->VRegA_11n(inst_data); local
379 shadow_frame.SetVReg(dst, val);
381 shadow_frame.SetVRegReference(dst, nullptr);
388 uint32_t dst = inst->VRegA_21s(inst_data); local
390 shadow_frame.SetVReg(dst, val);
392 shadow_frame.SetVRegReference(dst, nullptr);
399 uint32_t dst = inst->VRegA_31i(inst_data); local
401 shadow_frame.SetVReg(dst, val);
403 shadow_frame.SetVRegReference(dst, nullptr);
410 uint32_t dst local
[all...]
H A Dinterpreter_switch_impl.cc319 uint4_t dst = inst->VRegA_11n(inst_data); local
321 shadow_frame.SetVReg(dst, val);
323 shadow_frame.SetVRegReference(dst, nullptr);
330 uint8_t dst = inst->VRegA_21s(inst_data); local
332 shadow_frame.SetVReg(dst, val);
334 shadow_frame.SetVRegReference(dst, nullptr);
341 uint8_t dst = inst->VRegA_31i(inst_data); local
343 shadow_frame.SetVReg(dst, val);
345 shadow_frame.SetVRegReference(dst, nullptr);
352 uint8_t dst local
[all...]
H A Dunstarted_runtime.cc563 mirror::PrimitiveArray<T>* dst = down_cast<mirror::PrimitiveArray<T>*>(dst_array); local
567 dst->Set(dst_pos + i, src->Get(src_pos + i));
571 dst->Set(dst_pos + length - i, src->Get(src_pos + length - i));
591 AbortTransactionOrFail(self, "dst is null in arraycopy.");
608 "src.length=%d srcPos=%d dst.length=%d dstPos=%d length=%d",
630 mirror::ObjectArray<mirror::Object>* dst = dst_array->AsObjectArray<mirror::Object>(); local
631 if (src == dst) {
637 dst->Set(dst_pos + i, src->Get(src_pos + i));
641 dst->Set(dst_pos + length - i, src->Get(src_pos + length - i));
649 dst
[all...]
/art/runtime/native/
H A Dlibcore_util_CharsetUtils.cc122 jchar* dst = &chars[0]; local
126 *dst++ = (ch <= 0x7f) ? ch : REPLACEMENT_CHAR;
142 jchar* dst = &chars[0]; local
144 *dst++ = static_cast<jchar>(*src++ & 0xff);
169 jbyte* dst = &bytes[0]; local
175 *dst++ = static_cast<jbyte>(ch);
H A Dsun_misc_Unsafe.cc291 jlong dst, jlong size) {
301 memcpy(reinterpret_cast<void *>(dst), reinterpret_cast<void *>(src), sz);
322 T* dst = reinterpret_cast<T*>(dstAddr); local
326 *(dst + i) = array->Get(i + of);
346 mirror::Object* dst = soa.Decode<mirror::Object*>(dstObj); local
347 mirror::Class* component_type = dst->GetClass()->GetComponentType();
349 copyToArray(srcAddr, dst->AsByteSizedArray(), dst_offset, sz);
351 copyToArray(srcAddr, dst->AsShortSizedArray(), dst_offset, sz);
353 copyToArray(srcAddr, dst->AsIntArray(), dst_offset, sz);
355 copyToArray(srcAddr, dst
290 Unsafe_copyMemory(JNIEnv *env, jobject unsafe ATTRIBUTE_UNUSED, jlong src, jlong dst, jlong size) argument
[all...]
/art/compiler/
H A Dimage_writer.h351 uint8_t* dst = image_info.image_->Begin() + offset; local
352 return reinterpret_cast<mirror::Object*>(dst);
420 void FixupPointerArray(mirror::Object* dst,
H A Dimage_writer.cc1854 void ImageWriter::FixupPointerArray(mirror::Object* dst, mirror::PointerArray* arr, argument
1860 dst->SetClass(GetImageAddress(arr->GetClass()));
1861 auto* dest_array = down_cast<mirror::PointerArray*>(dst);
1896 auto* dst = reinterpret_cast<Object*>(image_info.image_->Begin() + offset); local
1900 image_info.image_bitmap_->Set(dst); // Mark the obj as live.
1904 memcpy(dst, src, n);
1909 dst->SetLockWord(it != saved_hashcode_map_.end() ?
1911 FixupObject(obj, dst);
/art/compiler/utils/arm64/
H A Dassembler_arm64.cc293 Arm64ManagedRegister dst = m_dst.AsArm64(); local
294 CHECK(dst.IsXRegister()) << dst;
295 LoadWFromOffset(kLoadWord, dst.AsOverlappingWRegister(), SP, offs.Int32Value());
300 Arm64ManagedRegister dst = m_dst.AsArm64(); local
302 CHECK(dst.IsXRegister() && base.IsXRegister());
303 LoadWFromOffset(kLoadWord, dst.AsOverlappingWRegister(), base.AsXRegister(),
306 WRegister ref_reg = dst.AsOverlappingWRegister();
312 Arm64ManagedRegister dst = m_dst.AsArm64(); local
314 CHECK(dst
322 Arm64ManagedRegister dst = m_dst.AsArm64(); local
329 Arm64ManagedRegister dst = m_dst.AsArm64(); local
[all...]
/art/runtime/gc/
H A Dheap.h438 ALWAYS_INLINE void WriteBarrierField(const mirror::Object* dst, argument
441 card_table_->MarkCard(dst);
445 ALWAYS_INLINE void WriteBarrierArray(const mirror::Object* dst, argument
449 card_table_->MarkCard(dst);
/art/compiler/optimizing/
H A Dcode_generator_mips64.cc1066 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local
1081 __ Andi(dst, lhs, rhs_imm);
1083 __ And(dst, lhs, rhs_reg);
1086 __ Ori(dst, lhs, rhs_imm);
1088 __ Or(dst, lhs, rhs_reg);
1091 __ Xori(dst, lhs, rhs_imm);
1093 __ Xor(dst, lhs, rhs_reg);
1097 __ Addiu(dst, lhs, rhs_imm);
1099 __ Addu(dst, lhs, rhs_reg);
1102 __ Daddiu(dst, lh
1124 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local
1173 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local
1810 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local
2125 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local
2244 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local
2760 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local
2764 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local
3351 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local
3362 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local
3404 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local
3414 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local
3494 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local
3869 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local
3910 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local
3929 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local
4013 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local
[all...]
H A Dintrinsics_arm64.cc379 Register dst = RegisterFrom(instr->GetLocations()->Out(), type); local
385 __ Fmov(dst, fpr);
1674 // void getCharsNoCheck(int srcBegin, int srcEnd, char[] dst, int dstBegin);
1694 // dst to be copied.
1752 // arraycopy(char[] src, int src_pos, char[] dst, int dst_pos, int length).
1815 const Register& dst,
1837 __ Add(dst_base, dst, element_size * constant + data_offset);
1839 __ Add(dst_base, dst, data_offset);
1856 Register dst = XRegisterFrom(locations->InAt(2)); local
1865 __ Cmp(src, dst);
1811 GenSystemArrayCopyAddresses(vixl::MacroAssembler* masm, Primitive::Type type, const Register& src, const Location& src_pos, const Register& dst, const Location& dst_pos, const Location& copy_length, const Register& src_base, const Register& dst_base, const Register& src_end) argument
[all...]
H A Dintrinsics_x86.cc1605 // public void getChars(int srcBegin, int srcEnd, char[] dst, int dstBegin);
1632 // public void getChars(int srcBegin, int srcEnd, char[] dst, int dstBegin);
1638 Register dst = locations->InAt(3).AsRegister<Register>(); local
1646 __ leal(EDI, Address(dst, dstBegin, ScaleFactor::TIMES_2, data_offset));
H A Dintrinsics_x86_64.cc1709 // public void getChars(int srcBegin, int srcEnd, char[] dst, int dstBegin);
1735 // public void getChars(int srcBegin, int srcEnd, char[] dst, int dstBegin);
1741 CpuRegister dst = locations->InAt(3).AsRegister<CpuRegister>(); local
1749 __ leaq(CpuRegister(RDI), Address(dst, dstBegin, ScaleFactor::TIMES_2, data_offset));
/art/compiler/utils/x86/
H A Dassembler_x86.cc106 void X86Assembler::movl(Register dst, const Immediate& imm) { argument
108 EmitUint8(0xB8 + dst);
113 void X86Assembler::movl(Register dst, Register src) { argument
116 EmitRegisterOperand(src, dst);
120 void X86Assembler::movl(Register dst, const Address& src) { argument
123 EmitOperand(dst, src);
127 void X86Assembler::movl(const Address& dst, Register src) { argument
130 EmitOperand(src, dst);
134 void X86Assembler::movl(const Address& dst, const Immediate& imm) { argument
137 EmitOperand(0, dst);
141 movl(const Address& dst, Label* lbl) argument
148 movntl(const Address& dst, Register src) argument
155 bswapl(Register dst) argument
161 bsfl(Register dst, Register src) argument
168 bsfl(Register dst, const Address& src) argument
175 bsrl(Register dst, Register src) argument
182 bsrl(Register dst, const Address& src) argument
189 popcntl(Register dst, Register src) argument
197 popcntl(Register dst, const Address& src) argument
205 movzxb(Register dst, ByteRegister src) argument
213 movzxb(Register dst, const Address& src) argument
221 movsxb(Register dst, ByteRegister src) argument
229 movsxb(Register dst, const Address& src) argument
242 movb(const Address& dst, ByteRegister src) argument
249 movb(const Address& dst, const Immediate& imm) argument
258 movzxw(Register dst, Register src) argument
266 movzxw(Register dst, const Address& src) argument
274 movsxw(Register dst, Register src) argument
282 movsxw(Register dst, const Address& src) argument
295 movw(const Address& dst, Register src) argument
303 movw(const Address& dst, const Immediate& imm) argument
314 leal(Register dst, const Address& src) argument
321 cmovl(Condition condition, Register dst, Register src) argument
329 cmovl(Condition condition, Register dst, const Address& src) argument
337 setb(Condition condition, Register dst) argument
345 movaps(XmmRegister dst, XmmRegister src) argument
353 movss(XmmRegister dst, const Address& src) argument
362 movss(const Address& dst, XmmRegister src) argument
371 movss(XmmRegister dst, XmmRegister src) argument
380 movd(XmmRegister dst, Register src) argument
389 movd(Register dst, XmmRegister src) argument
398 addss(XmmRegister dst, XmmRegister src) argument
407 addss(XmmRegister dst, const Address& src) argument
416 subss(XmmRegister dst, XmmRegister src) argument
425 subss(XmmRegister dst, const Address& src) argument
434 mulss(XmmRegister dst, XmmRegister src) argument
443 mulss(XmmRegister dst, const Address& src) argument
452 divss(XmmRegister dst, XmmRegister src) argument
461 divss(XmmRegister dst, const Address& src) argument
477 fsts(const Address& dst) argument
484 fstps(const Address& dst) argument
491 movsd(XmmRegister dst, const Address& src) argument
500 movsd(const Address& dst, XmmRegister src) argument
509 movsd(XmmRegister dst, XmmRegister src) argument
518 movhpd(XmmRegister dst, const Address& src) argument
527 movhpd(const Address& dst, XmmRegister src) argument
560 punpckldq(XmmRegister dst, XmmRegister src) argument
569 addsd(XmmRegister dst, XmmRegister src) argument
578 addsd(XmmRegister dst, const Address& src) argument
587 subsd(XmmRegister dst, XmmRegister src) argument
596 subsd(XmmRegister dst, const Address& src) argument
605 mulsd(XmmRegister dst, XmmRegister src) argument
614 mulsd(XmmRegister dst, const Address& src) argument
623 divsd(XmmRegister dst, XmmRegister src) argument
632 divsd(XmmRegister dst, const Address& src) argument
641 cvtsi2ss(XmmRegister dst, Register src) argument
650 cvtsi2sd(XmmRegister dst, Register src) argument
659 cvtss2si(Register dst, XmmRegister src) argument
668 cvtss2sd(XmmRegister dst, XmmRegister src) argument
677 cvtsd2si(Register dst, XmmRegister src) argument
686 cvttss2si(Register dst, XmmRegister src) argument
695 cvttsd2si(Register dst, XmmRegister src) argument
704 cvtsd2ss(XmmRegister dst, XmmRegister src) argument
713 cvtdq2pd(XmmRegister dst, XmmRegister src) argument
773 roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
784 roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
795 sqrtsd(XmmRegister dst, XmmRegister src) argument
804 sqrtss(XmmRegister dst, XmmRegister src) argument
813 xorpd(XmmRegister dst, const Address& src) argument
822 xorpd(XmmRegister dst, XmmRegister src) argument
831 andps(XmmRegister dst, XmmRegister src) argument
839 andpd(XmmRegister dst, XmmRegister src) argument
848 orpd(XmmRegister dst, XmmRegister src) argument
857 xorps(XmmRegister dst, const Address& src) argument
865 orps(XmmRegister dst, XmmRegister src) argument
873 xorps(XmmRegister dst, XmmRegister src) argument
881 andps(XmmRegister dst, const Address& src) argument
889 andpd(XmmRegister dst, const Address& src) argument
905 fstl(const Address& dst) argument
912 fstpl(const Address& dst) argument
927 fnstcw(const Address& dst) argument
941 fistpl(const Address& dst) argument
948 fistps(const Address& dst) argument
1019 xchgl(Register dst, Register src) argument
1060 addl(Register dst, Register src) argument
1126 andl(Register dst, Register src) argument
1140 andl(Register dst, const Immediate& imm) argument
1146 orl(Register dst, Register src) argument
1160 orl(Register dst, const Immediate& imm) argument
1166 xorl(Register dst, Register src) argument
1180 xorl(Register dst, const Immediate& imm) argument
1211 adcl(Register dst, Register src) argument
1218 adcl(Register dst, const Address& address) argument
1225 subl(Register dst, Register src) argument
1265 imull(Register dst, Register src) argument
1273 imull(Register dst, Register src, const Immediate& imm) argument
1332 sbbl(Register dst, Register src) argument
1345 sbbl(Register dst, const Address& address) argument
1445 shld(Register dst, Register src, Register shifter) argument
1454 shld(Register dst, Register src, const Immediate& imm) argument
1463 shrd(Register dst, Register src, Register shifter) argument
1472 shrd(Register dst, Register src, const Immediate& imm) argument
1763 LoadLongConstant(XmmRegister dst, int64_t value) argument
1772 LoadDoubleConstant(XmmRegister dst, double value) argument
[all...]
/art/compiler/utils/x86_64/
H A Dassembler_x86_64.cc106 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) { argument
110 EmitRex64(dst);
112 EmitRegisterOperand(0, dst.LowBits());
115 EmitRex64(dst);
116 EmitUint8(0xB8 + dst.LowBits());
122 void X86_64Assembler::movl(CpuRegister dst, const Immediate& imm) { argument
125 EmitOptionalRex32(dst);
126 EmitUint8(0xB8 + dst.LowBits());
131 void X86_64Assembler::movq(const Address& dst, const Immediate& imm) { argument
134 EmitRex64(dst);
141 movq(CpuRegister dst, CpuRegister src) argument
150 movl(CpuRegister dst, CpuRegister src) argument
158 movq(CpuRegister dst, const Address& src) argument
166 movl(CpuRegister dst, const Address& src) argument
174 movq(const Address& dst, CpuRegister src) argument
182 movl(const Address& dst, CpuRegister src) argument
189 movl(const Address& dst, const Immediate& imm) argument
197 movntl(const Address& dst, CpuRegister src) argument
205 movntq(const Address& dst, CpuRegister src) argument
213 cmov(Condition c, CpuRegister dst, CpuRegister src) argument
217 cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) argument
226 cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit) argument
239 movzxb(CpuRegister dst, CpuRegister src) argument
248 movzxb(CpuRegister dst, const Address& src) argument
259 movsxb(CpuRegister dst, CpuRegister src) argument
268 movsxb(CpuRegister dst, const Address& src) argument
284 movb(const Address& dst, CpuRegister src) argument
292 movb(const Address& dst, const Immediate& imm) argument
302 movzxw(CpuRegister dst, CpuRegister src) argument
311 movzxw(CpuRegister dst, const Address& src) argument
320 movsxw(CpuRegister dst, CpuRegister src) argument
329 movsxw(CpuRegister dst, const Address& src) argument
343 movw(const Address& dst, CpuRegister src) argument
352 movw(const Address& dst, const Immediate& imm) argument
364 leaq(CpuRegister dst, const Address& src) argument
372 leal(CpuRegister dst, const Address& src) argument
380 movaps(XmmRegister dst, XmmRegister src) argument
389 movss(XmmRegister dst, const Address& src) argument
399 movss(const Address& dst, XmmRegister src) argument
409 movss(XmmRegister dst, XmmRegister src) argument
419 movsxd(CpuRegister dst, CpuRegister src) argument
427 movsxd(CpuRegister dst, const Address& src) argument
435 movd(XmmRegister dst, CpuRegister src) argument
439 movd(CpuRegister dst, XmmRegister src) argument
443 movd(XmmRegister dst, CpuRegister src, bool is64bit) argument
452 movd(CpuRegister dst, XmmRegister src, bool is64bit) argument
462 addss(XmmRegister dst, XmmRegister src) argument
472 addss(XmmRegister dst, const Address& src) argument
482 subss(XmmRegister dst, XmmRegister src) argument
492 subss(XmmRegister dst, const Address& src) argument
502 mulss(XmmRegister dst, XmmRegister src) argument
512 mulss(XmmRegister dst, const Address& src) argument
522 divss(XmmRegister dst, XmmRegister src) argument
532 divss(XmmRegister dst, const Address& src) argument
549 fsts(const Address& dst) argument
556 fstps(const Address& dst) argument
563 movsd(XmmRegister dst, const Address& src) argument
573 movsd(const Address& dst, XmmRegister src) argument
583 movsd(XmmRegister dst, XmmRegister src) argument
593 addsd(XmmRegister dst, XmmRegister src) argument
603 addsd(XmmRegister dst, const Address& src) argument
613 subsd(XmmRegister dst, XmmRegister src) argument
623 subsd(XmmRegister dst, const Address& src) argument
633 mulsd(XmmRegister dst, XmmRegister src) argument
643 mulsd(XmmRegister dst, const Address& src) argument
653 divsd(XmmRegister dst, XmmRegister src) argument
663 divsd(XmmRegister dst, const Address& src) argument
673 cvtsi2ss(XmmRegister dst, CpuRegister src) argument
678 cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit) argument
693 cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit) argument
708 cvtsi2sd(XmmRegister dst, CpuRegister src) argument
713 cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit) argument
728 cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit) argument
743 cvtss2si(CpuRegister dst, XmmRegister src) argument
753 cvtss2sd(XmmRegister dst, XmmRegister src) argument
763 cvtss2sd(XmmRegister dst, const Address& src) argument
773 cvtsd2si(CpuRegister dst, XmmRegister src) argument
783 cvttss2si(CpuRegister dst, XmmRegister src) argument
788 cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit) argument
803 cvttsd2si(CpuRegister dst, XmmRegister src) argument
808 cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit) argument
823 cvtsd2ss(XmmRegister dst, XmmRegister src) argument
833 cvtsd2ss(XmmRegister dst, const Address& src) argument
843 cvtdq2pd(XmmRegister dst, XmmRegister src) argument
929 roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
941 roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
953 sqrtsd(XmmRegister dst, XmmRegister src) argument
963 sqrtss(XmmRegister dst, XmmRegister src) argument
973 xorpd(XmmRegister dst, const Address& src) argument
983 xorpd(XmmRegister dst, XmmRegister src) argument
993 xorps(XmmRegister dst, const Address& src) argument
1002 xorps(XmmRegister dst, XmmRegister src) argument
1011 andpd(XmmRegister dst, const Address& src) argument
1020 andpd(XmmRegister dst, XmmRegister src) argument
1029 andps(XmmRegister dst, XmmRegister src) argument
1037 orpd(XmmRegister dst, XmmRegister src) argument
1046 orps(XmmRegister dst, XmmRegister src) argument
1061 fstl(const Address& dst) argument
1068 fstpl(const Address& dst) argument
1083 fnstcw(const Address& dst) argument
1097 fistpl(const Address& dst) argument
1104 fistps(const Address& dst) argument
1174 xchgl(CpuRegister dst, CpuRegister src) argument
1194 xchgq(CpuRegister dst, CpuRegister src) argument
1308 addl(CpuRegister dst, CpuRegister src) argument
1382 andl(CpuRegister dst, CpuRegister src) argument
1398 andl(CpuRegister dst, const Immediate& imm) argument
1413 andq(CpuRegister dst, CpuRegister src) argument
1421 andq(CpuRegister dst, const Address& src) argument
1429 orl(CpuRegister dst, CpuRegister src) argument
1445 orl(CpuRegister dst, const Immediate& imm) argument
1452 orq(CpuRegister dst, const Immediate& imm) argument
1460 orq(CpuRegister dst, CpuRegister src) argument
1468 orq(CpuRegister dst, const Address& src) argument
1476 xorl(CpuRegister dst, CpuRegister src) argument
1492 xorl(CpuRegister dst, const Immediate& imm) argument
1499 xorq(CpuRegister dst, CpuRegister src) argument
1507 xorq(CpuRegister dst, const Immediate& imm) argument
1514 xorq(CpuRegister dst, const Address& src) argument
1590 addq(CpuRegister dst, const Address& address) argument
1598 addq(CpuRegister dst, CpuRegister src) argument
1622 subl(CpuRegister dst, CpuRegister src) argument
1645 subq(CpuRegister dst, CpuRegister src) argument
1698 imull(CpuRegister dst, CpuRegister src) argument
1706 imull(CpuRegister dst, CpuRegister src, const Immediate& imm) argument
1742 imulq(CpuRegister dst, CpuRegister src) argument
1755 imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm) argument
2174 setcc(Condition condition, CpuRegister dst) argument
2185 bswapl(CpuRegister dst) argument
2192 bswapq(CpuRegister dst) argument
2199 bsfl(CpuRegister dst, CpuRegister src) argument
2207 bsfl(CpuRegister dst, const Address& src) argument
2215 bsfq(CpuRegister dst, CpuRegister src) argument
2223 bsfq(CpuRegister dst, const Address& src) argument
2231 bsrl(CpuRegister dst, CpuRegister src) argument
2239 bsrl(CpuRegister dst, const Address& src) argument
2247 bsrq(CpuRegister dst, CpuRegister src) argument
2255 bsrq(CpuRegister dst, const Address& src) argument
2263 popcntl(CpuRegister dst, CpuRegister src) argument
2272 popcntl(CpuRegister dst, const Address& src) argument
2281 popcntq(CpuRegister dst, CpuRegister src) argument
2290 popcntq(CpuRegister dst, const Address& src) argument
2330 LoadDoubleConstant(XmmRegister dst, double value) argument
2526 EmitOptionalRex32(CpuRegister dst, CpuRegister src) argument
2530 EmitOptionalRex32(XmmRegister dst, XmmRegister src) argument
2534 EmitOptionalRex32(CpuRegister dst, XmmRegister src) argument
2538 EmitOptionalRex32(XmmRegister dst, CpuRegister src) argument
2549 EmitOptionalRex32(CpuRegister dst, const Operand& operand) argument
2559 EmitOptionalRex32(XmmRegister dst, const Operand& operand) argument
2583 EmitRex64(CpuRegister dst, CpuRegister src) argument
2587 EmitRex64(XmmRegister dst, CpuRegister src) argument
2591 EmitRex64(CpuRegister dst, XmmRegister src) argument
2595 EmitRex64(CpuRegister dst, const Operand& operand) argument
2603 EmitRex64(XmmRegister dst, const Operand& operand) argument
2611 EmitOptionalByteRegNormalizingRex32(CpuRegister dst, CpuRegister src) argument
2617 EmitOptionalByteRegNormalizingRex32(CpuRegister dst, const Operand& operand) argument
[all...]
/art/compiler/jni/
H A Djni_compiler_test.cc844 void my_arraycopy(JNIEnv* env, jclass klass, jobject src, jint src_pos, jobject dst, jint dst_pos, jint length) { argument
846 EXPECT_TRUE(env->IsSameObject(JniCompilerTest::jklass_, dst));

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