| /external/libunwind_llvm/src/ |
| H A D | libunwind.cpp | 159 _LIBUNWIND_EXPORT int unw_get_reg(unw_cursor_t *cursor, unw_regnum_t regNum, argument
161 _LIBUNWIND_TRACE_API("unw_get_reg(cursor=%p, regNum=%d, &value=%p)\n",
162 static_cast<void *>(cursor), regNum,
165 if (co->validReg(regNum)) {
166 *value = co->getReg(regNum);
174 _LIBUNWIND_EXPORT int unw_set_reg(unw_cursor_t *cursor, unw_regnum_t regNum, argument
176 _LIBUNWIND_TRACE_API("unw_set_reg(cursor=%p, regNum=%d, value=0x%llX)\n",
177 static_cast<void *>(cursor), regNum, (long long)value);
180 if (co->validReg(regNum)) {
181 co->setReg(regNum, (pint_
193 unw_get_fpreg(unw_cursor_t *cursor, unw_regnum_t regNum, unw_fpreg_t *value) argument
208 unw_set_fpreg(unw_cursor_t *cursor, unw_regnum_t regNum, unw_fpreg_t value) argument
272 unw_is_fpreg(unw_cursor_t *cursor, unw_regnum_t regNum) argument
281 unw_regname(unw_cursor_t *cursor, unw_regnum_t regNum) argument
[all...] |
| H A D | Registers.hpp | 99 inline bool Registers_x86::validRegister(int regNum) const {
100 if (regNum == UNW_REG_IP)
102 if (regNum == UNW_REG_SP)
104 if (regNum < 0)
106 if (regNum > 7)
111 inline uint32_t Registers_x86::getRegister(int regNum) const {
112 switch (regNum) {
137 inline void Registers_x86::setRegister(int regNum, uint32_t value) { argument
138 switch (regNum) {
173 inline const char *Registers_x86::getRegisterName(int regNum) { argument
345 setRegister(int regNum, uint64_t value) argument
405 getRegisterName(int regNum) argument
686 setRegister(int regNum, uint32_t value) argument
862 setFloatRegister(int regNum, double value) argument
881 setVectorRegister(int regNum, v128 value) argument
886 getRegisterName(int regNum) argument
1114 setRegister(int regNum, uint64_t value) argument
1125 getRegisterName(int regNum) argument
1277 setFloatRegister(int regNum, double value) argument
1436 getRegister(int regNum) argument
1455 setRegister(int regNum, uint32_t value) argument
1474 getRegisterName(int regNum) argument
1650 getFloatRegister(int regNum) argument
1677 setFloatRegister(int regNum, unw_fpreg_t value) argument
[all...] |
| H A D | UnwindCursor.hpp | 589 bool UnwindCursor<A, R>::validReg(int regNum) { argument
590 return _registers.validRegister(regNum);
594 unw_word_t UnwindCursor<A, R>::getReg(int regNum) { argument
595 return _registers.getRegister(regNum);
599 void UnwindCursor<A, R>::setReg(int regNum, unw_word_t value) { argument
600 _registers.setRegister(regNum, (typename A::pint_t)value);
604 bool UnwindCursor<A, R>::validFloatReg(int regNum) { argument
605 return _registers.validFloatRegister(regNum);
609 unw_fpreg_t UnwindCursor<A, R>::getFloatReg(int regNum) { argument
610 return _registers.getFloatRegister(regNum);
614 setFloatReg(int regNum, unw_fpreg_t value) argument
629 getRegisterName(int regNum) argument
[all...] |
| /external/mesa3d/src/mesa/program/ |
| H A D | nvvertparse.c | 352 Parse_AbsParamReg(struct parse_state *parseState, GLint *regNum) argument
370 *regNum = reg;
|
| H A D | nvfragparse.c | 740 Parse_DummyReg(struct parse_state *parseState, GLint *regNum) argument
743 *regNum = 0;
746 *regNum = 1;
760 Parse_ProgramParamReg(struct parse_state *parseState, GLint *regNum) argument
775 *regNum = reg;
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDILCFGStructurizer.cpp | 2437 void CFGStructurizer<PassT>::addLoopBreakOnReg(LoopT *loopRep, RegiT regNum) { argument
2444 theEntry->breakOnRegs.insert(regNum);
2449 << " regNum = " << regNum << "\n";
2454 void CFGStructurizer<PassT>::addLoopContOnReg(LoopT *loopRep, RegiT regNum) { argument
2460 theEntry->contOnRegs.insert(regNum);
2465 << " regNum = " << regNum << "\n";
2470 void CFGStructurizer<PassT>::addLoopBreakInitReg(LoopT *loopRep, RegiT regNum) { argument
2476 theEntry->breakInitRegs.insert(regNum);
2486 addLoopContInitReg(LoopT *loopRep, RegiT regNum) argument
2502 addLoopEndbranchInitReg(LoopT *loopRep, RegiT regNum) argument
3082 insertCondBranchBefore(MachineBasicBlock *blk, MachineBasicBlock::iterator insertPos, int newOpcode, AMDGPUCFGStructurizer *passRep, RegiT regNum, DebugLoc DL) argument
3100 insertCondBranchEnd(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep, RegiT regNum) argument
3115 insertAssignInstrBefore(MachineBasicBlock::iterator instrPos, AMDGPUCFGStructurizer *passRep, RegiT regNum, int regVal) argument
3129 insertAssignInstrBefore(MachineBasicBlock *blk, AMDGPUCFGStructurizer *passRep, RegiT regNum, int regVal) argument
[all...] |