| /external/e2fsprogs/lib/ss/ |
| H A D | request_tbl.c | 54 register ssrt **rt1, **rt2; local
59 for (rt2 = rt1; *rt1; rt1++) {
61 *rt2++ = *rt1;
65 *rt2 = (ssrt *)NULL;
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| /external/libnl/lib/route/ |
| H A D | neightbl.c | 257 char rt[32], rt2[32]; local
262 nl_msec2str(pa->ntp_retrans_time, rt2, sizeof(rt2)));
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| /external/v8/src/arm64/ |
| H A D | assembler-arm64-inl.h | 909 const CPURegister& rt2) {
910 DCHECK(AreSameSizeAndType(rt, rt2));
911 USE(rt2);
933 const CPURegister& rt2) {
934 DCHECK(AreSameSizeAndType(rt, rt2));
935 USE(rt2);
908 LoadPairOpFor(const CPURegister& rt, const CPURegister& rt2) argument
932 StorePairOpFor(const CPURegister& rt, const CPURegister& rt2) argument
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| H A D | assembler-arm64.cc | 1575 const CPURegister& rt2,
1577 LoadStorePair(rt, rt2, src, LoadPairOpFor(rt, rt2));
1582 const CPURegister& rt2,
1584 LoadStorePair(rt, rt2, dst, StorePairOpFor(rt, rt2));
1589 const Register& rt2,
1592 LoadStorePair(rt, rt2, src, LDPSW_x);
1597 const CPURegister& rt2,
1600 // 'rt' and 'rt2' ca
1574 ldp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& src) argument
1581 stp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& dst) argument
1588 ldpsw(const Register& rt, const Register& rt2, const MemOperand& src) argument
1596 LoadStorePair(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairOp op) argument
[all...] |
| H A D | simulator-arm64.cc | 1721 unsigned rt2 = instr->Rt2(); local
1747 // 'rt' and 'rt2' can only be aliased for stores.
1748 DCHECK(((op & LoadStorePairLBit) == 0) || (rt != rt2));
1756 set_wreg_no_log(rt2, MemoryRead<uint32_t>(address2));
1762 set_sreg_no_log(rt2, MemoryRead<float>(address2));
1768 set_xreg_no_log(rt2, MemoryRead<uint64_t>(address2));
1774 set_dreg_no_log(rt2, MemoryRead<double>(address2));
1780 set_xreg_no_log(rt2, MemoryRead<int32_t>(address2));
1786 MemoryWrite<uint32_t>(address2, wreg(rt2));
1792 MemoryWrite<float>(address2, sreg(rt2));
[all...] |
| H A D | macro-assembler-arm64.cc | 594 const CPURegister& rt2,
607 LoadStorePair(rt, rt2, addr, op);
614 LoadStorePair(rt, rt2, MemOperand(temp), op);
616 LoadStorePair(rt, rt2, MemOperand(base), op);
621 LoadStorePair(rt, rt2, MemOperand(base), op);
593 LoadStorePairMacro(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairOp op) argument
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| /external/vixl/src/vixl/a64/ |
| H A D | macro-assembler-a64.cc | 1566 const CPURegister& rt2,
1584 LoadStorePair(rt, rt2, addr, op);
1591 LoadStorePair(rt, rt2, MemOperand(temp), op);
1593 LoadStorePair(rt, rt2, MemOperand(base), op);
1598 LoadStorePair(rt, rt2, MemOperand(base), op);
1565 LoadStorePairMacro(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairOp op) argument
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| H A D | macro-assembler-a64.h | 53 V(Ldp, CPURegister&, rt, rt2, LoadPairOpFor(rt, rt2)) \
54 V(Stp, CPURegister&, rt, rt2, StorePairOpFor(rt, rt2)) \
55 V(Ldpsw, CPURegister&, rt, rt2, LDPSW_x)
747 const CPURegister& rt2,
1434 void Ldaxp(const Register& rt, const Register& rt2, const MemOperand& src) { argument
1436 VIXL_ASSERT(!rt.Aliases(rt2));
1438 ldaxp(rt, rt2, src);
1456 const CPURegister& rt2,
1455 Ldnp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& src) argument
1541 Ldxp(const Register& rt, const Register& rt2, const MemOperand& src) argument
1823 Stlxp(const Register& rs, const Register& rt, const Register& rt2, const MemOperand& dst) argument
1855 Stnp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& dst) argument
1862 Stxp(const Register& rs, const Register& rt, const Register& rt2, const MemOperand& dst) argument
[all...] |
| H A D | simulator-a64.cc | 1176 unsigned rt2 = instr->Rt2(); local
1185 // 'rt' and 'rt2' can only be aliased for stores.
1186 VIXL_ASSERT(((op & LoadStorePairLBit) == 0) || (rt != rt2));
1193 set_wreg(rt2, Memory::Read<uint32_t>(address2), NoRegLog);
1198 set_sreg(rt2, Memory::Read<float>(address2), NoRegLog);
1203 set_xreg(rt2, Memory::Read<uint64_t>(address2), NoRegLog);
1208 set_dreg(rt2, Memory::Read<double>(address2), NoRegLog);
1213 set_qreg(rt2, Memory::Read<qreg_t>(address2), NoRegLog);
1218 set_xreg(rt2, Memory::Read<int32_t>(address2), NoRegLog);
1223 Memory::Write<uint32_t>(address2, wreg(rt2));
1296 unsigned rt2 = instr->Rt2(); local
3175 int rt2 = (rt + 1) % kNumberOfVRegisters; local
3184 int rt2 = (rt + 1) % kNumberOfVRegisters; local
3194 int rt2 = (rt + 1) % kNumberOfVRegisters; local
3214 int rt2 = (rt + 1) % kNumberOfVRegisters; local
[all...] |
| /external/webrtc/webrtc/p2p/base/ |
| H A D | p2ptransportchannel_unittest.cc | 184 const std::string& rt2, const std::string& rp2, int wait)
186 local_type2(lt2), local_proto2(lp2), remote_type2(rt2),
181 Result(const std::string& lt, const std::string& lp, const std::string& rt, const std::string& rp, const std::string& lt2, const std::string& lp2, const std::string& rt2, const std::string& rp2, int wait) argument
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