/art/runtime/interpreter/mterp/x86_64/ |
H A D | binopWide2addr.S | 9 $instr # for ex: addq %rax,(rFP,%rcx,4)
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H A D | binopWide.S | 8 $instr # ex: addq (rFP,%rcx,4),%rax
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H A D | footer.S | 286 addq $$FRAME_SIZE, %rsp
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H A D | header.S | 224 addq rIBASE, %rax
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/art/runtime/arch/x86_64/ |
H A D | quick_entrypoints_x86_64.S | 37 addq MACRO_LITERAL(4 * 8), %rsp 132 addq LITERAL(8 + 4*8), %rsp 247 addq MACRO_LITERAL(80 + 4 * 8), %rsp 399 addq MACRO_LITERAL(1), %r10 // shorty++ 406 addq MACRO_LITERAL(4), %r11 // arg_array++ 410 addq MACRO_LITERAL(4), %r11 // arg_array++ 414 addq MACRO_LITERAL(8), %r11 // arg_array+=2 418 addq MACRO_LITERAL(4), %r11 // arg_array++ 430 addq MACRO_LITERAL(1), %r10 // shorty++ 440 addq MACRO_LITERA [all...] |
H A D | jni_entrypoints_x86_64.S | 63 addq LITERAL(72 + 4 * 8), %rsp
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/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.h | 556 void addq(CpuRegister reg, const Immediate& imm); 557 void addq(CpuRegister dst, CpuRegister src); 558 void addq(CpuRegister dst, const Address& address);
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H A D | assembler_x86_64.cc | 1582 void X86_64Assembler::addq(CpuRegister reg, const Immediate& imm) { function in class:art::x86_64::X86_64Assembler 1584 CHECK(imm.is_int32()); // addq only supports 32b immediate. 1590 void X86_64Assembler::addq(CpuRegister dst, const Address& address) { function in class:art::x86_64::X86_64Assembler 1598 void X86_64Assembler::addq(CpuRegister dst, CpuRegister src) { function in class:art::x86_64::X86_64Assembler 1600 // 0x01 is addq r/m64 <- r/m64 + r64, with op1 in r/m and op2 in reg: so reverse EmitRex64 2336 addq(CpuRegister(RSP), Immediate(2 * sizeof(intptr_t))); 2718 addq(CpuRegister(RSP), Immediate(adjust)); 2736 addq(CpuRegister(RSP), Immediate(-static_cast<int64_t>(adjust))); 2742 addq(CpuRegister(RSP), Immediate(adjust)); 2946 addq(CpuRegiste [all...] |
H A D | assembler_x86_64_test.cc | 305 DriverStr(RepeatRR(&x86_64::X86_64Assembler::addq, "addq %{reg2}, %{reg1}"), "addq"); 309 DriverStr(RepeatRI(&x86_64::X86_64Assembler::addq, 4U, "addq ${imm}, %{reg}"), "addqi"); 881 GetAssembler()->addq(x86_64::CpuRegister(x86_64::R12), 883 const char* expected = "addq 0(%R9), %R12\n"; 884 DriverStr(expected, "addq"); 1557 str << "addq $" << displacement << ", %rsp\n"; 1578 str << "addq [all...] |
/art/runtime/interpreter/mterp/out/ |
H A D | mterp_x86_64.S | 231 addq rIBASE, %rax 4004 addq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4021 subq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4038 imulq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4135 andq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4152 orq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4169 xorq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4715 addq %rax, (rFP,%rcx,4) # for ex: addq [all...] |
/art/compiler/optimizing/ |
H A D | code_generator_x86_64.cc | 1102 __ addq(CpuRegister(RSP), Immediate(adjust)); 2877 // We can use a leaq or addq if the constant can fit in an immediate. 2931 __ addq(out.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); 2933 __ addq(out.AsRegister<CpuRegister>(), first.AsRegister<CpuRegister>()); 2944 __ addq(out.AsRegister<CpuRegister>(), Immediate(int32_value)); 3275 __ addq(CpuRegister(RSP), Immediate(2 * elem_size)); 3351 __ addq(rdx, numerator); 3454 __ addq(rdx, numerator); 3468 __ addq(rdx, rax); 6561 __ addq(temp_re [all...] |
H A D | intrinsics_x86_64.cc | 263 __ addq(out, mask); 1563 __ addq(string_obj, Immediate(value_offset));
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