Searched refs:AArch64_AM (Results 1 - 15 of 15) sorted by relevance
/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64AddressingModes.h | 25 /// AArch64_AM - AArch64 Addressing Mode Stuff 26 namespace AArch64_AM { namespace in namespace:llvm 52 static inline const char *getShiftExtendName(AArch64_AM::ShiftExtendType ST) { 55 case AArch64_AM::LSL: return "lsl"; 56 case AArch64_AM::LSR: return "lsr"; 57 case AArch64_AM::ASR: return "asr"; 58 case AArch64_AM::ROR: return "ror"; 59 case AArch64_AM::MSL: return "msl"; 60 case AArch64_AM::UXTB: return "uxtb"; 61 case AArch64_AM [all...] |
H A D | AArch64MCCodeEmitter.cpp | 268 assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && 270 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); 556 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm());
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ExpandPseudoInsts.cpp | 107 if (AArch64_AM::processLogicalImmediate(OrrImm, 64, Encoding)) { 124 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt)); 139 return AArch64_AM::processLogicalImmediate(Chunk, 64, Encoding); 202 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt)); 226 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt)); 358 AArch64_AM::processLogicalImmediate(OrrImm, 64, Encoding); 377 AArch64_AM [all...] |
H A D | AArch64FastISel.cpp | 55 AArch64_AM::ShiftExtendType ExtType; 66 Address() : Kind(RegBase), ExtType(AArch64_AM::InvalidShiftExtend), 70 void setExtendType(AArch64_AM::ShiftExtendType E) { ExtType = E; } 71 AArch64_AM::ShiftExtendType getExtendType() const { return ExtType; } 170 AArch64_AM::ShiftExtendType ShiftType, 175 AArch64_AM::ShiftExtendType ExtType, 202 AArch64_AM::ShiftExtendType ShiftType, uint64_t ShiftImm, 368 Is64Bit ? AArch64_AM::getFP64Imm(Val) : AArch64_AM::getFP32Imm(Val); 666 Addr.setExtendType(AArch64_AM [all...] |
H A D | AArch64ISelDAGToDAG.cpp | 270 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt); 312 static AArch64_AM::ShiftExtendType getShiftTypeForNode(SDValue N) { 315 return AArch64_AM::InvalidShiftExtend; 317 return AArch64_AM::LSL; 319 return AArch64_AM::LSR; 321 return AArch64_AM::ASR; 323 return AArch64_AM::ROR; 343 AArch64_AM::ShiftExtendType ShType = getShiftTypeForNode(N); 344 if (ShType == AArch64_AM [all...] |
H A D | AArch64RegisterInfo.cpp | 330 unsigned Shifter = AArch64_AM::getShifterImm(AArch64_AM::LSL, 0);
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H A D | AArch64InstrInfo.cpp | 475 AArch64_AM::encodeLogicalImmediate(1ull << Cond[3].getImm(), 32)); 480 AArch64_AM::encodeLogicalImmediate(1ull << Cond[3].getImm(), 64)); 540 return AArch64_AM::processLogicalImmediate(UImm, BitSize, Encoding); 697 CmpValue = (AArch64_AM::decodeLogicalImmediate( 1285 AArch64_AM::ShiftExtendType ExtType = AArch64_AM::getMemExtendType(Val); 1286 return (ExtType != AArch64_AM::UXTX) || AArch64_AM::getMemDoShift(Val); 1572 .addImm(AArch64_AM::getShifterImm(AArch64_AM [all...] |
H A D | AArch64ISelLowering.cpp | 4514 return AArch64_AM::getFP64Imm(Imm) != -1; 4516 return AArch64_AM::getFP32Imm(Imm) != -1; 4726 if (AArch64_AM::isLogicalImmediate(CVal, 32)) 4730 if (AArch64_AM::isLogicalImmediate(CVal, 64)) 4742 if (AArch64_AM::isLogicalImmediate(CVal, 32)) 4756 if (AArch64_AM::isLogicalImmediate(CVal, 64)) 5686 if (AArch64_AM::isAdvSIMDModImmType1(CnstVal)) { 5687 CnstVal = AArch64_AM::encodeAdvSIMDModImmType1(CnstVal); 5695 if (AArch64_AM::isAdvSIMDModImmType2(CnstVal)) { 5696 CnstVal = AArch64_AM [all...] |
H A D | AArch64ConditionOptimizer.cpp | 158 unsigned ShiftAmt = AArch64_AM::getShiftValue(I->getOperand(3).getImm());
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H A D | AArch64AsmPrinter.cpp | 520 Add.addOperand(MCOperand::createImm(AArch64_AM::getShiftValue(0)));
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H A D | AArch64TargetTransformInfo.cpp | 28 if (Val == 0 || AArch64_AM::isLogicalImmediate(Val, 64))
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H A D | AArch64LoadStoreOptimizer.cpp | 1057 assert(AArch64_AM::getShiftValue(Update->getOperand(3).getImm()) == 0 && 1119 if (AArch64_AM::getShiftValue(MI->getOperand(3).getImm()))
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/external/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 239 AArch64_AM::ShiftExtendType Type; 422 AArch64_AM::ShiftExtendType getShiftExtendType() const { 666 return AArch64_AM::isLogicalImmediate(Val, 32); 674 return AArch64_AM::isLogicalImmediate(MCE->getValue(), 64); 683 return AArch64_AM::isLogicalImmediate(Val, 32); 691 return AArch64_AM::isLogicalImmediate(~MCE->getValue(), 64); 758 return AArch64_AM::isAdvSIMDModImmType10(MCE->getValue()); 992 AArch64_AM::ShiftExtendType ST = getShiftExtendType(); 993 return (ST == AArch64_AM::LSL || ST == AArch64_AM [all...] |
/external/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.cpp | 982 AArch64_AM::getShiftValue(MI->getOperand(OpNum + 1).getImm()); 1001 O.write_hex(AArch64_AM::decodeLogicalImmediate(Val, 32)); 1009 O.write_hex(AArch64_AM::decodeLogicalImmediate(Val, 64)); 1017 if (AArch64_AM::getShiftType(Val) == AArch64_AM::LSL && 1018 AArch64_AM::getShiftValue(Val) == 0) 1020 O << ", " << AArch64_AM::getShiftExtendName(AArch64_AM::getShiftType(Val)) 1021 << " #" << AArch64_AM::getShiftValue(Val); 1042 AArch64_AM [all...] |
/external/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 1365 if (!AArch64_AM::isValidDecodeLogicalImmediate(imm, 64)) 1374 if (!AArch64_AM::isValidDecodeLogicalImmediate(imm, 32))
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