Searched refs:AddrReg (Results 1 - 11 of 11) sorted by relevance
/external/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsNaClELFStreamer.cpp | 93 void emitMask(unsigned AddrReg, unsigned MaskReg, argument 97 MaskInst.addOperand(MCOperand::createReg(AddrReg)); 98 MaskInst.addOperand(MCOperand::createReg(AddrReg)); 106 unsigned AddrReg = MI.getOperand(0).getReg(); local 109 emitMask(AddrReg, IndirectBranchMaskReg, STI);
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/external/llvm/lib/Target/AMDGPU/ |
H A D | R600InstrInfo.cpp | 1117 unsigned AddrReg; local 1120 case 0: AddrReg = AMDGPU::R600_AddrRegClass.getRegister(Address); break; 1121 case 1: AddrReg = AMDGPU::R600_Addr_YRegClass.getRegister(Address); break; 1122 case 2: AddrReg = AMDGPU::R600_Addr_ZRegClass.getRegister(Address); break; 1123 case 3: AddrReg = AMDGPU::R600_Addr_WRegClass.getRegister(Address); break; 1130 AddrReg, ValueReg) 1149 unsigned AddrReg; local 1152 case 0: AddrReg = AMDGPU::R600_AddrRegClass.getRegister(Address); break; 1153 case 1: AddrReg = AMDGPU::R600_Addr_YRegClass.getRegister(Address); break; 1154 case 2: AddrReg [all...] |
H A D | SILoadStoreOptimizer.cpp | 215 const MachineOperand *AddrReg = TII->getNamedOperand(*I, AMDGPU::OpName::addr); local 251 .addOperand(*AddrReg) // addr 288 LiveInterval &AddrRegLI = LIS->getInterval(AddrReg->getReg());
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H A D | SIInstrInfo.cpp | 214 const MachineOperand *AddrReg = getNamedOperand(*LdSt, local 217 BaseReg = AddrReg->getReg(); 249 const MachineOperand *AddrReg = getNamedOperand(*LdSt, local 251 BaseReg = AddrReg->getReg(); 263 const MachineOperand *AddrReg = getNamedOperand(*LdSt, local 265 if (!AddrReg) 270 BaseReg = AddrReg->getReg();
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.cpp | 656 unsigned AddrReg = MI->getOperand(OpNum++).getReg(); local 657 O << ", [" << getRegisterName(AddrReg) << ']';
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 1752 unsigned AddrReg = getRegForValue(I->getOperand(0)); local 1753 if (AddrReg == 0) 1757 .addReg(AddrReg);
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 2399 unsigned AddrReg = getRegForValue(BI->getOperand(0)); local 2400 if (AddrReg == 0) 2405 AddrReg = constrainOperandRegClass(II, AddrReg, II.getNumDefs()); 2406 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II).addReg(AddrReg);
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1344 unsigned AddrReg = getRegForValue(I->getOperand(0)); local 1345 if (AddrReg == 0) return false; 1349 TII.get(Opc)).addReg(AddrReg));
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/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 3416 unsigned AddrReg = createResultReg(&X86::GR64RegClass); local 3418 AddrReg) 3422 addDirectMem(MIB, AddrReg);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2073 unsigned AddrReg = ABI.IsN64() ? Mips::V0_64 : Mips::V0; local 2075 Chain = DAG.getCopyToReg(Chain, DL, AddrReg, Handler, Chain.getValue(1)); 2078 DAG.getRegister(AddrReg, getPointerTy(MF.getDataLayout())),
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 3115 unsigned AddrReg = MI->getOperand(1).getReg(); local 3136 .addReg(AddrReg).addImm(0); 3185 .addReg(AddrReg).addReg(ValReg).addReg(UpdReg)
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