Searched refs:FP (Results 1 - 25 of 111) sorted by relevance

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/external/clang/test/CodeGen/
H A Dpointer-arithmetic.c10 typedef void (*FP)(void); typedef
18 FP f5(FP a, int b) { return a + b; }
19 FP f5_1(FP a, int b) { return (a += b); }
20 FP f6(int a, FP b) { return a + b; }
21 FP f6_1(int a, FP b) { return (a += b); }
22 FP f
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H A Dstruct-init.c37 void (*FP)(struct fp_struct_bar); member in struct:fp_struct_foo
/external/llvm/lib/Target/Hexagon/
H A DHexagonEarlyIfConv.cpp119 : FP(P), TRI(T) {}
120 const FlowPattern &FP; member in struct:__anon12595::PrintFP
127 OS << "{ SplitB:" << PrintMB(P.FP.SplitB)
128 << ", PredR:" << PrintReg(P.FP.PredR, &P.TRI)
129 << ", TrueB:" << PrintMB(P.FP.TrueB) << ", FalseB:"
130 << PrintMB(P.FP.FalseB)
131 << ", JoinB:" << PrintMB(P.FP.JoinB) << " }";
159 FlowPattern &FP);
167 bool isValid(const FlowPattern &FP) const;
170 bool isProfitable(const FlowPattern &FP) cons
215 matchFlowPattern(MachineBasicBlock *B, MachineLoop *L, FlowPattern &FP) argument
775 updatePhiNodes(MachineBasicBlock *WhereB, const FlowPattern &FP) argument
825 convert(const FlowPattern &FP) argument
1012 simplifyFlowGraph(const FlowPattern &FP) argument
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H A DHexagonExpandPredSpillCode.cpp244 unsigned FP = MI->getOperand(0).getReg(); local
245 assert(FP == QST.getRegisterInfo()->getFrameRegister() &&
259 .addReg(FP).addReg(HEXAGON_RESERVED_REG_1);
268 HEXAGON_RESERVED_REG_1).addReg(FP).addImm(Offset);
282 addReg(FP).addImm(Offset).addReg(HEXAGON_RESERVED_REG_2);
291 unsigned FP = MI->getOperand(1).getReg(); local
292 assert(FP == QST.getRegisterInfo()->getFrameRegister() &&
303 .addReg(FP)
313 HEXAGON_RESERVED_REG_1).addReg(FP).addImm(Offset);
323 HEXAGON_RESERVED_REG_2).addReg(FP)
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/external/clang/test/Sema/
H A Dblock-call.c3 int (*FP)(); variable
7 int (*FPL) (int) = FP; // C doesn't consider this an error.
/external/clang/test/SemaCXX/
H A Dblock-call.cpp3 int (*FP)(); variable
7 int (*FPL) (int) = FP; // expected-error {{cannot initialize a variable of type 'int (*)(int)' with an lvalue of type 'int (*)()'}}
H A Dnullability.cpp64 template<void FP(_Nonnull int*)>
66 FP(0); // expected-warning{{null passed to a callee that requires a non-null argument}}
H A Dexplicit.cpp226 struct FP { struct
233 FP fp;
/external/llvm/lib/Target/WebAssembly/InstPrinter/
H A DWebAssemblyInstPrinter.cpp64 static std::string toString(const APFloat &FP) { argument
67 if (FP.isNaN())
68 assert((FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) ||
69 FP.bitwiseIsEqual(
70 APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) &&
73 auto Written = FP.convertToHexString(
/external/llvm/lib/Target/
H A DTargetSubtargetInfo.cpp27 const InstrStage *IS, const unsigned *OC, const unsigned *FP)
28 : MCSubtargetInfo(TT, CPU, FS, PF, PD, ProcSched, WPR, WL, RA, IS, OC, FP) {
22 TargetSubtargetInfo( const Triple &TT, StringRef CPU, StringRef FS, ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetFeatureKV> PD, const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, const unsigned *FP) argument
/external/libcxx/src/
H A Dchrono.cpp119 typedef steady_clock::rep (*FP)(); typedef in class:chrono::steady_clock
122 FP
137 static FP fp = init_steady_clock();
/external/libchrome/crypto/
H A Dscoped_capi_types.h99 template<class CH, typename FP> inline
100 bool operator==(CH h, const ScopedCAPIHandle<CH, FP>& b) {
104 template<class CH, typename FP> inline
105 bool operator!=(CH h, const ScopedCAPIHandle<CH, FP>& b) {
/external/llvm/include/llvm/Analysis/
H A DRegionPass.h117 Pass *FP = static_cast<Pass *>(PassVector[N]);
118 return FP;
/external/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp43 MSP430::FP, MSP430::R5, MSP430::R6, MSP430::R7,
53 MSP430::FP, MSP430::R5, MSP430::R6, MSP430::R7,
91 Reserved.set(MSP430::FP);
116 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FP : MSP430::SP);
125 Offset += 2; // Skip the saved FP
160 return TFI->hasFP(MF) ? MSP430::FP : MSP430::SP;
H A DMSP430FrameLowering.cpp67 // Save FP into the appropriate stack slot...
69 .addReg(MSP430::FP, RegState::Kill);
71 // Update FP with the new base value...
72 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FP)
78 I->addLiveIn(MSP430::FP);
136 // pop FP.
137 BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::FP);
159 TII.get(MSP430::MOV16rr), MSP430::SP).addReg(MSP430::FP);
292 // Create a frame entry for the FP register that must be saved.
297 "Slot for FP registe
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/external/google-breakpad/src/common/
H A Dscoped_ptr.h387 template<class C, class FP> inline
388 void swap(scoped_ptr_malloc<C, FP>& a, scoped_ptr_malloc<C, FP>& b) {
392 template<class C, class FP> inline
393 bool operator==(C* p, const scoped_ptr_malloc<C, FP>& b) {
397 template<class C, class FP> inline
398 bool operator!=(C* p, const scoped_ptr_malloc<C, FP>& b) {
/external/llvm/lib/MC/
H A DMCSubtargetInfo.cpp44 const InstrStage *IS, const unsigned *OC, const unsigned *FP)
47 ReadAdvanceTable(RA), Stages(IS), OperandCycles(OC), ForwardingPaths(FP) {
39 MCSubtargetInfo( const Triple &TT, StringRef C, StringRef FS, ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetFeatureKV> PD, const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, const unsigned *FP) argument
/external/llvm/test/MC/Mips/
H A Dmodule-softfloat.s12 # CHECK-OBJ: FP ABI: Soft float (0x3)
H A Dmodule-hardfloat.s12 # CHECK-OBJ: FP ABI: Hard float (32-bit CPU, Any FPU) (0x5)
/external/llvm/test/MC/AArch64/
H A Darm64-optional-hash.s15 ; FP immediates
/external/valgrind/memcheck/tests/
H A Dorigin2-not-quite.stderr.exp2 Undef 1 of 3 (64-bit FP)
12 Undef 2 of 3 (32-bit FP)
/external/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.cpp185 // Reserve FP if this function should have a dedicated frame pointer register.
190 Reserved.set(Mips::FP);
292 return TFI->hasFP(MF) ? (IsN64 ? Mips::FP_64 : Mips::FP) :
308 unsigned FP = Subtarget.isGP32bit() ? Mips::FP : Mips::FP_64; local
317 if (!MF.getRegInfo().canReserveReg(FP))
/external/boringssl/src/ssl/test/runner/curve25519/
H A Dcswap_amd64.s12 MOVQ inout+0(FP),DI
13 MOVQ v+8(FP),SI
/external/llvm/test/tools/llvm-readobj/ARM/
H A Dattribute-7.s16 @CHECK-OBJ-NEXT: Description: ARMv8-a FP
H A Dattribute-8.s16 @CHECK-OBJ-NEXT: Description: ARMv8-a FP-D16

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