Searched refs:Fmul (Results 1 - 11 of 11) sorted by relevance

/external/vixl/examples/
H A Dneon-matrix-multiply.cc36 // __ Fmul(v<v_out>.V4S(), v4.V4S(), v<s_column>.S(), 0);
52 __ Fmul(v_out, v4.V4S(), v_in, 0); // e.g. (v0.V4S(), v4.V4S(), v8.S(), 0).
/external/v8/test/cctest/
H A Dtest-assembler-arm64.cc5268 __ Fmul(s0, s17, s18);
5269 __ Fmul(s1, s18, s19);
5270 __ Fmul(s2, s14, s14);
5271 __ Fmul(s3, s15, s20);
5272 __ Fmul(s4, s16, s20);
5273 __ Fmul(s5, s15, s19);
5274 __ Fmul(s6, s19, s16);
5276 __ Fmul(d7, d30, d31);
5277 __ Fmul(d8, d29, d31);
5278 __ Fmul(d
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/external/v8/src/compiler/arm64/
H A Dcode-generator-arm64.cc1227 __ Fmul(i.OutputFloat32Register(), i.InputFloat32Register(0),
1274 __ Fmul(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
/external/vixl/test/
H A Dtest-disasm-a64.cc3859 COMPARE(Fmul(v6.M, v7.M, v8.M), "fmul v6." S ", v7." S ", v8." S);
4185 COMPARE(Fmul(v0.V2S(), v1.V2S(), v2.S(), 0), "fmul v0.2s, v1.2s, v2.s[0]");
4186 COMPARE(Fmul(v2.V4S(), v3.V4S(), v15.S(), 3), "fmul v2.4s, v3.4s, v15.s[3]");
4187 COMPARE(Fmul(v0.V2D(), v1.V2D(), v2.D(), 0), "fmul v0.2d, v1.2d, v2.d[0]");
4188 COMPARE(Fmul(d0, d1, v2.D(), 0), "fmul d0, d1, v2.d[0]");
4189 COMPARE(Fmul(s0, s1, v2.S(), 0), "fmul s0, s1, v2.s[0]");
H A Dtest-assembler-a64.cc9349 __ Fmul(s0, s17, s18);
9350 __ Fmul(s1, s18, s19);
9351 __ Fmul(s2, s14, s14);
9352 __ Fmul(s3, s15, s20);
9353 __ Fmul(s4, s16, s20);
9354 __ Fmul(s5, s15, s19);
9355 __ Fmul(s6, s19, s16);
9357 __ Fmul(d7, d30, d31);
9358 __ Fmul(d8, d29, d31);
9359 __ Fmul(d
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/external/v8/src/arm64/
H A Dmacro-assembler-arm64-inl.h794 void MacroAssembler::Fmul(const FPRegister& fd, function in class:v8::internal::MacroAssembler
H A Dmacro-assembler-arm64.h455 inline void Fmul(const FPRegister& fd,
H A Dcode-stubs-arm64.cc880 __ Fmul(scratch1_double, scratch1_double, scratch1_double);
886 __ Fmul(result_double, result_double, scratch1_double);
/external/vixl/src/vixl/a64/
H A Dmacro-assembler-a64.h1356 void Fmul(const VRegister& vd, const VRegister& vn, const VRegister& vm) { function in class:vixl::MacroAssembler
2356 V(fmul, Fmul) \
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp2666 SDValue Fmul = DAG.getNode(ISD::FMUL, dl, MVT::f64, TwoP32, Fcvt);
2669 SDValue Fadd = DAG.getNode(ISD::FADD, dl, MVT::f64, Fmul, Fcvt2);
/external/v8/src/crankshaft/arm64/
H A Dlithium-codegen-arm64.cc1649 case Token::MUL: __ Fmul(result, left, right); break;

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