Searched refs:Lo (Results 1 - 25 of 82) sorted by relevance

1234

/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypes.h182 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
196 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
198 SDValue &Lo, SDValue &Hi);
327 /// of Op are exactly equal to the bits of Lo; the high bits exactly equal Hi.
329 /// method returns the two i32's, with Lo being equal to the lower 32 bits of
331 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
332 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
336 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
337 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
338 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValu
801 GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) argument
830 GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) argument
[all...]
H A DLegalizeTypesGeneric.cpp14 // computation in two identical registers of a smaller type. The Lo/Hi part
32 // These routines assume that the Lo/Hi part is stored first in memory on
33 // little/big-endian machines, followed by the Hi/Lo part. This means that
34 // they cannot be used as is on vectors, for which Lo is always stored first.
36 SDValue &Lo, SDValue &Hi) {
38 GetExpandedOp(Op, Lo, Hi);
41 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) { argument
62 SplitInteger(SoftenedOp, Lo, Hi);
63 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
35 ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo, SDValue &Lo, SDValue &Hi) argument
196 ExpandRes_BUILD_PAIR(SDNode *N, SDValue &Lo, SDValue &Hi) argument
203 ExpandRes_EXTRACT_ELEMENT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
215 ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
255 ExpandRes_NormalLoad(SDNode *N, SDValue &Lo, SDValue &Hi) argument
300 ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) argument
397 SDValue Lo, Hi; local
415 SDValue Lo, Hi; local
439 SDValue Lo, Hi; local
488 SDValue Lo, Hi; local
517 SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo, SDValue &Lo, SDValue &Hi) argument
523 SplitRes_SELECT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
545 SplitRes_SELECT_CC(SDNode *N, SDValue &Lo, SDValue &Hi) argument
558 SplitRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi) argument
[all...]
H A DLegalizeIntegerTypes.cpp281 SDValue Lo, Hi; local
282 GetSplitVector(N->getOperand(0), Lo, Hi);
283 Lo = BitConvertToInteger(Lo);
287 std::swap(Lo, Hi);
292 JoinIntegers(Lo, Hi));
1031 SDValue Lo = ZExtPromotedInteger(N->getOperand(0)); local
1033 assert(Lo.getValueType() == N->getValueType(0) && "Operand over promoted?");
1039 return DAG.getNode(ISD::OR, dl, N->getValueType(0), Lo, Hi);
1280 SDValue Lo, H local
1319 case ISD::LOAD: ExpandIntRes_LOAD(cast<LoadSDNode>(N), Lo, Hi); break; local
1397 SetExpandedInteger(SDValue(N, ResNo), Lo, Hi); local
1412 ExpandShiftByConstant(SDNode *N, const APInt &Amt, SDValue &Lo, SDValue &Hi) argument
1511 ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1599 ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1675 ExpandIntRes_ADDSUB(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1769 ExpandIntRes_ADDSUBC(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1795 ExpandIntRes_ADDSUBE(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1815 ExpandIntRes_ANY_EXTEND(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1838 ExpandIntRes_AssertSext(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1860 ExpandIntRes_AssertZext(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1880 ExpandIntRes_BITREVERSE(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1888 ExpandIntRes_BSWAP(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1896 ExpandIntRes_Constant(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1910 ExpandIntRes_CTLZ(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1930 ExpandIntRes_CTPOP(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1941 ExpandIntRes_CTTZ(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1961 ExpandIntRes_FP_TO_SINT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1976 ExpandIntRes_FP_TO_UINT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1991 ExpandIntRes_LOAD(LoadSDNode *N, SDValue &Lo, SDValue &Hi) argument
2112 ExpandIntRes_Logical(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2122 ExpandIntRes_MUL(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2152 ExpandIntRes_READCYCLECOUNTER(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2163 ExpandIntRes_SADDSUBO(SDNode *Node, SDValue &Lo, SDValue &Hi) argument
2205 ExpandIntRes_SDIV(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2231 ExpandIntRes_Shift(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2331 ExpandIntRes_SIGN_EXTEND(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2364 ExpandIntRes_SIGN_EXTEND_INREG(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2390 ExpandIntRes_SREM(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2416 ExpandIntRes_TRUNCATE(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2428 ExpandIntRes_UADDSUBO(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2451 ExpandIntRes_XMULO(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2537 ExpandIntRes_UDIV(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2563 ExpandIntRes_UREM(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2589 ExpandIntRes_ZERO_EXTEND(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2617 ExpandIntRes_ATOMIC_LOAD(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2921 SDValue Lo, Hi; local
2930 SDValue Lo, Hi; local
2960 SDValue Lo, Hi; local
3074 SDValue Lo, Hi; local
[all...]
H A DLegalizeFloatTypes.cpp971 SDValue Lo, Hi; local
972 Lo = Hi = SDValue();
986 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
987 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
988 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
990 case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
991 case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break;
992 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
993 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
994 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, H
1033 SetExpandedFloat(SDValue(N, ResNo), Lo, Hi); local
1036 ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1051 ExpandFloatRes_FABS(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1065 ExpandFloatRes_FMINNUM(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1075 ExpandFloatRes_FMAXNUM(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1085 ExpandFloatRes_FADD(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1095 ExpandFloatRes_FCEIL(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1105 ExpandFloatRes_FCOPYSIGN(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1117 ExpandFloatRes_FCOS(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1127 ExpandFloatRes_FDIV(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1141 ExpandFloatRes_FEXP(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1151 ExpandFloatRes_FEXP2(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1161 ExpandFloatRes_FFLOOR(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1171 ExpandFloatRes_FLOG(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1181 ExpandFloatRes_FLOG2(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1191 ExpandFloatRes_FLOG10(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1201 ExpandFloatRes_FMA(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1215 ExpandFloatRes_FMUL(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1229 ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1241 ExpandFloatRes_FNEG(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1249 ExpandFloatRes_FP_EXTEND(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1258 ExpandFloatRes_FPOW(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1268 ExpandFloatRes_FPOWI(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1278 ExpandFloatRes_FREM(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1288 ExpandFloatRes_FRINT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1298 ExpandFloatRes_FROUND(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1310 ExpandFloatRes_FSIN(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1320 ExpandFloatRes_FSQRT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1330 ExpandFloatRes_FSUB(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1344 ExpandFloatRes_FTRUNC(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1354 ExpandFloatRes_LOAD(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1386 ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1567 SDValue Lo, Hi; local
1578 SDValue Lo, Hi; local
1693 SDValue Lo, Hi; local
1960 SDValue Lo, Hi; local
[all...]
H A DLegalizeVectorTypes.cpp576 SDValue Lo, Hi; local
592 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
594 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
595 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
596 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
597 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
598 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
599 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
600 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
601 case ISD::INSERT_SUBVECTOR: SplitVecRes_INSERT_SUBVECTOR(N, Lo, H
609 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi); local
612 SplitVecRes_MLOAD(cast<MaskedLoadSDNode>(N), Lo, Hi); local
615 SplitVecRes_MGATHER(cast<MaskedGatherSDNode>(N), Lo, Hi); local
621 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi); local
700 SetSplitVector(SDValue(N, ResNo), Lo, Hi); local
703 SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi) argument
717 SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo, SDValue &Hi) argument
733 SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) argument
782 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi); local
790 SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi) argument
803 SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi) argument
824 SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi) argument
840 SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi) argument
877 SplitVecRes_FPOWI(SDNode *N, SDValue &Lo, SDValue &Hi) argument
885 SplitVecRes_FCOPYSIGN(SDNode *N, SDValue &Lo, SDValue &Hi) argument
904 SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi) argument
920 SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
976 SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi) argument
985 SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, SDValue &Hi) argument
1028 SplitVecRes_MLOAD(MaskedLoadSDNode *MLD, SDValue &Lo, SDValue &Hi) argument
1096 SplitVecRes_MGATHER(MaskedGatherSDNode *MGT, SDValue &Lo, SDValue &Hi) argument
1157 SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1175 SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1211 SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1263 SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo, SDValue &Hi) argument
1481 SDValue Lo, Hi; local
1506 SDValue Lo, Hi; local
1524 SDValue Lo, Hi; local
1541 SDValue Lo, Hi; local
1654 SDValue Lo = DAG.getMaskedGather(DAG.getVTList(LoVT, MVT::Other), LoVT, dl, local
1718 SDValue Lo, Hi; local
1779 SDValue Lo, Hi; local
1816 SDValue Lo, Hi; local
1956 SDValue Lo, Hi; local
[all...]
H A DLegalizeTypes.cpp809 void DAGTypeLegalizer::GetExpandedInteger(SDValue Op, SDValue &Lo, argument
815 Lo = Entry.first;
819 void DAGTypeLegalizer::SetExpandedInteger(SDValue Op, SDValue Lo, argument
821 assert(Lo.getValueType() ==
823 Hi.getValueType() == Lo.getValueType() &&
825 // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant.
826 AnalyzeNewValue(Lo);
832 Entry.first = Lo;
836 void DAGTypeLegalizer::GetExpandedFloat(SDValue Op, SDValue &Lo, argument
842 Lo
846 SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi) argument
863 GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi) argument
873 SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi) argument
1015 GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi) argument
1042 JoinIntegers(SDValue Lo, SDValue Hi) argument
1149 SplitInteger(SDValue Op, EVT LoVT, EVT HiVT, SDValue &Lo, SDValue &Hi) argument
1164 SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi) argument
[all...]
H A DLegalizeVectorOps.cpp572 SDValue Lo, Hi, ShAmt; local
577 Lo = DAG.getNode(ISD::SRL, dl, WideVT, LoadVals[WideIdx], ShAmt);
578 Lo = DAG.getNode(ISD::AND, dl, WideVT, Lo, SrcEltBitMask);
595 Lo = DAG.getNode(ISD::OR, dl, WideVT, Lo, Hi);
600 Lo = DAG.getAnyExtOrTrunc(Lo, dl, DstEltVT);
603 Lo = DAG.getZExtOrTrunc(Lo, d
[all...]
H A DLegalizeDAG.cpp415 SDValue Lo = Val; local
421 DAG.getDataLayout().isLittleEndian() ? Lo : Hi,
430 Chain, dl, DAG.getDataLayout().isLittleEndian() ? Hi : Lo, Ptr,
552 SDValue Lo, Hi; local
554 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr, LD->getPointerInfo(),
572 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr,
584 Result = DAG.getNode(ISD::OR, dl, VT, Result, Lo);
586 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
707 SDValue Lo = DAG.getConstant(IntVal.trunc(32), dl, MVT::i32); local
710 std::swap(Lo, H
[all...]
/external/llvm/include/llvm/Support/
H A DSwapByteOrder.h35 uint16_t Lo = value >> 8;
36 return Hi | Lo;
65 uint32_t Lo = SwapByteOrder_32(uint32_t(value >> 32));
66 return (Hi << 32) | Lo;
H A DGCOV.h198 uint32_t Lo, Hi; local
199 if (!readInt(Lo) || !readInt(Hi))
201 Val = ((uint64_t)Hi << 32) | Lo;
/external/llvm/lib/IR/
H A DMDBuilder.cpp66 MDNode *MDBuilder::createRange(const APInt &Lo, const APInt &Hi) { argument
67 assert(Lo.getBitWidth() == Hi.getBitWidth() && "Mismatched bitwidths!");
69 Type *Ty = IntegerType::get(Context, Lo.getBitWidth());
70 return createRange(ConstantInt::get(Ty, Lo), ConstantInt::get(Ty, Hi));
73 MDNode *MDBuilder::createRange(Constant *Lo, Constant *Hi) { argument
75 if (Hi == Lo)
78 // Return the range [Lo, Hi).
79 return MDNode::get(Context, {createConstant(Lo), createConstant(Hi)});
/external/llvm/include/llvm/IR/
H A DMDBuilder.h73 /// \brief Return metadata describing the range [Lo, Hi).
74 MDNode *createRange(const APInt &Lo, const APInt &Hi);
76 /// \brief Return metadata describing the range [Lo, Hi).
77 MDNode *createRange(Constant *Lo, Constant *Hi);
/external/llvm/lib/Target/Mips/
H A DMips16ISelDAGToDAG.cpp49 SDNode *Lo = nullptr, *Hi = nullptr; local
56 Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InFlag);
57 InFlag = SDValue(Lo, 1);
63 return std::make_pair(Lo, Hi);
217 if (Addr.getOperand(1).getOpcode() == MipsISD::Lo ||
H A DMipsISelLowering.h45 // No relation with Mips Lo register
46 Lo,
313 SDValue Lo = DAG.getNode(MipsISD::Lo, DL, Ty, local
315 return DAG.getNode(ISD::ADD, DL, Ty, Load, Lo);
357 SDValue Lo = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_LO); local
360 DAG.getNode(MipsISD::Lo, DL, Ty, Lo));
H A DMipsISelLowering.cpp116 case MipsISD::Lo: return "MipsISD::Lo";
797 SDValue Lo = Add.getOperand(1);
799 if ((Lo.getOpcode() != MipsISD::Lo) ||
800 (Lo.getOperand(0).getOpcode() != ISD::TargetJumpTable))
808 return DAG.getNode(ISD::ADD, DL, ValTy, Add1, Lo);
1774 SDValue Lo = DAG.getNode(MipsISD::Lo, DL, PtrVT, TGALo); local
1776 return DAG.getNode(ISD::ADD, DL, PtrVT, Add, Lo);
1797 SDValue Lo = DAG.getNode(MipsISD::Lo, DL, PtrVT, TGALo); local
2097 SDValue Lo = Op.getOperand(0), Hi = Op.getOperand(1); local
2126 SDValue Lo = Op.getOperand(0), Hi = Op.getOperand(1); local
[all...]
/external/harfbuzz_ng/src/
H A Dgen-use-table.py69 'Cc', 'Cf', 'Cn', 'Co', 'Cs', 'Ll', 'Lm', 'Lo', 'Lt', 'Lu', 'Mc',
149 (UGC == Lo and UISC in [Avagraha, Bindu, Consonant_Final, Consonant_Medial,
166 return ((UISC == Consonant_Final and UGC != Lo) or
172 return UISC == Consonant_Medial and UGC != Lo
177 return UISC == Consonant_Subjoined and UGC != Lo
212 (UGC != Lo and UISC in [Vowel, Vowel_Dependent]))
215 (UGC != Lo and UISC == Bindu))
/external/llvm/lib/MC/
H A DMCObjectStreamer.cpp58 const MCSymbol *Lo,
61 if (!Hi->getFragment() || Hi->getFragment() != Lo->getFragment() ||
62 Hi->isVariable() || Lo->isVariable()) {
63 MCStreamer::emitAbsoluteSymbolDiff(Hi, Lo, Size);
67 assert(Hi->getOffset() >= Lo->getOffset() &&
68 "Expected Hi to be greater than Lo");
69 EmitIntValue(Hi->getOffset() - Lo->getOffset(), Size);
57 emitAbsoluteSymbolDiff(const MCSymbol *Hi, const MCSymbol *Lo, unsigned Size) argument
/external/clang/lib/CodeGen/
H A DTargetInfo.cpp1693 /// Post merger cleanup, reduces a malformed Hi and Lo pair to
1699 /// \param Lo - The classification for the parts of the type
1705 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const;
1710 /// \param Lo - The classification for the parts of the type
1724 /// be passed in Memory then at least the classification of \arg Lo
1727 /// The \arg Lo class will be NoClass iff the argument is ignored.
1729 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will
1731 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi,
2028 void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, argument
2052 Lo
2101 classify(QualType Ty, uint64_t OffsetBase, Class &Lo, Class &Hi, bool isNamedArg) const argument
[all...]
/external/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp106 if (Addr.getOperand(0).getOpcode() == SPISD::Lo) {
111 if (Addr.getOperand(1).getOpcode() == SPISD::Lo) {
133 if (Addr.getOperand(0).getOpcode() == SPISD::Lo ||
134 Addr.getOperand(1).getOpcode() == SPISD::Lo)
/external/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp180 unsigned Lo = TRI->getSubReg(PreloadedPrivateBufferReg, AMDGPU::sub0_sub1); local
186 .addReg(Lo, RegState::Kill);
/external/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp580 SDValue Lo(Hi.getNode(), 1);
581 SDValue Ops[] = { Lo, Hi };
597 SDValue Lo(Hi.getNode(), 1);
598 SDValue Ops[] = { Lo, Hi };
694 SDValue Lo(Hi.getNode(), 1);
695 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi);
702 SDValue Lo(Hi.getNode(), 1);
703 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi);
713 SDValue Lo(Hi.getNode(), 1);
718 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, H
754 SDValue Lo = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), local
1759 SDValue Lo = DAG.getNode(ISD::ADD, dl, VT, N2, N3); local
[all...]
/external/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsELFObjectWriter.cpp282 // Lo is chosen as a match for Hi, set their fields accordingly.
286 static void setMatch(MipsRelocationEntry &Hi, MipsRelocationEntry &Lo) { argument
287 Lo.HasMatchingHi = true;
288 Hi.SortOffset = Lo.R.Offset - 1;
/external/llvm/bindings/go/llvm/
H A DDIBuilderBindings.h116 LLVMMetadataRef LLVMDIBuilderGetOrCreateSubrange(LLVMDIBuilderRef D, int64_t Lo,
H A DDIBuilderBindings.cpp192 int64_t Lo, int64_t Count) {
194 return wrap(D->getOrCreateSubrange(Lo, Count));
191 LLVMDIBuilderGetOrCreateSubrange(LLVMDIBuilderRef Dref, int64_t Lo, int64_t Count) argument
/external/llvm/include/llvm/MC/
H A DMCObjectStreamer.h134 /// Emit the absolute difference between \c Hi and \c Lo, as long as we can
138 /// \pre Offset of \c Hi is greater than the offset \c Lo.
139 void emitAbsoluteSymbolDiff(const MCSymbol *Hi, const MCSymbol *Lo,

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