Searched refs:ORR (Results 1 - 25 of 28) sorted by relevance

12

/external/aac/libSBRdec/src/arm/
H A Denv_calc_arm.cpp128 ORR r0, r0, r4
129 ORR r0, r0, r5
136 ORR r0, r0, r4
137 ORR r0, r0, r5
/external/boringssl/src/ssl/test/runner/poly1305/
H A Dpoly1305_arm.s29 ORR R3<<6, R9, R9
30 ORR R4<<12, g, g
31 ORR R5<<18, R11, R11
97 ORR R1<<6, g, g
98 ORR R2<<12, R11, R11
99 ORR R3<<18, R12, R12
107 ORR R3, R4, R4
153 ORR R11<<6, R12, R12
154 ORR R5<<6, R14, R14
163 ORR R
[all...]
/external/libhevc/common/arm64/
H A Dihevc_sao_band_offset_luma.s152 ORR v4.8b, v4.8b , v25.8b //band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp)
160 ORR v3.8b, v3.8b , v24.8b //band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp)
170 ORR v2.8b, v2.8b , v23.8b //band_table.val[1] = vorr_u8(band_table.val[1], au1_cmp)
180 ORR v1.8b, v1.8b , v22.8b //band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp)
H A Dihevc_sao_band_offset_chroma.s176 ORR v4.8b, v4.8b , v13.8b //band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp)
184 ORR v3.8b, v3.8b , v14.8b //band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp)
194 ORR v2.8b, v2.8b , v15.8b //band_table.val[1] = vorr_u8(band_table.val[1], au1_cmp)
203 ORR v1.8b, v1.8b , v16.8b //band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp)
250 ORR v12.8b, v12.8b , v17.8b //band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp)
258 ORR v11.8b, v11.8b , v18.8b //band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp)
268 ORR v10.8b, v10.8b , v19.8b //band_table.val[1] = vorr_u8(band_table.val[1], au1_cmp)
278 ORR v9.8b, v9.8b , v20.8b //band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp)
/external/pcre/dist/sljit/
H A DsljitNativeARM_64.c103 #define ORR 0xaa000000 macro
450 /* A large amount of number can be constructed from ORR and MOVx,
669 return push_inst(compiler, ORR | RD(dst) | RN(TMP_ZERO) | RM(arg2));
695 return push_inst(compiler, (ORR ^ (1 << 31)) | RD(dst) | RN(TMP_ZERO) | RM(arg2));
742 FAIL_IF(push_inst(compiler, (ORR ^ inv_bits) | RD(dst) | RN(arg1) | RM(arg2)));
980 return push_inst(compiler, ORR | RD(arg) | RN(TMP_ZERO) | RM(TMP_LR));
1142 FAIL_IF(push_inst(compiler, ORR | RD(SLJIT_S0) | RN(TMP_ZERO) | RM(SLJIT_R0)));
1144 FAIL_IF(push_inst(compiler, ORR | RD(SLJIT_S1) | RN(TMP_ZERO) | RM(SLJIT_R1)));
1146 FAIL_IF(push_inst(compiler, ORR | RD(SLJIT_S2) | RN(TMP_ZERO) | RM(SLJIT_R2)));
1261 FAIL_IF(push_inst(compiler, ORR | R
[all...]
/external/v8/src/arm64/
H A Dconstants-arm64.h499 ORR = 0x20000000, enumerator in enum:v8::internal::LogicalOp
500 ORN = ORR | NOT,
514 ORR_w_imm = LogicalImmediateFixed | ORR,
515 ORR_x_imm = LogicalImmediateFixed | ORR | SixtyFourBits,
533 ORR_w = LogicalShiftedFixed | ORR,
534 ORR_x = LogicalShiftedFixed | ORR | SixtyFourBits,
H A Dmacro-assembler-arm64.cc92 case ORR: // Fall through.
108 case ORR:
431 LogicalImmediate(dst, AppropriateZeroRegFor(dst), n, imm_s, imm_r, ORR);
H A Dmacro-assembler-arm64-inl.h94 LogicalMacro(rd, rn, operand, ORR);
H A Dassembler-arm64.cc1221 Logical(rd, rn, operand, ORR);
H A Dsimulator-arm64.cc1531 case ORR: result = op1 | op2; break;
/external/vixl/src/vixl/a64/
H A Dconstants-a64.h526 ORR = 0x20000000, enumerator in enum:vixl::LogicalOp
527 ORN = ORR | NOT,
541 ORR_w_imm = LogicalImmediateFixed | ORR,
542 ORR_x_imm = LogicalImmediateFixed | ORR | SixtyFourBits,
560 ORR_w = LogicalShiftedFixed | ORR,
561 ORR_x = LogicalShiftedFixed | ORR | SixtyFourBits,
H A Dmacro-assembler-a64.cc479 dst, AppropriateZeroRegFor(dst), n, imm_s, imm_r, ORR);
676 LogicalMacro(rd, rn, operand, ORR);
741 case ORR:
759 case ORR:
H A Dsimulator-a64.cc993 case ORR: result = op1 | op2; break;
H A Dassembler-a64.cc1025 Logical(rd, rn, operand, ORR);
/external/v8/src/arm/
H A Dconstants-arm.h153 ORR = 12 << 21, // Logical (inclusive) OR. enumerator in enum:v8::internal::Opcode
H A Dsimulator-arm.cc2572 case ORR: {
H A Dassembler-arm.cc1508 addrmod1(cond | ORR | s, src1, dst, src2);
/external/tremolo/Tremolo/
H A DbitwiseARM.s108 ORR r10,r10,r12,LSL r5 @ r10= first r5+8 bits
304 ORR r10,r10,r12,LSL r5 @ r10= first r5+8 bits
H A Ddpen.s146 ORR r0, r14,r10,LSL #8 @ r7 = chase = (next<<8) | r14
206 ORR r0, r14,r10,LSL #16 @ r7 = chase = (next<<16) | r14
H A DmdctLARM.s998 ORR r7, r7, r8, LSL #6 @ r7 = bitrev[bit]
H A DmdctARM.s1011 ORR r7, r7, r8, LSL #6 @ r7 = bitrev[bit]
/external/llvm/test/MC/ARM/
H A Dbasic-thumb-instructions.s448 @ ORR
H A Dv8_IT_manual.s265 @ ORR reg, encoding T1
269 @ ORR reg, encoding T2 (32-bit)
H A Dbasic-arm-instructions.s1614 @ ORR
/external/llvm/test/MC/AArch64/
H A Darm64-aliases.s25 ; ORR Rd, Rn, Rn is a MOV

Completed in 784 milliseconds

12