Searched refs:PredDef (Results 1 - 3 of 3) sorted by relevance

/external/llvm/lib/Target/Hexagon/
H A DHexagonHardwareLoops.cpp1668 MachineInstr *PredDef = MRI->getVRegDef(P); local
1670 if (!PredDef->isCompare())
1680 for (unsigned i = 0, n = PredDef->getNumOperands(); i < n; ++i) {
1681 MachineOperand &MO = PredDef->getOperand(i);
1729 for (unsigned i = 1, n = PredDef->getNumOperands(); i < n; ++i) {
1730 MachineOperand &MO = PredDef->getOperand(i);
1753 bool Order = orderBumpCompare(IndI, PredDef);
1765 Comparison::Kind Cmp = getComparisonKind(PredDef->getOpcode(), 0, 0, 0);
1783 if (!isImmValidForOpcode(PredDef->getOpcode(), CmpImm))
1789 bool Order = orderBumpCompare(BumpI, PredDef);
[all...]
/external/llvm/utils/TableGen/
H A DCodeGenSchedule.cpp950 bool mutuallyExclusive(Record *PredDef, ArrayRef<PredCheck> Term);
967 bool PredTransitions::mutuallyExclusive(Record *PredDef,
972 if (I->Predicate == PredDef)
979 if ((*VI)->getValueAsDef("Predicate") == PredDef)
1106 Record *PredDef = Variant.VarOrSeqDef->getValueAsDef("Predicate");
1107 if (mutuallyExclusive(PredDef, TransVec[TransIdx].PredTerm))
1142 Record *PredDef = VInfo.VarOrSeqDef->getValueAsDef("Predicate");
1143 Trans.PredTerm.push_back(PredCheck(IsRead, VInfo.RWIdx,PredDef));
/external/llvm/lib/Transforms/Utils/
H A DSimplifyCFG.cpp661 BasicBlock *PredDef = GetValueEqualityComparisonCases(Pred->getTerminator(), local
663 EliminateBlockCases(PredDef, PredCases); // Remove default from cases.
672 if (PredDef == TI->getParent()) {

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