Searched refs:RADEON_PP_TXCBLEND_0 (Results 1 - 5 of 5) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/radeon/
H A Dradeon_blit.c150 OUT_BATCH_REGVAL(RADEON_PP_TXCBLEND_0, (RADEON_COLOR_ARG_A_ZERO |
H A Dradeon_sanity.c202 { RADEON_PP_TXCBLEND_0, "RADEON_PP_TXCBLEND_0" },
H A Dradeon_state_init.c495 OUT_BATCH(CP_PACKET0(RADEON_PP_TXCBLEND_0 + (i * 24), 1));
/external/mesa3d/src/mesa/drivers/dri/r200/server/
H A Dradeon_reg.h1372 #define RADEON_PP_TXCBLEND_0 0x1c60 macro
/external/mesa3d/src/mesa/drivers/dri/radeon/server/
H A Dradeon_reg.h1372 #define RADEON_PP_TXCBLEND_0 0x1c60 macro

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