Searched refs:SXTW (Results 1 - 19 of 19) sorted by relevance

/external/v8/src/regexp/arm64/
H A Dregexp-macro-assembler-arm64.cc248 Operand(current_input_offset(), SXTW));
321 Operand(capture_start_offset, SXTW));
324 Operand(capture_length, SXTW));
327 Operand(current_input_offset(), SXTW));
331 Operand(capture_length, SXTW));
368 Operand(capture_length, SXTW));
371 __ Cmp(current_input_offset().X(), Operand(current_input_offset(), SXTW)); local
393 __ Add(x0, input_end(), Operand(capture_start_offset, SXTW));
397 __ Add(x1, input_end(), Operand(current_input_offset(), SXTW));
399 __ Sub(x1, x1, Operand(capture_length, SXTW));
508 __ Cmp(current_input_offset().X(), Operand(current_input_offset(), SXTW)); local
[all...]
/external/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AddressingModes.h47 SXTW, enumerator in enum:llvm::AArch64_AM::ShiftExtendType
66 case AArch64_AM::SXTW: return "sxtw";
133 case 6: return AArch64_AM::SXTW;
160 case AArch64_AM::SXTW: return 6; break;
/external/v8/test/cctest/
H A Dtest-disasm-arm64.cc157 COMPARE(Mov(x16, Operand(x20, SXTW, 3)), "sbfiz x16, x20, #3, #32");
397 COMPARE(add(x24, x25, Operand(x26, SXTW, 1)), "add x24, x25, w26, sxtw #1");
423 COMPARE(sub(x24, x25, Operand(x26, SXTW, 1)), "sub x24, x25, w26, sxtw #1");
912 COMPARE(ldr(w12, MemOperand(x13, w14, SXTW)), "ldr w12, [x13, w14, sxtw]");
913 COMPARE(ldr(w15, MemOperand(x16, w17, SXTW, 2)),
922 COMPARE(ldr(x12, MemOperand(x13, w14, SXTW)), "ldr x12, [x13, w14, sxtw]");
923 COMPARE(ldr(x15, MemOperand(x16, w17, SXTW, 3)),
933 COMPARE(str(w12, MemOperand(x13, w14, SXTW)), "str w12, [x13, w14, sxtw]");
934 COMPARE(str(w15, MemOperand(x16, w17, SXTW, 2)),
943 COMPARE(str(x12, MemOperand(x13, w14, SXTW)), "st
[all...]
H A Dtest-assembler-arm64.cc315 __ Mvn(x15, Operand(w2, SXTW, 4));
573 __ Orr(x12, x0, Operand(x1, SXTW, 2));
670 __ Orn(x12, x0, Operand(x1, SXTW, 2));
739 __ And(x12, x0, Operand(x1, SXTW, 2));
880 __ Bic(x12, x0, Operand(x1, SXTW, 2));
1008 __ Eor(x12, x0, Operand(x1, SXTW, 2));
1077 __ Eon(x12, x0, Operand(x1, SXTW, 2));
2695 __ Ldr(w3, MemOperand(x18, x27, SXTW));
2696 __ Ldr(w4, MemOperand(x18, x28, SXTW, 2));
2699 __ Str(w2, MemOperand(x20, x29, SXTW,
[all...]
/external/vixl/test/
H A Dtest-disasm-a64.cc162 COMPARE(Mov(x16, Operand(x17, SXTW, 3)), "sbfiz x16, x17, #3, #32");
396 COMPARE(add(x24, x25, Operand(x26, SXTW, 1)), "add x24, x25, w26, sxtw #1");
422 COMPARE(sub(x24, x25, Operand(x26, SXTW, 1)), "sub x24, x25, w26, sxtw #1");
1027 COMPARE(ldr(w12, MemOperand(x13, w14, SXTW)), "ldr w12, [x13, w14, sxtw]");
1028 COMPARE(ldr(w15, MemOperand(x16, w17, SXTW, 2)),
1037 COMPARE(ldr(x12, MemOperand(x13, w14, SXTW)), "ldr x12, [x13, w14, sxtw]");
1038 COMPARE(ldr(x15, MemOperand(x16, w17, SXTW, 3)),
1048 COMPARE(str(w12, MemOperand(x13, w14, SXTW)), "str w12, [x13, w14, sxtw]");
1049 COMPARE(str(w15, MemOperand(x16, w17, SXTW, 2)),
1058 COMPARE(str(x12, MemOperand(x13, w14, SXTW)), "st
[all...]
H A Dtest-assembler-a64.cc305 __ Mvn(x15, Operand(w2, SXTW, 4));
564 __ Orr(x12, x0, Operand(x1, SXTW, 2));
658 __ Orn(x12, x0, Operand(x1, SXTW, 2));
725 __ And(x12, x0, Operand(x1, SXTW, 2));
863 __ Bic(x12, x0, Operand(x1, SXTW, 2));
987 __ Eor(x12, x0, Operand(x1, SXTW, 2));
1054 __ Eon(x12, x0, Operand(x1, SXTW, 2));
2580 __ Ldr(w3, MemOperand(x18, x27, SXTW));
2581 __ Ldr(w4, MemOperand(x18, x28, SXTW, 2));
2584 __ Str(w2, MemOperand(x20, x29, SXTW,
[all...]
/external/v8/src/arm64/
H A Dcodegen-arm64.cc445 __ Ldrh(result, MemOperand(string, index, SXTW, 1));
449 __ Ldrb(result, MemOperand(string, index, SXTW));
H A Dassembler-arm64-inl.h480 DCHECK((extend == UXTW) || (extend == SXTW) || (extend == SXTX));
533 DCHECK((extend_ == UXTW) || (extend_ == SXTW) || (extend_ == SXTX));
H A Dconstants-arm64.h345 SXTW = 6, enumerator in enum:v8::internal::Extend
H A Dsimulator-arm64.cc993 case SXTW:
1611 DCHECK((ext == UXTW) || (ext == UXTX) || (ext == SXTW) || (ext == SXTX));
H A Dassembler-arm64.cc2502 case SXTW: sbfm(rd, rn_, non_shift_bits, high_bit); break;
/external/v8/src/crankshaft/arm64/
H A Dlithium-codegen-arm64.cc1351 right = Operand(ToRegister32(instr->right()), SXTW);
1561 __ Ldr(scratch, MemOperand(elements, length, SXTW, kPointerSizeLog2));
2779 __ Add(result, base, Operand(ToRegister32(instr->offset()), SXTW));
3101 return MemOperand(base, key, SXTW, element_size_shift);
3106 return MemOperand(scratch, key, SXTW, element_size_shift);
3223 __ Add(base, elements, Operand(key, SXTW, element_size_shift));
3227 return MemOperand(base, key, SXTW, element_size_shift);
3578 __ Cmp(result, Operand(result, SXTW));
3852 __ Cmp(result, Operand(result.W(), SXTW));
4147 __ Cmp(result.X(), Operand(result, SXTW));
[all...]
/external/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp681 Addr.setExtendType(AArch64_AM::SXTW);
765 Addr.setExtendType(AArch64_AM::SXTW);
823 Addr.setExtendType(AArch64_AM::SXTW);
998 if (Addr.getExtendType() == AArch64_AM::SXTW ||
1014 else if (Addr.getExtendType() == AArch64_AM::SXTW)
1075 bool IsSigned = Addr.getExtendType() == AArch64_AM::SXTW ||
1779 Addr.getExtendType() == AArch64_AM::SXTW)
2031 Addr.getExtendType() == AArch64_AM::SXTW)
H A DAArch64ISelDAGToDAG.cpp379 return AArch64_AM::SXTW;
787 SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, dl,
859 SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, dl,
871 SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, dl,
/external/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp1004 ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW ||
1039 return (ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW) &&
1591 bool IsSigned = ET == AArch64_AM::SXTW || ET == AArch64_AM::SXTX;
1603 bool IsSigned = ET == AArch64_AM::SXTW || ET == AArch64_AM::SXTX;
2418 .Case("sxtw", AArch64_AM::SXTW)
/external/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h512 SXTW, enumerator in enum:llvm::AArch64SE::ShiftExtSpecifiers
/external/vixl/src/vixl/a64/
H A Dassembler-a64.cc391 VIXL_ASSERT((extend == UXTW) || (extend == SXTW) || (extend == SXTX));
442 VIXL_ASSERT((extend_ == UXTW) || (extend_ == SXTW) || (extend_ == SXTX));
4864 case SXTW: sbfm(rd, rn_, non_shift_bits, high_bit); break;
H A Dconstants-a64.h282 SXTW = 6, enumerator in enum:vixl::Extend
H A Dsimulator-a64.cc370 case SXTW:
1067 VIXL_ASSERT((ext == UXTW) || (ext == UXTX) || (ext == SXTW) || (ext == SXTX));

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