Searched refs:msub (Results 1 - 25 of 51) sorted by relevance

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/external/llvm/test/MC/Mips/
H A Dmicromips-multiply-instructions.s14 # CHECK-EL: msub $4, $5 # encoding: [0xa4,0x00,0x3c,0xeb]
21 # CHECK-EB: msub $4, $5 # encoding: [0x00,0xa4,0xeb,0x3c]
25 msub $4, $5
H A Dmicromips-fpu-instructions.s68 # CHECK-EL: msub.s $f2, $f4, $f6, $f8 # encoding: [0x06,0x55,0x21,0x11]
69 # CHECK-EL: msub.d $f2, $f4, $f6, $f8 # encoding: [0x06,0x55,0x29,0x11]
133 # CHECK-EB: msub.s $f2, $f4, $f6, $f8 # encoding: [0x55,0x06,0x11,0x21]
134 # CHECK-EB: msub.d $f2, $f4, $f6, $f8 # encoding: [0x55,0x06,0x11,0x29]
194 msub.s $f2, $f4, $f6, $f8
195 msub.d $f2, $f4, $f6, $f8
H A Dmips-alu-instructions.s84 # CHECK: msub $6, $7 # encoding: [0x04,0x00,0xc7,0x70]
109 msub $6,$7
H A Dmips64-alu-instructions.s80 # CHECK: msub $6, $7 # encoding: [0x04,0x00,0xc7,0x70]
105 msub $6,$7
/external/llvm/test/MC/Mips/mips32r6/
H A Dinvalid-mips32r2.s10 msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips32.s26 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/valgrind/none/tests/mips64/
H A Dfpu_arithmetic.stdout.exp1731 msub.s 347857.000000 -347856.500000 0.000000 -4578.500000
1732 msub.s -147883.000000 356047.500000 456.250000 456.250000
1733 msub.s 103.000000 -1.000000 3.000000 34.031250
1734 msub.s -4602.000000 23.062500 -1.000000 4578.750000
1735 msub.s 240536.000000 1752.000000 1384.500000 175.000000
1736 msub.s -776.000000 0.015625 -7.250000 107.000000
1737 msub.s -456249999360.000000 0.031250 1000000000.000000 -456.250000
1738 msub.s 290515.000000 -248562.750000 -5786.500000 -7.250000
1739 msub.s -6095717.000000 1384.500000 1752.000000 -3478.500000
1740 msub
[all...]
/external/llvm/test/MC/Mips/mips32/
H A Dinvalid-mips32r2.s20 msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
21 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/llvm/test/MC/Mips/mips5/
H A Dinvalid-mips64.s21 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips64r2.s28 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/llvm/test/MC/Mips/mips4/
H A Dinvalid-mips64.s20 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips5-wrong-error.s37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
H A Dinvalid-mips64r2.s24 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/llvm/test/MC/Mips/mips2/
H A Dinvalid-mips32r2.s48 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
49 msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
50 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips5-wrong-error.s37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
H A Dinvalid-mips32.s39 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/v8/src/compiler/
H A Dmachine-operator-reducer.cc175 Int32BinopMatcher msub(m.left().node());
176 node->ReplaceInput(0, msub.left().node());
177 node->ReplaceInput(1, msub.right().node());
190 Int64BinopMatcher msub(m.left().node());
191 node->ReplaceInput(0, msub.left().node());
192 node->ReplaceInput(1, msub.right().node());
1037 Int32BinopMatcher msub(sub);
1038 if (!msub.left().Is(32) || msub.right().node() != y) return NoChange();
/external/llvm/test/MC/Mips/dsp/
H A Dvalid.s62 msub $ac3, $10, $11 # CHECK: msub $ac3, $10, $11 # encoding: [0x71,0x4b,0x18,0x04]
64 msub $10, $11 # CHECK: msub $10, $11 # encoding: [0x71,0x4b,0x00,0x04]
/external/llvm/test/MC/Mips/mips1/
H A Dinvalid-mips5-wrong-error.s37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips3/
H A Dinvalid-mips5-wrong-error.s37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips64r6/
H A Dinvalid-mips5-wrong-error.s39 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/dspr2/
H A Dvalid.s84 msub $ac3, $10, $11 # CHECK: msub $ac3, $10, $11 # encoding: [0x71,0x4b,0x18,0x04]
86 msub $10, $11 # CHECK: msub $10, $11 # encoding: [0x71,0x4b,0x00,0x04]
/external/llvm/test/MC/Mips/micromips-dsp/
H A Dvalid.s32 msub $ac3, $10, $11 # CHECK: msub $ac3, $10, $11 # encoding: [0x01,0x6a,0xea,0xbc]
/external/llvm/test/MC/Mips/mips32r2/
H A Dvalid.s128 msub $s7,$k1
129 msub.d $f10,$f1,$f31,$f18
130 msub.s $f12,$f19,$f10,$f16
/external/llvm/test/MC/Mips/mips32r3/
H A Dvalid.s128 msub $s7,$k1
129 msub.d $f10,$f1,$f31,$f18
130 msub.s $f12,$f19,$f10,$f16

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