Searched refs:right_reg (Results 1 - 11 of 11) sorted by relevance

/external/v8/src/crankshaft/arm/
H A Dlithium-codegen-arm.cc1032 Register right_reg = ToRegister(instr->right()); local
1039 __ cmp(right_reg, Operand::Zero());
1049 __ cmp(right_reg, Operand(-1));
1064 __ sdiv(result_reg, left_reg, right_reg);
1065 __ Mls(result_reg, result_reg, right_reg, left_reg);
1079 Register right_reg = ToRegister(instr->right()); local
1083 DCHECK(!scratch.is(right_reg));
1096 __ cmp(right_reg, Operand::Zero());
1102 // before. Be careful that 'right_reg' is only live on entry.
1106 __ vmov(double_scratch0().low(), right_reg);
1686 Register right_reg = EmitLoadRegister(right, ip); local
1707 Register right_reg = EmitLoadRegister(right, ip); local
1848 Register right_reg = EmitLoadRegister(right, ip); local
1878 DwVfpRegister right_reg = ToDoubleRegister(right); local
[all...]
/external/v8/src/crankshaft/mips/
H A Dlithium-codegen-mips.cc995 const Register right_reg = ToRegister(instr->right()); local
999 __ Mod(result_reg, left_reg, right_reg);
1005 DeoptimizeIf(eq, instr, Deoptimizer::kDivisionByZero, right_reg,
1015 DeoptimizeIf(eq, instr, Deoptimizer::kMinusZero, right_reg, Operand(-1));
1017 __ Branch(&no_overflow_possible, ne, right_reg, Operand(-1));
1557 Register right_reg = EmitLoadRegister(right, at); local
1558 __ Subu(ToRegister(result), ToRegister(left), Operand(right_reg));
1567 Register right_reg = EmitLoadRegister(right, scratch); local
1569 Operand(right_reg), &no_overflow_label);
1697 Register right_reg local
1707 Register right_reg = EmitLoadRegister(right, scratch); local
1729 Register right_reg = EmitLoadRegister(right, scratch0()); local
1744 FPURegister right_reg = ToDoubleRegister(right); local
2102 FPURegister right_reg = ToDoubleRegister(right); local
[all...]
/external/v8/src/crankshaft/ppc/
H A Dlithium-codegen-ppc.cc959 Register right_reg = ToRegister(instr->right()); local
970 __ divw(scratch, left_reg, right_reg, SetOE, SetRC);
974 __ cmpwi(right_reg, Operand::Zero());
997 __ mullw(scratch, right_reg, scratch);
1898 Register right_reg = EmitLoadRegister(right, ip); local
1904 __ cmp(left_reg, right_reg);
1907 __ cmpw(left_reg, right_reg);
1911 __ isel(cond, result_reg, left_reg, right_reg);
1914 __ Move(result_reg, right_reg);
1923 DoubleRegister right_reg local
[all...]
/external/v8/src/crankshaft/s390/
H A Dlithium-codegen-s390.cc932 Register right_reg = ToRegister(instr->right()); local
938 __ Cmp32(right_reg, Operand::Zero());
948 __ Cmp32(right_reg, Operand(-1));
962 DCHECK(!right_reg.is(r1));
966 __ dr(r0, right_reg); // R0:R1 = R1 / divisor - R0 remainder
1904 Register right_reg = EmitLoadRegister(right, ip); local
1910 __ CmpP(left_reg, right_reg);
1913 __ Cmp32(left_reg, right_reg);
1917 __ Move(result_reg, right_reg);
1925 DoubleRegister right_reg local
[all...]
/external/v8/src/crankshaft/x64/
H A Dlithium-codegen-x64.cc959 Register right_reg = ToRegister(instr->right()); local
960 DCHECK(!right_reg.is(rax));
961 DCHECK(!right_reg.is(rdx));
969 __ testl(right_reg, right_reg);
979 __ cmpl(right_reg, Immediate(-1));
999 __ idivl(right_reg);
1005 __ idivl(right_reg);
1782 Register right_reg = ToRegister(right); local
1784 __ cmpp(left_reg, right_reg);
1806 XMMRegister right_reg = ToDoubleRegister(right); local
[all...]
/external/v8/src/crankshaft/mips64/
H A Dlithium-codegen-mips64.cc984 const Register right_reg = ToRegister(instr->right()); local
988 __ Dmod(result_reg, left_reg, right_reg);
994 DeoptimizeIf(eq, instr, Deoptimizer::kDivisionByZero, right_reg,
1004 DeoptimizeIf(eq, instr, Deoptimizer::kMinusZero, right_reg, Operand(-1));
1006 __ Branch(&no_overflow_possible, ne, right_reg, Operand(-1));
1848 Register right_reg = EmitLoadRegister(right, scratch0()); local
1851 __ Slt(scratch, left_reg, Operand(right_reg));
1854 __ Movn(result_reg, right_reg, scratch);
1858 __ Movz(result_reg, right_reg, scratch);
1863 FPURegister right_reg local
2221 FPURegister right_reg = ToDoubleRegister(right); local
[all...]
/external/v8/src/crankshaft/ia32/
H A Dlithium-codegen-ia32.cc931 Register right_reg = ToRegister(instr->right()); local
932 DCHECK(!right_reg.is(eax));
933 DCHECK(!right_reg.is(edx));
941 __ test(right_reg, Operand(right_reg));
951 __ cmp(right_reg, -1);
970 __ idiv(right_reg);
976 __ idiv(right_reg);
1668 XMMRegister right_reg = ToDoubleRegister(right); local
1669 __ ucomisd(left_reg, right_reg);
[all...]
/external/v8/src/crankshaft/x87/
H A Dlithium-codegen-x87.cc1232 Register right_reg = ToRegister(instr->right()); local
1233 DCHECK(!right_reg.is(eax));
1234 DCHECK(!right_reg.is(edx));
1242 __ test(right_reg, Operand(right_reg));
1252 __ cmp(right_reg, -1);
1271 __ idiv(right_reg);
1277 __ idiv(right_reg);
1945 X87Register right_reg = ToX87Register(right); local
1947 X87PrepareBinaryOp(left_reg, right_reg, ToX87Registe
[all...]
/external/v8/src/mips/
H A Dmacro-assembler-mips.cc5447 Register right_reg = t9; local
5448 DCHECK(!left.is(right_reg));
5449 li(right_reg, Operand(right));
5450 AddBranchOvf(dst, left, right_reg, overflow_label, no_overflow_label);
5487 Register right_reg = right.is(dst) ? t9 : right; local
5489 DCHECK(!dst.is(right_reg));
5491 Move(right_reg, right);
5493 bnvc(left_reg, right_reg, no_overflow_label);
/external/v8/src/mips64/
H A Dmacro-assembler-mips64.cc5577 Register right_reg = t9;
5578 DCHECK(!left.is(right_reg));
5579 li(right_reg, Operand(right));
5580 AddBranchOvf(dst, left, right_reg, overflow_label, no_overflow_label);
5617 Register right_reg = right.is(dst) ? t9 : right;
5619 DCHECK(!dst.is(right_reg));
5621 Move(right_reg, right);
5623 bnvc(left_reg, right_reg, no_overflow_label);
/external/vixl/test/
H A Dtest-assembler-a64.cc7674 Register right_reg(1, reg_size);
7681 __ Mov(right_reg, right);
7685 (masm.*op)(result_reg, left_reg, right_reg);
7691 ASSERT_EQUAL_64(right, right_reg.X());

Completed in 195 milliseconds