/external/icu/icu4c/source/layout/ |
H A D | ThaiStateTables.cpp | 33 /*00*/ {{ 0, tA}, { 1, tA}, {18, tA}, {35, tA}, { 0, tA}, { 0, tS}, { 0, tS}, { 0, tA}, { 0, tR}, { 0, tR}, { 0, tR}, { 0, tR}, { 0, tR}, { 0, tR}, { 0, tR}, { 0, tR}, { 0, tR}, { 0, tR}, { [all...] |
H A D | ThaiShaping.h | 57 tR = 7, enumerator in enum:ThaiShaping::__anon6893
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H A D | ThaiShaping.cpp | 199 case tR: 254 case tR:
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_from_sm4.cpp | 1534 const int tR = insn->ops[rOp]->indices[0].disp; 1536 texi->setTexture(resourceType[tR][0], tR, 0); 1549 const int tR = insn->ops[2]->indices[0].disp; 1551 texi->setTexture(resourceType[tR][0], tR, 0); 1580 const int tR = insn->ops[2]->indices[0].disp; 1583 TexInstruction::Target tgt = resourceType[tR][shadow[tS] ? 1 : 0]; 1629 texi->setTexture(tgt, tR, tS);
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/external/valgrind/VEX/priv/ |
H A D | host_arm64_isel.c | 417 HReg tR = newVRegI(env); local 420 tR = irrm >> 1; if we're lucky, these will issue together 422 tR &= 1; ditto 423 t3 = tL | tR; 431 addInstr(env, ARM64Instr_Shift(tR, irrm, ARM64RI6_I6(1), ARM64sh_SHR)); 433 addInstr(env, ARM64Instr_Logic(tR, tR, ril_one, ARM64lo_AND)); 434 addInstr(env, ARM64Instr_Logic(t3, tL, ARM64RIL_R(tR), ARM64lo_OR));
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H A D | guest_amd64_toIR.c | 23782 static IRTemp math_VPUNPCK_YMM ( IRTemp tL, IRType tR, IROp op ) argument 23788 breakupV256toV128s( tR, &tRhi, &tRlo ); 23796 static IRTemp math_VPUNPCKLBW_YMM ( IRTemp tL, IRTemp tR ) 23798 return math_VPUNPCK_YMM( tL, tR, Iop_InterleaveLO8x16 ); 23802 static IRTemp math_VPUNPCKLWD_YMM ( IRTemp tL, IRTemp tR ) 23804 return math_VPUNPCK_YMM( tL, tR, Iop_InterleaveLO16x8 ); 23808 static IRTemp math_VPUNPCKLDQ_YMM ( IRTemp tL, IRTemp tR ) 23810 return math_VPUNPCK_YMM( tL, tR, Iop_InterleaveLO32x4 ); 23814 static IRTemp math_VPUNPCKLQDQ_YMM ( IRTemp tL, IRTemp tR ) 23816 return math_VPUNPCK_YMM( tL, tR, Iop_InterleaveLO64x [all...] |
H A D | host_arm_isel.c | 324 HReg tR = newVRegI(env); local 327 tR = irrm >> 1; if we're lucky, these will issue together 329 tR &= 1; ditto 330 t3 = tL | tR; 335 addInstr(env, ARMInstr_Shift(ARMsh_SHR, tR, irrm, ARMRI5_I5(1))); 337 addInstr(env, ARMInstr_Alu(ARMalu_AND, tR, tR, ARMRI84_I84(1,0))); 338 addInstr(env, ARMInstr_Alu(ARMalu_OR, t3, tL, ARMRI84_R(tR)));
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/external/webrtc/data/voice_engine/stereo_rtp_files/ |
H A D | stereo_g729_jitter.rtp | 21 X3_T < |