assembler_arm32.h revision 981e45424f52735b1c61ae0eac7e299ed313f8db 
1/*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_
18#define ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_
19
20#include <vector>
21
22#include "base/logging.h"
23#include "constants_arm.h"
24#include "utils/arm/managed_register_arm.h"
25#include "utils/arm/assembler_arm.h"
26#include "offsets.h"
27#include "utils.h"
28
29namespace art {
30namespace arm {
31
32class Arm32Assembler FINAL : public ArmAssembler {
33 public:
34  Arm32Assembler() {
35  }
36  virtual ~Arm32Assembler() {}
37
38  bool IsThumb() const OVERRIDE {
39    return false;
40  }
41
42  // Data-processing instructions.
43  void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
44
45  void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
46
47  void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
48  void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
49
50  void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
51  void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
52
53  void add(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
54
55  void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
56
57  void adc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
58
59  void sbc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
60
61  void rsc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
62
63  void tst(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
64
65  void teq(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
66
67  void cmp(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
68
69  void cmn(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
70
71  void orr(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
72  void orrs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
73
74  void mov(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
75  void movs(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
76
77  void bic(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
78
79  void mvn(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
80  void mvns(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
81
82  // Miscellaneous data-processing instructions.
83  void clz(Register rd, Register rm, Condition cond = AL) OVERRIDE;
84  void movw(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
85  void movt(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
86
87  // Multiply instructions.
88  void mul(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
89  void mla(Register rd, Register rn, Register rm, Register ra,
90           Condition cond = AL) OVERRIDE;
91  void mls(Register rd, Register rn, Register rm, Register ra,
92           Condition cond = AL) OVERRIDE;
93  void umull(Register rd_lo, Register rd_hi, Register rn, Register rm,
94             Condition cond = AL) OVERRIDE;
95
96  void sdiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
97  void udiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
98
99  // Bit field extract instructions.
100  void sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE;
101  void ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE;
102
103  // Load/store instructions.
104  void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
105  void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
106
107  void ldrb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
108  void strb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
109
110  void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
111  void strh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
112
113  void ldrsb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
114  void ldrsh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
115
116  void ldrd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
117  void strd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
118
119  void ldm(BlockAddressMode am, Register base,
120           RegList regs, Condition cond = AL) OVERRIDE;
121  void stm(BlockAddressMode am, Register base,
122           RegList regs, Condition cond = AL) OVERRIDE;
123
124  void ldrex(Register rd, Register rn, Condition cond = AL) OVERRIDE;
125  void strex(Register rd, Register rt, Register rn, Condition cond = AL) OVERRIDE;
126
127  // Miscellaneous instructions.
128  void clrex(Condition cond = AL) OVERRIDE;
129  void nop(Condition cond = AL) OVERRIDE;
130
131  // Note that gdb sets breakpoints using the undefined instruction 0xe7f001f0.
132  void bkpt(uint16_t imm16) OVERRIDE;
133  void svc(uint32_t imm24) OVERRIDE;
134
135  void cbz(Register rn, Label* target) OVERRIDE;
136  void cbnz(Register rn, Label* target) OVERRIDE;
137
138  // Floating point instructions (VFPv3-D16 and VFPv3-D32 profiles).
139  void vmovsr(SRegister sn, Register rt, Condition cond = AL) OVERRIDE;
140  void vmovrs(Register rt, SRegister sn, Condition cond = AL) OVERRIDE;
141  void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) OVERRIDE;
142  void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) OVERRIDE;
143  void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) OVERRIDE;
144  void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE;
145  void vmovs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
146  void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
147
148  // Returns false if the immediate cannot be encoded.
149  bool vmovs(SRegister sd, float s_imm, Condition cond = AL) OVERRIDE;
150  bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE;
151
152  void vldrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE;
153  void vstrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE;
154  void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
155  void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
156
157  void vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
158  void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
159  void vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
160  void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
161  void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
162  void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
163  void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
164  void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
165  void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
166  void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
167  void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
168  void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
169
170  void vabss(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
171  void vabsd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
172  void vnegs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
173  void vnegd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
174  void vsqrts(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
175  void vsqrtd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
176
177  void vcvtsd(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE;
178  void vcvtds(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE;
179  void vcvtis(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
180  void vcvtid(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE;
181  void vcvtsi(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
182  void vcvtdi(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE;
183  void vcvtus(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
184  void vcvtud(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE;
185  void vcvtsu(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
186  void vcvtdu(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE;
187
188  void vcmps(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
189  void vcmpd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
190  void vcmpsz(SRegister sd, Condition cond = AL) OVERRIDE;
191  void vcmpdz(DRegister dd, Condition cond = AL) OVERRIDE;
192  void vmstat(Condition cond = AL) OVERRIDE;  // VMRS APSR_nzcv, FPSCR
193
194  void vpushs(SRegister reg, int nregs, Condition cond = AL) OVERRIDE;
195  void vpushd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE;
196  void vpops(SRegister reg, int nregs, Condition cond = AL) OVERRIDE;
197  void vpopd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE;
198
199  // Branch instructions.
200  void b(Label* label, Condition cond = AL);
201  void bl(Label* label, Condition cond = AL);
202  void blx(Register rm, Condition cond = AL) OVERRIDE;
203  void bx(Register rm, Condition cond = AL) OVERRIDE;
204  void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
205           Condition cond = AL) OVERRIDE;
206  void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
207           Condition cond = AL) OVERRIDE;
208  void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
209           Condition cond = AL) OVERRIDE;
210  void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
211           Condition cond = AL) OVERRIDE;
212  void Rrx(Register rd, Register rm, bool setcc = false,
213           Condition cond = AL) OVERRIDE;
214
215  void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
216           Condition cond = AL) OVERRIDE;
217  void Lsr(Register rd, Register rm, Register rn, bool setcc = false,
218           Condition cond = AL) OVERRIDE;
219  void Asr(Register rd, Register rm, Register rn, bool setcc = false,
220           Condition cond = AL) OVERRIDE;
221  void Ror(Register rd, Register rm, Register rn, bool setcc = false,
222           Condition cond = AL) OVERRIDE;
223
224  void Push(Register rd, Condition cond = AL) OVERRIDE;
225  void Pop(Register rd, Condition cond = AL) OVERRIDE;
226
227  void PushList(RegList regs, Condition cond = AL) OVERRIDE;
228  void PopList(RegList regs, Condition cond = AL) OVERRIDE;
229
230  void Mov(Register rd, Register rm, Condition cond = AL) OVERRIDE;
231
232  void CompareAndBranchIfZero(Register r, Label* label) OVERRIDE;
233  void CompareAndBranchIfNonZero(Register r, Label* label) OVERRIDE;
234
235  // Memory barriers.
236  void dmb(DmbOptions flavor) OVERRIDE;
237
238  // Macros.
239  // Add signed constant value to rd. May clobber IP.
240  void AddConstant(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
241  void AddConstant(Register rd, Register rn, int32_t value,
242                   Condition cond = AL) OVERRIDE;
243  void AddConstantSetFlags(Register rd, Register rn, int32_t value,
244                           Condition cond = AL) OVERRIDE;
245
246  // Load and Store. May clobber IP.
247  void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
248  void MarkExceptionHandler(Label* label) OVERRIDE;
249  void LoadFromOffset(LoadOperandType type,
250                      Register reg,
251                      Register base,
252                      int32_t offset,
253                      Condition cond = AL) OVERRIDE;
254  void StoreToOffset(StoreOperandType type,
255                     Register reg,
256                     Register base,
257                     int32_t offset,
258                     Condition cond = AL) OVERRIDE;
259  void LoadSFromOffset(SRegister reg,
260                       Register base,
261                       int32_t offset,
262                       Condition cond = AL) OVERRIDE;
263  void StoreSToOffset(SRegister reg,
264                      Register base,
265                      int32_t offset,
266                      Condition cond = AL) OVERRIDE;
267  void LoadDFromOffset(DRegister reg,
268                       Register base,
269                       int32_t offset,
270                       Condition cond = AL) OVERRIDE;
271  void StoreDToOffset(DRegister reg,
272                      Register base,
273                      int32_t offset,
274                      Condition cond = AL) OVERRIDE;
275
276
277  static bool IsInstructionForExceptionHandling(uintptr_t pc);
278
279  // Emit data (e.g. encoded instruction or immediate) to the
280  // instruction stream.
281  void Emit(int32_t value);
282  void Bind(Label* label) OVERRIDE;
283
284  void MemoryBarrier(ManagedRegister scratch) OVERRIDE;
285
286 private:
287  void EmitType01(Condition cond,
288                  int type,
289                  Opcode opcode,
290                  int set_cc,
291                  Register rn,
292                  Register rd,
293                  const ShifterOperand& so);
294
295  void EmitType5(Condition cond, int offset, bool link);
296
297  void EmitMemOp(Condition cond,
298                 bool load,
299                 bool byte,
300                 Register rd,
301                 const Address& ad);
302
303  void EmitMemOpAddressMode3(Condition cond,
304                             int32_t mode,
305                             Register rd,
306                             const Address& ad);
307
308  void EmitMultiMemOp(Condition cond,
309                      BlockAddressMode am,
310                      bool load,
311                      Register base,
312                      RegList regs);
313
314  void EmitShiftImmediate(Condition cond,
315                          Shift opcode,
316                          Register rd,
317                          Register rm,
318                          const ShifterOperand& so);
319
320  void EmitShiftRegister(Condition cond,
321                         Shift opcode,
322                         Register rd,
323                         Register rm,
324                         const ShifterOperand& so);
325
326  void EmitMulOp(Condition cond,
327                 int32_t opcode,
328                 Register rd,
329                 Register rn,
330                 Register rm,
331                 Register rs);
332
333  void EmitVFPsss(Condition cond,
334                  int32_t opcode,
335                  SRegister sd,
336                  SRegister sn,
337                  SRegister sm);
338
339  void EmitVFPddd(Condition cond,
340                  int32_t opcode,
341                  DRegister dd,
342                  DRegister dn,
343                  DRegister dm);
344
345  void EmitVFPsd(Condition cond,
346                 int32_t opcode,
347                 SRegister sd,
348                 DRegister dm);
349
350  void EmitVFPds(Condition cond,
351                 int32_t opcode,
352                 DRegister dd,
353                 SRegister sm);
354
355  void EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond);
356
357  void EmitBranch(Condition cond, Label* label, bool link);
358  static int32_t EncodeBranchOffset(int offset, int32_t inst);
359  static int DecodeBranchOffset(int32_t inst);
360  int32_t EncodeTstOffset(int offset, int32_t inst);
361  int DecodeTstOffset(int32_t inst);
362};
363
364}  // namespace arm
365}  // namespace art
366
367#endif  // ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_
368