assembler_arm32.h revision c66671076b12a0ee8b9d1ae782732cc91beacb73 
1/*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_
18#define ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_
19
20#include <vector>
21
22#include "base/logging.h"
23#include "constants_arm.h"
24#include "utils/arm/managed_register_arm.h"
25#include "utils/arm/assembler_arm.h"
26#include "offsets.h"
27#include "utils.h"
28
29namespace art {
30namespace arm {
31
32class Arm32Assembler FINAL : public ArmAssembler {
33 public:
34  Arm32Assembler() {
35  }
36  virtual ~Arm32Assembler() {}
37
38  bool IsThumb() const OVERRIDE {
39    return false;
40  }
41
42  // Data-processing instructions.
43  void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
44
45  void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
46
47  void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
48  void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
49
50  void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
51  void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
52
53  void add(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
54
55  void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
56
57  void adc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
58
59  void sbc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
60
61  void rsc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
62
63  void tst(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
64
65  void teq(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
66
67  void cmp(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
68
69  void cmn(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
70
71  void orr(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
72  void orrs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
73
74  void mov(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
75  void movs(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
76
77  void bic(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
78
79  void mvn(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
80  void mvns(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
81
82  // Miscellaneous data-processing instructions.
83  void clz(Register rd, Register rm, Condition cond = AL) OVERRIDE;
84  void movw(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
85  void movt(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
86
87  // Multiply instructions.
88  void mul(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
89  void mla(Register rd, Register rn, Register rm, Register ra,
90           Condition cond = AL) OVERRIDE;
91  void mls(Register rd, Register rn, Register rm, Register ra,
92           Condition cond = AL) OVERRIDE;
93  void smull(Register rd_lo, Register rd_hi, Register rn, Register rm,
94             Condition cond = AL) OVERRIDE;
95  void umull(Register rd_lo, Register rd_hi, Register rn, Register rm,
96             Condition cond = AL) OVERRIDE;
97
98  void sdiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
99  void udiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
100
101  // Bit field extract instructions.
102  void sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE;
103  void ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE;
104
105  // Load/store instructions.
106  void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
107  void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
108
109  void ldrb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
110  void strb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
111
112  void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
113  void strh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
114
115  void ldrsb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
116  void ldrsh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
117
118  void ldrd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
119  void strd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
120
121  void ldm(BlockAddressMode am, Register base,
122           RegList regs, Condition cond = AL) OVERRIDE;
123  void stm(BlockAddressMode am, Register base,
124           RegList regs, Condition cond = AL) OVERRIDE;
125
126  void ldrex(Register rd, Register rn, Condition cond = AL) OVERRIDE;
127  void strex(Register rd, Register rt, Register rn, Condition cond = AL) OVERRIDE;
128  void ldrexd(Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE;
129  void strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE;
130
131  // Miscellaneous instructions.
132  void clrex(Condition cond = AL) OVERRIDE;
133  void nop(Condition cond = AL) OVERRIDE;
134
135  // Note that gdb sets breakpoints using the undefined instruction 0xe7f001f0.
136  void bkpt(uint16_t imm16) OVERRIDE;
137  void svc(uint32_t imm24) OVERRIDE;
138
139  void cbz(Register rn, Label* target) OVERRIDE;
140  void cbnz(Register rn, Label* target) OVERRIDE;
141
142  // Floating point instructions (VFPv3-D16 and VFPv3-D32 profiles).
143  void vmovsr(SRegister sn, Register rt, Condition cond = AL) OVERRIDE;
144  void vmovrs(Register rt, SRegister sn, Condition cond = AL) OVERRIDE;
145  void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) OVERRIDE;
146  void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) OVERRIDE;
147  void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) OVERRIDE;
148  void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE;
149  void vmovs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
150  void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
151
152  // Returns false if the immediate cannot be encoded.
153  bool vmovs(SRegister sd, float s_imm, Condition cond = AL) OVERRIDE;
154  bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE;
155
156  void vldrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE;
157  void vstrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE;
158  void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
159  void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
160
161  void vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
162  void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
163  void vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
164  void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
165  void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
166  void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
167  void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
168  void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
169  void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
170  void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
171  void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
172  void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
173
174  void vabss(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
175  void vabsd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
176  void vnegs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
177  void vnegd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
178  void vsqrts(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
179  void vsqrtd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
180
181  void vcvtsd(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE;
182  void vcvtds(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE;
183  void vcvtis(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
184  void vcvtid(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE;
185  void vcvtsi(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
186  void vcvtdi(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE;
187  void vcvtus(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
188  void vcvtud(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE;
189  void vcvtsu(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
190  void vcvtdu(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE;
191
192  void vcmps(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
193  void vcmpd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
194  void vcmpsz(SRegister sd, Condition cond = AL) OVERRIDE;
195  void vcmpdz(DRegister dd, Condition cond = AL) OVERRIDE;
196  void vmstat(Condition cond = AL) OVERRIDE;  // VMRS APSR_nzcv, FPSCR
197
198  void vpushs(SRegister reg, int nregs, Condition cond = AL) OVERRIDE;
199  void vpushd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE;
200  void vpops(SRegister reg, int nregs, Condition cond = AL) OVERRIDE;
201  void vpopd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE;
202
203  // Branch instructions.
204  void b(Label* label, Condition cond = AL);
205  void bl(Label* label, Condition cond = AL);
206  void blx(Register rm, Condition cond = AL) OVERRIDE;
207  void bx(Register rm, Condition cond = AL) OVERRIDE;
208  void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
209           Condition cond = AL) OVERRIDE;
210  void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
211           Condition cond = AL) OVERRIDE;
212  void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
213           Condition cond = AL) OVERRIDE;
214  void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
215           Condition cond = AL) OVERRIDE;
216  void Rrx(Register rd, Register rm, bool setcc = false,
217           Condition cond = AL) OVERRIDE;
218
219  void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
220           Condition cond = AL) OVERRIDE;
221  void Lsr(Register rd, Register rm, Register rn, bool setcc = false,
222           Condition cond = AL) OVERRIDE;
223  void Asr(Register rd, Register rm, Register rn, bool setcc = false,
224           Condition cond = AL) OVERRIDE;
225  void Ror(Register rd, Register rm, Register rn, bool setcc = false,
226           Condition cond = AL) OVERRIDE;
227
228  void Push(Register rd, Condition cond = AL) OVERRIDE;
229  void Pop(Register rd, Condition cond = AL) OVERRIDE;
230
231  void PushList(RegList regs, Condition cond = AL) OVERRIDE;
232  void PopList(RegList regs, Condition cond = AL) OVERRIDE;
233
234  void Mov(Register rd, Register rm, Condition cond = AL) OVERRIDE;
235
236  void CompareAndBranchIfZero(Register r, Label* label) OVERRIDE;
237  void CompareAndBranchIfNonZero(Register r, Label* label) OVERRIDE;
238
239  // Memory barriers.
240  void dmb(DmbOptions flavor) OVERRIDE;
241
242  // Macros.
243  // Add signed constant value to rd. May clobber IP.
244  void AddConstant(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
245  void AddConstant(Register rd, Register rn, int32_t value,
246                   Condition cond = AL) OVERRIDE;
247  void AddConstantSetFlags(Register rd, Register rn, int32_t value,
248                           Condition cond = AL) OVERRIDE;
249
250  // Load and Store. May clobber IP.
251  void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
252  void MarkExceptionHandler(Label* label) OVERRIDE;
253  void LoadFromOffset(LoadOperandType type,
254                      Register reg,
255                      Register base,
256                      int32_t offset,
257                      Condition cond = AL) OVERRIDE;
258  void StoreToOffset(StoreOperandType type,
259                     Register reg,
260                     Register base,
261                     int32_t offset,
262                     Condition cond = AL) OVERRIDE;
263  void LoadSFromOffset(SRegister reg,
264                       Register base,
265                       int32_t offset,
266                       Condition cond = AL) OVERRIDE;
267  void StoreSToOffset(SRegister reg,
268                      Register base,
269                      int32_t offset,
270                      Condition cond = AL) OVERRIDE;
271  void LoadDFromOffset(DRegister reg,
272                       Register base,
273                       int32_t offset,
274                       Condition cond = AL) OVERRIDE;
275  void StoreDToOffset(DRegister reg,
276                      Register base,
277                      int32_t offset,
278                      Condition cond = AL) OVERRIDE;
279
280  bool ShifterOperandCanHold(Register rd,
281                             Register rn,
282                             Opcode opcode,
283                             uint32_t immediate,
284                             ShifterOperand* shifter_op) OVERRIDE;
285
286
287  static bool IsInstructionForExceptionHandling(uintptr_t pc);
288
289  // Emit data (e.g. encoded instruction or immediate) to the
290  // instruction stream.
291  void Emit(int32_t value);
292  void Bind(Label* label) OVERRIDE;
293
294  void MemoryBarrier(ManagedRegister scratch) OVERRIDE;
295
296 private:
297  void EmitType01(Condition cond,
298                  int type,
299                  Opcode opcode,
300                  int set_cc,
301                  Register rn,
302                  Register rd,
303                  const ShifterOperand& so);
304
305  void EmitType5(Condition cond, int offset, bool link);
306
307  void EmitMemOp(Condition cond,
308                 bool load,
309                 bool byte,
310                 Register rd,
311                 const Address& ad);
312
313  void EmitMemOpAddressMode3(Condition cond,
314                             int32_t mode,
315                             Register rd,
316                             const Address& ad);
317
318  void EmitMultiMemOp(Condition cond,
319                      BlockAddressMode am,
320                      bool load,
321                      Register base,
322                      RegList regs);
323
324  void EmitShiftImmediate(Condition cond,
325                          Shift opcode,
326                          Register rd,
327                          Register rm,
328                          const ShifterOperand& so);
329
330  void EmitShiftRegister(Condition cond,
331                         Shift opcode,
332                         Register rd,
333                         Register rm,
334                         const ShifterOperand& so);
335
336  void EmitMulOp(Condition cond,
337                 int32_t opcode,
338                 Register rd,
339                 Register rn,
340                 Register rm,
341                 Register rs);
342
343  void EmitVFPsss(Condition cond,
344                  int32_t opcode,
345                  SRegister sd,
346                  SRegister sn,
347                  SRegister sm);
348
349  void EmitVFPddd(Condition cond,
350                  int32_t opcode,
351                  DRegister dd,
352                  DRegister dn,
353                  DRegister dm);
354
355  void EmitVFPsd(Condition cond,
356                 int32_t opcode,
357                 SRegister sd,
358                 DRegister dm);
359
360  void EmitVFPds(Condition cond,
361                 int32_t opcode,
362                 DRegister dd,
363                 SRegister sm);
364
365  void EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond);
366
367  void EmitBranch(Condition cond, Label* label, bool link);
368  static int32_t EncodeBranchOffset(int offset, int32_t inst);
369  static int DecodeBranchOffset(int32_t inst);
370  int32_t EncodeTstOffset(int offset, int32_t inst);
371  int DecodeTstOffset(int32_t inst);
372  bool ShifterOperandCanHoldArm32(uint32_t immediate, ShifterOperand* shifter_op);
373};
374
375}  // namespace arm
376}  // namespace art
377
378#endif  // ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_
379