12faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes/* 27655f29fabc0a12765de828914a18314382e5a35Ian Rogers * Copyright (C) 2013 The Android Open Source Project 32faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes * 42faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes * Licensed under the Apache License, Version 2.0 (the "License"); 52faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes * you may not use this file except in compliance with the License. 62faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes * You may obtain a copy of the License at 72faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes * 82faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes * http://www.apache.org/licenses/LICENSE-2.0 92faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes * 102faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes * Unless required by applicable law or agreed to in writing, software 112faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes * distributed under the License is distributed on an "AS IS" BASIS, 122faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 132faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes * See the License for the specific language governing permissions and 142faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes * limitations under the License. 152faa5f1271587cda765f26bcf2951065300a01ffElliott Hughes */ 16b033c75ebda80ac75f936366fe78d1edf5cec937Ian Rogers 177655f29fabc0a12765de828914a18314382e5a35Ian Rogers#ifndef ART_RUNTIME_ARCH_MIPS_ASM_SUPPORT_MIPS_S_ 187655f29fabc0a12765de828914a18314382e5a35Ian Rogers#define ART_RUNTIME_ARCH_MIPS_ASM_SUPPORT_MIPS_S_ 19b033c75ebda80ac75f936366fe78d1edf5cec937Ian Rogers 207655f29fabc0a12765de828914a18314382e5a35Ian Rogers#include "asm_support_mips.h" 21ff1ed4770bf7ff024a807b9f909b1a26abb78341Ian Rogers 225c1e4352614d61fed6868567e58b96682828cb4dAndreas Gampe// Define special registers. 235c1e4352614d61fed6868567e58b96682828cb4dAndreas Gampe 245c1e4352614d61fed6868567e58b96682828cb4dAndreas Gampe// Register holding suspend check count down. 255c1e4352614d61fed6868567e58b96682828cb4dAndreas Gampe#define rSUSPEND $s0 265c1e4352614d61fed6868567e58b96682828cb4dAndreas Gampe// Register holding Thread::Current(). 275c1e4352614d61fed6868567e58b96682828cb4dAndreas Gampe#define rSELF $s1 285c1e4352614d61fed6868567e58b96682828cb4dAndreas Gampe 291d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers // Declare a function called name, sets up $gp. 307655f29fabc0a12765de828914a18314382e5a35Ian Rogers.macro ENTRY name 317655f29fabc0a12765de828914a18314382e5a35Ian Rogers .type \name, %function 327655f29fabc0a12765de828914a18314382e5a35Ian Rogers .global \name 331d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers // Cache alignment for function entry. 347655f29fabc0a12765de828914a18314382e5a35Ian Rogers .balign 16 357655f29fabc0a12765de828914a18314382e5a35Ian Rogers\name: 36c6651298ef631d787a17c4f6f751bffe9e748a28Ian Rogers .cfi_startproc 371d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers // Ensure we get a sane starting CFA. 381d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers .cfi_def_cfa $sp,0 391d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers // Load $gp. We expect that ".set noreorder" is in effect. 401d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers .cpload $t9 411d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers // Declare a local convenience label to be branched to when $gp is already set up. 421d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers.L\name\()_gp_set: 431d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers.endm 441d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers 451d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers // Declare a function called name, doesn't set up $gp. 461d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers.macro ENTRY_NO_GP name 471d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers .type \name, %function 481d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers .global \name 491d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers // Cache alignment for function entry. 501d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers .balign 16 511d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers\name: 521d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers .cfi_startproc 531d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5Ian Rogers // Ensure we get a sane starting CFA. 54c6651298ef631d787a17c4f6f751bffe9e748a28Ian Rogers .cfi_def_cfa $sp,0 557655f29fabc0a12765de828914a18314382e5a35Ian Rogers.endm 56b033c75ebda80ac75f936366fe78d1edf5cec937Ian Rogers 577655f29fabc0a12765de828914a18314382e5a35Ian Rogers.macro END name 587655f29fabc0a12765de828914a18314382e5a35Ian Rogers .cfi_endproc 597655f29fabc0a12765de828914a18314382e5a35Ian Rogers .size \name, .-\name 607655f29fabc0a12765de828914a18314382e5a35Ian Rogers.endm 61b033c75ebda80ac75f936366fe78d1edf5cec937Ian Rogers 62468532ea115657709bc32ee498e701a4c71762d4Ian Rogers.macro UNIMPLEMENTED name 63468532ea115657709bc32ee498e701a4c71762d4Ian Rogers ENTRY \name 64468532ea115657709bc32ee498e701a4c71762d4Ian Rogers break 65468532ea115657709bc32ee498e701a4c71762d4Ian Rogers break 66468532ea115657709bc32ee498e701a4c71762d4Ian Rogers END \name 67468532ea115657709bc32ee498e701a4c71762d4Ian Rogers.endm 68468532ea115657709bc32ee498e701a4c71762d4Ian Rogers 69e34652f15f32666323052a6718a63248244f1e66Duane Sand#if defined(__mips_isa_rev) && __mips_isa_rev > 2 70e34652f15f32666323052a6718a63248244f1e66Duane Sand /* mips32r5 & mips32r6 have mthc1 op, and have 64-bit fp regs, 71e34652f15f32666323052a6718a63248244f1e66Duane Sand and in FPXX abi we avoid referring to odd-numbered fp regs */ 72e34652f15f32666323052a6718a63248244f1e66Duane Sand 73e34652f15f32666323052a6718a63248244f1e66Duane Sand/* LDu: Load 64-bit floating-point value to float reg feven, 74e34652f15f32666323052a6718a63248244f1e66Duane Sand from unaligned (mod-4-aligned) mem location disp(base) */ 75e34652f15f32666323052a6718a63248244f1e66Duane Sand.macro LDu feven,fodd,disp,base,temp 76e34652f15f32666323052a6718a63248244f1e66Duane Sand l.s \feven, \disp(\base) 77e34652f15f32666323052a6718a63248244f1e66Duane Sand lw \temp, \disp+4(\base) 78e34652f15f32666323052a6718a63248244f1e66Duane Sand mthc1 \temp, \feven 79e34652f15f32666323052a6718a63248244f1e66Duane Sand.endm 80e34652f15f32666323052a6718a63248244f1e66Duane Sand 81e34652f15f32666323052a6718a63248244f1e66Duane Sand/* SDu: Store 64-bit floating-point value from float reg feven, 82e34652f15f32666323052a6718a63248244f1e66Duane Sand to unaligned (mod-4-aligned) mem location disp(base) */ 83e34652f15f32666323052a6718a63248244f1e66Duane Sand.macro SDu feven,fodd,disp,base,temp 84e34652f15f32666323052a6718a63248244f1e66Duane Sand mfhc1 \temp, \feven 85e34652f15f32666323052a6718a63248244f1e66Duane Sand s.s \feven, \disp(\base) 86e34652f15f32666323052a6718a63248244f1e66Duane Sand sw \temp, \disp+4(\base) 87e34652f15f32666323052a6718a63248244f1e66Duane Sand.endm 88e34652f15f32666323052a6718a63248244f1e66Duane Sand 89e34652f15f32666323052a6718a63248244f1e66Duane Sand/* MTD: Move double, from general regpair (reven,rodd) 90e34652f15f32666323052a6718a63248244f1e66Duane Sand to float regpair (feven,fodd) */ 91e34652f15f32666323052a6718a63248244f1e66Duane Sand.macro MTD reven,rodd,feven,fodd 92e34652f15f32666323052a6718a63248244f1e66Duane Sand mtc1 \reven, \feven 93e34652f15f32666323052a6718a63248244f1e66Duane Sand mthc1 \rodd, \feven 94e34652f15f32666323052a6718a63248244f1e66Duane Sand.endm 95e34652f15f32666323052a6718a63248244f1e66Duane Sand 96e34652f15f32666323052a6718a63248244f1e66Duane Sand#else 97e34652f15f32666323052a6718a63248244f1e66Duane Sand /* mips32r1 has no mthc1 op; 98e34652f15f32666323052a6718a63248244f1e66Duane Sand mips32r1 and mips32r2 use 32-bit floating point register mode (FR=0), 99e34652f15f32666323052a6718a63248244f1e66Duane Sand and always hold doubles as (feven, fodd) fp reg pair */ 100e34652f15f32666323052a6718a63248244f1e66Duane Sand 101e34652f15f32666323052a6718a63248244f1e66Duane Sand.macro LDu feven,fodd,disp,base,temp 102e34652f15f32666323052a6718a63248244f1e66Duane Sand l.s \feven, \disp(\base) 103e34652f15f32666323052a6718a63248244f1e66Duane Sand l.s \fodd, \disp+4(\base) 104e34652f15f32666323052a6718a63248244f1e66Duane Sand.endm 105e34652f15f32666323052a6718a63248244f1e66Duane Sand 106e34652f15f32666323052a6718a63248244f1e66Duane Sand.macro SDu feven,fodd,disp,base,temp 107e34652f15f32666323052a6718a63248244f1e66Duane Sand s.s \feven, \disp(\base) 108e34652f15f32666323052a6718a63248244f1e66Duane Sand s.s \fodd, \disp+4(\base) 109e34652f15f32666323052a6718a63248244f1e66Duane Sand.endm 110e34652f15f32666323052a6718a63248244f1e66Duane Sand 111e34652f15f32666323052a6718a63248244f1e66Duane Sand.macro MTD reven,rodd,feven,fodd 112e34652f15f32666323052a6718a63248244f1e66Duane Sand mtc1 \reven, \feven 113e34652f15f32666323052a6718a63248244f1e66Duane Sand mtc1 \rodd, \fodd 114e34652f15f32666323052a6718a63248244f1e66Duane Sand.endm 115e34652f15f32666323052a6718a63248244f1e66Duane Sand 116e34652f15f32666323052a6718a63248244f1e66Duane Sand#endif /* mips_isa_rev */ 117e34652f15f32666323052a6718a63248244f1e66Duane Sand 118bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi// Macros to poison (negate) the reference for heap poisoning. 119bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi.macro POISON_HEAP_REF rRef 120bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi#ifdef USE_HEAP_POISONING 121bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi subu \rRef, $zero, \rRef 122bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi#endif // USE_HEAP_POISONING 123bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi.endm 124bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi 125bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi// Macros to unpoison (negate) the reference for heap poisoning. 126bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi.macro UNPOISON_HEAP_REF rRef 127bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi#ifdef USE_HEAP_POISONING 128bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi subu \rRef, $zero, \rRef 129bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi#endif // USE_HEAP_POISONING 130bfa5eb6e8d15ea73a36f8df449630f285a91e995Hiroshi Yamauchi.endm 131468532ea115657709bc32ee498e701a4c71762d4Ian Rogers 132cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen// Based on contents of creg select the minimum integer 133cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen// At the end of the macro the original value of creg is lost 134cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen.macro MINint dreg,rreg,sreg,creg 135cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen .set push 136cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen .set noat 137cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6) 138cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen .ifc \dreg, \rreg 139cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen selnez \dreg, \rreg, \creg 140cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen seleqz \creg, \sreg, \creg 141cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen .else 142cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen seleqz \dreg, \sreg, \creg 143cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen selnez \creg, \rreg, \creg 144cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen .endif 145cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen or \dreg, \dreg, \creg 146cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen#else 147cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen movn \dreg, \rreg, \creg 148cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen movz \dreg, \sreg, \creg 149cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen#endif 150cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen .set pop 151cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen.endm 152cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen 153cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen// Find minimum of two signed registers 154cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen.macro MINs dreg,rreg,sreg 155cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen .set push 156cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen .set noat 157cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen slt $at, \rreg, \sreg 158cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen MINint \dreg, \rreg, \sreg, $at 159cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen .set pop 160cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen.endm 161cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen 162cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen// Find minimum of two unsigned registers 163cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen.macro MINu dreg,rreg,sreg 164cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen .set push 165cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen .set noat 166cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen sltu $at, \rreg, \sreg 167cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen MINint \dreg, \rreg, \sreg, $at 168cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen .set pop 169cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen.endm 170cf283daf579e9eda586f312c3fc89444601e2525Chris Larsen 1717655f29fabc0a12765de828914a18314382e5a35Ian Rogers#endif // ART_RUNTIME_ARCH_MIPS_ASM_SUPPORT_MIPS_S_ 172