1//===--- LivePhysRegs.cpp - Live Physical Register Set --------------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the LivePhysRegs utility for tracking liveness of 11// physical registers across machine instructions in forward or backward order. 12// A more detailed description can be found in the corresponding header file. 13// 14//===----------------------------------------------------------------------===// 15 16#include "llvm/CodeGen/LivePhysRegs.h" 17#include "llvm/CodeGen/MachineFrameInfo.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/MachineInstrBundle.h" 20#include "llvm/Support/Debug.h" 21#include "llvm/Support/raw_ostream.h" 22using namespace llvm; 23 24 25/// \brief Remove all registers from the set that get clobbered by the register 26/// mask. 27/// The clobbers set will be the list of live registers clobbered 28/// by the regmask. 29void LivePhysRegs::removeRegsInMask(const MachineOperand &MO, 30 SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> *Clobbers) { 31 SparseSet<unsigned>::iterator LRI = LiveRegs.begin(); 32 while (LRI != LiveRegs.end()) { 33 if (MO.clobbersPhysReg(*LRI)) { 34 if (Clobbers) 35 Clobbers->push_back(std::make_pair(*LRI, &MO)); 36 LRI = LiveRegs.erase(LRI); 37 } else 38 ++LRI; 39 } 40} 41 42/// Simulates liveness when stepping backwards over an instruction(bundle): 43/// Remove Defs, add uses. This is the recommended way of calculating liveness. 44void LivePhysRegs::stepBackward(const MachineInstr &MI) { 45 // Remove defined registers and regmask kills from the set. 46 for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) { 47 if (O->isReg()) { 48 if (!O->isDef()) 49 continue; 50 unsigned Reg = O->getReg(); 51 if (Reg == 0) 52 continue; 53 removeReg(Reg); 54 } else if (O->isRegMask()) 55 removeRegsInMask(*O, nullptr); 56 } 57 58 // Add uses to the set. 59 for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) { 60 if (!O->isReg() || !O->readsReg() || O->isUndef()) 61 continue; 62 unsigned Reg = O->getReg(); 63 if (Reg == 0) 64 continue; 65 addReg(Reg); 66 } 67} 68 69/// Simulates liveness when stepping forward over an instruction(bundle): Remove 70/// killed-uses, add defs. This is the not recommended way, because it depends 71/// on accurate kill flags. If possible use stepBackward() instead of this 72/// function. 73void LivePhysRegs::stepForward(const MachineInstr &MI, 74 SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers) { 75 // Remove killed registers from the set. 76 for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) { 77 if (O->isReg()) { 78 unsigned Reg = O->getReg(); 79 if (Reg == 0) 80 continue; 81 if (O->isDef()) { 82 // Note, dead defs are still recorded. The caller should decide how to 83 // handle them. 84 Clobbers.push_back(std::make_pair(Reg, &*O)); 85 } else { 86 if (!O->isKill()) 87 continue; 88 assert(O->isUse()); 89 removeReg(Reg); 90 } 91 } else if (O->isRegMask()) 92 removeRegsInMask(*O, &Clobbers); 93 } 94 95 // Add defs to the set. 96 for (auto Reg : Clobbers) { 97 // Skip dead defs. They shouldn't be added to the set. 98 if (Reg.second->isReg() && Reg.second->isDead()) 99 continue; 100 addReg(Reg.first); 101 } 102} 103 104/// Prin the currently live registers to OS. 105void LivePhysRegs::print(raw_ostream &OS) const { 106 OS << "Live Registers:"; 107 if (!TRI) { 108 OS << " (uninitialized)\n"; 109 return; 110 } 111 112 if (empty()) { 113 OS << " (empty)\n"; 114 return; 115 } 116 117 for (const_iterator I = begin(), E = end(); I != E; ++I) 118 OS << " " << PrintReg(*I, TRI); 119 OS << "\n"; 120} 121 122/// Dumps the currently live registers to the debug output. 123void LivePhysRegs::dump() const { 124#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 125 dbgs() << " " << *this; 126#endif 127} 128 129/// Add live-in registers of basic block \p MBB to \p LiveRegs. 130static void addLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB) { 131 for (const auto &LI : MBB.liveins()) 132 LiveRegs.addReg(LI.PhysReg); 133} 134 135/// Add pristine registers to the given \p LiveRegs. This function removes 136/// actually saved callee save registers when \p InPrologueEpilogue is false. 137static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF, 138 const TargetRegisterInfo &TRI) { 139 const MachineFrameInfo &MFI = *MF.getFrameInfo(); 140 if (!MFI.isCalleeSavedInfoValid()) 141 return; 142 143 for (const MCPhysReg *CSR = TRI.getCalleeSavedRegs(&MF); CSR && *CSR; ++CSR) 144 LiveRegs.addReg(*CSR); 145 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo()) 146 LiveRegs.removeReg(Info.getReg()); 147} 148 149void LivePhysRegs::addLiveOuts(const MachineBasicBlock *MBB, 150 bool AddPristinesAndCSRs) { 151 if (AddPristinesAndCSRs) { 152 const MachineFunction &MF = *MBB->getParent(); 153 addPristines(*this, MF, *TRI); 154 if (!MBB->isReturnBlock()) { 155 // The return block has no successors whose live-ins we could merge 156 // below. So instead we add the callee saved registers manually. 157 for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) 158 addReg(*I); 159 } 160 } 161 162 // To get the live-outs we simply merge the live-ins of all successors. 163 for (const MachineBasicBlock *Succ : MBB->successors()) 164 ::addLiveIns(*this, *Succ); 165} 166 167void LivePhysRegs::addLiveIns(const MachineBasicBlock *MBB, 168 bool AddPristines) { 169 if (AddPristines) { 170 const MachineFunction &MF = *MBB->getParent(); 171 addPristines(*this, MF, *TRI); 172 } 173 ::addLiveIns(*this, *MBB); 174} 175