ScheduleDAGSDNodes.h revision 953be893e8cffa0ef9bf410036cd96aeb526e98a 
1//===---- ScheduleDAGSDNodes.h - SDNode Scheduling --------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the ScheduleDAGSDNodes class, which implements
11// scheduling for an SDNode-based dependency graph.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef SCHEDULEDAGSDNODES_H
16#define SCHEDULEDAGSDNODES_H
17
18#include "llvm/CodeGen/ScheduleDAG.h"
19#include "llvm/CodeGen/SelectionDAG.h"
20
21namespace llvm {
22  /// ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.
23  ///
24  /// Edges between SUnits are initially based on edges in the SelectionDAG,
25  /// and additional edges can be added by the schedulers as heuristics.
26  /// SDNodes such as Constants, Registers, and a few others that are not
27  /// interesting to schedulers are not allocated SUnits.
28  ///
29  /// SDNodes with MVT::Glue operands are grouped along with the flagged
30  /// nodes into a single SUnit so that they are scheduled together.
31  ///
32  /// SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output
33  /// edges.  Physical register dependence information is not carried in
34  /// the DAG and must be handled explicitly by schedulers.
35  ///
36  class ScheduleDAGSDNodes : public ScheduleDAG {
37  public:
38    MachineBasicBlock *BB;
39    SelectionDAG *DAG;                    // DAG of the current basic block
40    const InstrItineraryData *InstrItins;
41
42    /// The schedule. Null SUnit*'s represent noop instructions.
43    std::vector<SUnit*> Sequence;
44
45    explicit ScheduleDAGSDNodes(MachineFunction &mf);
46
47    virtual ~ScheduleDAGSDNodes() {}
48
49    /// Run - perform scheduling.
50    ///
51    void Run(SelectionDAG *dag, MachineBasicBlock *bb);
52
53    /// isPassiveNode - Return true if the node is a non-scheduled leaf.
54    ///
55    static bool isPassiveNode(SDNode *Node) {
56      if (isa<ConstantSDNode>(Node))       return true;
57      if (isa<ConstantFPSDNode>(Node))     return true;
58      if (isa<RegisterSDNode>(Node))       return true;
59      if (isa<RegisterMaskSDNode>(Node))   return true;
60      if (isa<GlobalAddressSDNode>(Node))  return true;
61      if (isa<BasicBlockSDNode>(Node))     return true;
62      if (isa<FrameIndexSDNode>(Node))     return true;
63      if (isa<ConstantPoolSDNode>(Node))   return true;
64      if (isa<JumpTableSDNode>(Node))      return true;
65      if (isa<ExternalSymbolSDNode>(Node)) return true;
66      if (isa<BlockAddressSDNode>(Node))   return true;
67      if (Node->getOpcode() == ISD::EntryToken ||
68          isa<MDNodeSDNode>(Node)) return true;
69      return false;
70    }
71
72    /// NewSUnit - Creates a new SUnit and return a ptr to it.
73    ///
74    SUnit *newSUnit(SDNode *N);
75
76    /// Clone - Creates a clone of the specified SUnit. It does not copy the
77    /// predecessors / successors info nor the temporary scheduling states.
78    ///
79    SUnit *Clone(SUnit *N);
80
81    /// BuildSchedGraph - Build the SUnit graph from the selection dag that we
82    /// are input.  This SUnit graph is similar to the SelectionDAG, but
83    /// excludes nodes that aren't interesting to scheduling, and represents
84    /// flagged together nodes with a single SUnit.
85    void BuildSchedGraph(AliasAnalysis *AA);
86
87    /// InitVRegCycleFlag - Set isVRegCycle if this node's single use is
88    /// CopyToReg and its only active data operands are CopyFromReg within a
89    /// single block loop.
90    ///
91    void InitVRegCycleFlag(SUnit *SU);
92
93    /// InitNumRegDefsLeft - Determine the # of regs defined by this node.
94    ///
95    void InitNumRegDefsLeft(SUnit *SU);
96
97    /// computeLatency - Compute node latency.
98    ///
99    virtual void computeLatency(SUnit *SU);
100
101    /// computeOperandLatency - Override dependence edge latency using
102    /// operand use/def information
103    ///
104    virtual void computeOperandLatency(SUnit *Def, SUnit *Use,
105                                       SDep& dep) const { }
106
107    virtual void computeOperandLatency(SDNode *Def, SDNode *Use,
108                                       unsigned OpIdx, SDep& dep) const;
109
110    /// Schedule - Order nodes according to selected style, filling
111    /// in the Sequence member.
112    ///
113    virtual void Schedule() = 0;
114
115    /// VerifyScheduledSequence - Verify that all SUnits are scheduled and
116    /// consistent with the Sequence of scheduled instructions.
117    void VerifyScheduledSequence(bool isBottomUp);
118
119    /// EmitSchedule - Insert MachineInstrs into the MachineBasicBlock
120    /// according to the order specified in Sequence.
121    ///
122    MachineBasicBlock *EmitSchedule(MachineBasicBlock::iterator &InsertPos);
123
124    virtual void dumpNode(const SUnit *SU) const;
125
126    void dumpSchedule() const;
127
128    virtual std::string getGraphNodeLabel(const SUnit *SU) const;
129
130    virtual std::string getDAGName() const;
131
132    virtual void getCustomGraphFeatures(GraphWriter<ScheduleDAG*> &GW) const;
133
134    /// RegDefIter - In place iteration over the values defined by an
135    /// SUnit. This does not need copies of the iterator or any other STLisms.
136    /// The iterator creates itself, rather than being provided by the SchedDAG.
137    class RegDefIter {
138      const ScheduleDAGSDNodes *SchedDAG;
139      const SDNode *Node;
140      unsigned DefIdx;
141      unsigned NodeNumDefs;
142      EVT ValueType;
143    public:
144      RegDefIter(const SUnit *SU, const ScheduleDAGSDNodes *SD);
145
146      bool IsValid() const { return Node != NULL; }
147
148      EVT GetValue() const {
149        assert(IsValid() && "bad iterator");
150        return ValueType;
151      }
152
153      const SDNode *GetNode() const {
154        return Node;
155      }
156
157      unsigned GetIdx() const {
158        return DefIdx-1;
159      }
160
161      void Advance();
162    private:
163      void InitNodeNumDefs();
164    };
165
166  private:
167    /// ClusterNeighboringLoads - Cluster loads from "near" addresses into
168    /// combined SUnits.
169    void ClusterNeighboringLoads(SDNode *Node);
170    /// ClusterNodes - Cluster certain nodes which should be scheduled together.
171    ///
172    void ClusterNodes();
173
174    /// BuildSchedUnits, AddSchedEdges - Helper functions for BuildSchedGraph.
175    void BuildSchedUnits();
176    void AddSchedEdges();
177
178    void EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap,
179                         MachineBasicBlock::iterator InsertPos);
180  };
181}
182
183#endif
184