1//===- AMDGPUMCInstLower.cpp - Lower AMDGPU MachineInstr to an MCInst -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10/// \file 11/// \brief Code to lower AMDGPU MachineInstrs to their corresponding MCInst. 12// 13//===----------------------------------------------------------------------===// 14// 15 16#include "AMDGPUMCInstLower.h" 17#include "AMDGPUAsmPrinter.h" 18#include "AMDGPUTargetMachine.h" 19#include "InstPrinter/AMDGPUInstPrinter.h" 20#include "R600InstrInfo.h" 21#include "SIInstrInfo.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineInstr.h" 24#include "llvm/IR/Constants.h" 25#include "llvm/IR/Function.h" 26#include "llvm/IR/GlobalVariable.h" 27#include "llvm/MC/MCCodeEmitter.h" 28#include "llvm/MC/MCContext.h" 29#include "llvm/MC/MCExpr.h" 30#include "llvm/MC/MCInst.h" 31#include "llvm/MC/MCObjectStreamer.h" 32#include "llvm/MC/MCStreamer.h" 33#include "llvm/Support/ErrorHandling.h" 34#include "llvm/Support/Format.h" 35#include <algorithm> 36 37using namespace llvm; 38 39AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &st): 40 Ctx(ctx), ST(st) 41{ } 42 43void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { 44 45 int MCOpcode = ST.getInstrInfo()->pseudoToMCOpcode(MI->getOpcode()); 46 47 if (MCOpcode == -1) { 48 LLVMContext &C = MI->getParent()->getParent()->getFunction()->getContext(); 49 C.emitError("AMDGPUMCInstLower::lower - Pseudo instruction doesn't have " 50 "a target-specific version: " + Twine(MI->getOpcode())); 51 } 52 53 OutMI.setOpcode(MCOpcode); 54 55 for (const MachineOperand &MO : MI->explicit_operands()) { 56 MCOperand MCOp; 57 switch (MO.getType()) { 58 default: 59 llvm_unreachable("unknown operand type"); 60 case MachineOperand::MO_Immediate: 61 MCOp = MCOperand::createImm(MO.getImm()); 62 break; 63 case MachineOperand::MO_Register: 64 MCOp = MCOperand::createReg(AMDGPU::getMCReg(MO.getReg(), ST)); 65 break; 66 case MachineOperand::MO_MachineBasicBlock: 67 MCOp = MCOperand::createExpr(MCSymbolRefExpr::create( 68 MO.getMBB()->getSymbol(), Ctx)); 69 break; 70 case MachineOperand::MO_GlobalAddress: { 71 const GlobalValue *GV = MO.getGlobal(); 72 MCSymbol *Sym = Ctx.getOrCreateSymbol(StringRef(GV->getName())); 73 MCOp = MCOperand::createExpr(MCSymbolRefExpr::create(Sym, Ctx)); 74 break; 75 } 76 case MachineOperand::MO_ExternalSymbol: { 77 MCSymbol *Sym = Ctx.getOrCreateSymbol(StringRef(MO.getSymbolName())); 78 const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx); 79 MCOp = MCOperand::createExpr(Expr); 80 break; 81 } 82 } 83 OutMI.addOperand(MCOp); 84 } 85} 86 87void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) { 88 const AMDGPUSubtarget &STI = MF->getSubtarget<AMDGPUSubtarget>(); 89 AMDGPUMCInstLower MCInstLowering(OutContext, STI); 90 91#ifdef _DEBUG 92 StringRef Err; 93 if (!STI.getInstrInfo()->verifyInstruction(MI, Err)) { 94 errs() << "Warning: Illegal instruction detected: " << Err << "\n"; 95 MI->dump(); 96 } 97#endif 98 if (MI->isBundle()) { 99 const MachineBasicBlock *MBB = MI->getParent(); 100 MachineBasicBlock::const_instr_iterator I = ++MI->getIterator(); 101 while (I != MBB->instr_end() && I->isInsideBundle()) { 102 EmitInstruction(&*I); 103 ++I; 104 } 105 } else { 106 MCInst TmpInst; 107 MCInstLowering.lower(MI, TmpInst); 108 EmitToStreamer(*OutStreamer, TmpInst); 109 110 if (STI.dumpCode()) { 111 // Disassemble instruction/operands to text. 112 DisasmLines.resize(DisasmLines.size() + 1); 113 std::string &DisasmLine = DisasmLines.back(); 114 raw_string_ostream DisasmStream(DisasmLine); 115 116 AMDGPUInstPrinter InstPrinter(*TM.getMCAsmInfo(), 117 *MF->getSubtarget().getInstrInfo(), 118 *MF->getSubtarget().getRegisterInfo()); 119 InstPrinter.printInst(&TmpInst, DisasmStream, StringRef(), 120 MF->getSubtarget()); 121 122 // Disassemble instruction/operands to hex representation. 123 SmallVector<MCFixup, 4> Fixups; 124 SmallVector<char, 16> CodeBytes; 125 raw_svector_ostream CodeStream(CodeBytes); 126 127 auto &ObjStreamer = static_cast<MCObjectStreamer&>(*OutStreamer); 128 MCCodeEmitter &InstEmitter = ObjStreamer.getAssembler().getEmitter(); 129 InstEmitter.encodeInstruction(TmpInst, CodeStream, Fixups, 130 MF->getSubtarget<MCSubtargetInfo>()); 131 HexLines.resize(HexLines.size() + 1); 132 std::string &HexLine = HexLines.back(); 133 raw_string_ostream HexStream(HexLine); 134 135 for (size_t i = 0; i < CodeBytes.size(); i += 4) { 136 unsigned int CodeDWord = *(unsigned int *)&CodeBytes[i]; 137 HexStream << format("%s%08X", (i > 0 ? " " : ""), CodeDWord); 138 } 139 140 DisasmStream.flush(); 141 DisasmLineMaxLen = std::max(DisasmLineMaxLen, DisasmLine.size()); 142 } 143 } 144} 145