ARMTargetTransformInfo.h revision 6948897e478cbd66626159776a8017b3c18579b9 
1//===-- ARMTargetTransformInfo.h - ARM specific TTI -------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10/// This file a TargetTransformInfo::Concept conforming object specific to the
11/// ARM target machine. It uses the target's detailed information to
12/// provide more precise answers to certain TTI queries, while letting the
13/// target independent and default TTI implementations handle the rest.
14///
15//===----------------------------------------------------------------------===//
16
17#ifndef LLVM_LIB_TARGET_ARM_ARMTARGETTRANSFORMINFO_H
18#define LLVM_LIB_TARGET_ARM_ARMTARGETTRANSFORMINFO_H
19
20#include "ARM.h"
21#include "ARMTargetMachine.h"
22#include "llvm/Analysis/TargetTransformInfo.h"
23#include "llvm/CodeGen/BasicTTIImpl.h"
24#include "llvm/Target/TargetLowering.h"
25
26namespace llvm {
27
28class ARMTTIImpl : public BasicTTIImplBase<ARMTTIImpl> {
29  typedef BasicTTIImplBase<ARMTTIImpl> BaseT;
30  typedef TargetTransformInfo TTI;
31  friend BaseT;
32
33  const ARMSubtarget *ST;
34  const ARMTargetLowering *TLI;
35
36  /// Estimate the overhead of scalarizing an instruction. Insert and Extract
37  /// are set if the result needs to be inserted and/or extracted from vectors.
38  unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
39
40  const ARMSubtarget *getST() const { return ST; }
41  const ARMTargetLowering *getTLI() const { return TLI; }
42
43public:
44  explicit ARMTTIImpl(const ARMBaseTargetMachine *TM, Function &F)
45      : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {}
46
47  // Provide value semantics. MSVC requires that we spell all of these out.
48  ARMTTIImpl(const ARMTTIImpl &Arg)
49      : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
50  ARMTTIImpl(ARMTTIImpl &&Arg)
51      : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
52        TLI(std::move(Arg.TLI)) {}
53  ARMTTIImpl &operator=(const ARMTTIImpl &RHS) {
54    BaseT::operator=(static_cast<const BaseT &>(RHS));
55    ST = RHS.ST;
56    TLI = RHS.TLI;
57    return *this;
58  }
59  ARMTTIImpl &operator=(ARMTTIImpl &&RHS) {
60    BaseT::operator=(std::move(static_cast<BaseT &>(RHS)));
61    ST = std::move(RHS.ST);
62    TLI = std::move(RHS.TLI);
63    return *this;
64  }
65
66  /// \name Scalar TTI Implementations
67  /// @{
68
69  using BaseT::getIntImmCost;
70  unsigned getIntImmCost(const APInt &Imm, Type *Ty);
71
72  /// @}
73
74  /// \name Vector TTI Implementations
75  /// @{
76
77  unsigned getNumberOfRegisters(bool Vector) {
78    if (Vector) {
79      if (ST->hasNEON())
80        return 16;
81      return 0;
82    }
83
84    if (ST->isThumb1Only())
85      return 8;
86    return 13;
87  }
88
89  unsigned getRegisterBitWidth(bool Vector) {
90    if (Vector) {
91      if (ST->hasNEON())
92        return 128;
93      return 0;
94    }
95
96    return 32;
97  }
98
99  unsigned getMaxInterleaveFactor(unsigned VF) {
100    // These are out of order CPUs:
101    if (ST->isCortexA15() || ST->isSwift())
102      return 2;
103    return 1;
104  }
105
106  unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
107                          Type *SubTp);
108
109  unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
110
111  unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
112
113  unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
114
115  unsigned getAddressComputationCost(Type *Val, bool IsComplex);
116
117  unsigned getFPOpCost(Type *Ty);
118
119  unsigned getArithmeticInstrCost(
120      unsigned Opcode, Type *Ty,
121      TTI::OperandValueKind Op1Info = TTI::OK_AnyValue,
122      TTI::OperandValueKind Op2Info = TTI::OK_AnyValue,
123      TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
124      TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
125
126  unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
127                           unsigned AddressSpace);
128
129  /// @}
130};
131
132} // end namespace llvm
133
134#endif
135