1//===-- NVPTXISelDAGToDAG.h - A dag to dag inst selector for NVPTX --------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines an instruction selector for the NVPTX target. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_LIB_TARGET_NVPTX_NVPTXISELDAGTODAG_H 15#define LLVM_LIB_TARGET_NVPTX_NVPTXISELDAGTODAG_H 16 17#include "NVPTX.h" 18#include "NVPTXISelLowering.h" 19#include "NVPTXRegisterInfo.h" 20#include "NVPTXTargetMachine.h" 21#include "llvm/CodeGen/SelectionDAGISel.h" 22#include "llvm/IR/Intrinsics.h" 23#include "llvm/Support/Compiler.h" 24using namespace llvm; 25 26namespace { 27 28class LLVM_LIBRARY_VISIBILITY NVPTXDAGToDAGISel : public SelectionDAGISel { 29 const NVPTXTargetMachine &TM; 30 31 // If true, generate mul.wide from sext and mul 32 bool doMulWide; 33 34 int getDivF32Level() const; 35 bool usePrecSqrtF32() const; 36 bool useF32FTZ() const; 37 bool allowFMA() const; 38 39public: 40 explicit NVPTXDAGToDAGISel(NVPTXTargetMachine &tm, 41 CodeGenOpt::Level OptLevel); 42 43 // Pass Name 44 const char *getPassName() const override { 45 return "NVPTX DAG->DAG Pattern Instruction Selection"; 46 } 47 bool runOnMachineFunction(MachineFunction &MF) override; 48 const NVPTXSubtarget *Subtarget; 49 50 bool SelectInlineAsmMemoryOperand(const SDValue &Op, 51 unsigned ConstraintID, 52 std::vector<SDValue> &OutOps) override; 53private: 54// Include the pieces autogenerated from the target description. 55#include "NVPTXGenDAGISel.inc" 56 57 SDNode *Select(SDNode *N) override; 58 SDNode *SelectIntrinsicNoChain(SDNode *N); 59 SDNode *SelectIntrinsicChain(SDNode *N); 60 SDNode *SelectTexSurfHandle(SDNode *N); 61 SDNode *SelectLoad(SDNode *N); 62 SDNode *SelectLoadVector(SDNode *N); 63 SDNode *SelectLDGLDU(SDNode *N); 64 SDNode *SelectStore(SDNode *N); 65 SDNode *SelectStoreVector(SDNode *N); 66 SDNode *SelectLoadParam(SDNode *N); 67 SDNode *SelectStoreRetval(SDNode *N); 68 SDNode *SelectStoreParam(SDNode *N); 69 SDNode *SelectAddrSpaceCast(SDNode *N); 70 SDNode *SelectTextureIntrinsic(SDNode *N); 71 SDNode *SelectSurfaceIntrinsic(SDNode *N); 72 SDNode *SelectBFE(SDNode *N); 73 74 inline SDValue getI32Imm(unsigned Imm, SDLoc DL) { 75 return CurDAG->getTargetConstant(Imm, DL, MVT::i32); 76 } 77 78 // Match direct address complex pattern. 79 bool SelectDirectAddr(SDValue N, SDValue &Address); 80 81 bool SelectADDRri_imp(SDNode *OpNode, SDValue Addr, SDValue &Base, 82 SDValue &Offset, MVT mvt); 83 bool SelectADDRri(SDNode *OpNode, SDValue Addr, SDValue &Base, 84 SDValue &Offset); 85 bool SelectADDRri64(SDNode *OpNode, SDValue Addr, SDValue &Base, 86 SDValue &Offset); 87 88 bool SelectADDRsi_imp(SDNode *OpNode, SDValue Addr, SDValue &Base, 89 SDValue &Offset, MVT mvt); 90 bool SelectADDRsi(SDNode *OpNode, SDValue Addr, SDValue &Base, 91 SDValue &Offset); 92 bool SelectADDRsi64(SDNode *OpNode, SDValue Addr, SDValue &Base, 93 SDValue &Offset); 94 95 bool ChkMemSDNodeAddressSpace(SDNode *N, unsigned int spN) const; 96 97}; 98} 99 100#endif 101