SystemZISelLowering.h revision 98ca4f2a325f72374a477f9deba7d09e8999c29b 
1//==-- SystemZISelLowering.h - SystemZ DAG Lowering Interface ----*- C++ -*-==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the interfaces that SystemZ uses to lower LLVM code into a
11// selection DAG.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_TARGET_SystemZ_ISELLOWERING_H
16#define LLVM_TARGET_SystemZ_ISELLOWERING_H
17
18#include "SystemZ.h"
19#include "SystemZRegisterInfo.h"
20#include "llvm/CodeGen/SelectionDAG.h"
21#include "llvm/Target/TargetLowering.h"
22
23namespace llvm {
24  namespace SystemZISD {
25    enum {
26      FIRST_NUMBER = ISD::BUILTIN_OP_END,
27
28      /// Return with a flag operand. Operand 0 is the chain operand.
29      RET_FLAG,
30
31      /// CALL - These operations represent an abstract call
32      /// instruction, which includes a bunch of information.
33      CALL,
34
35      /// PCRelativeWrapper - PC relative address
36      PCRelativeWrapper,
37
38      /// CMP, UCMP - Compare instruction
39      CMP,
40      UCMP,
41
42      /// BRCOND - Conditional branch. Operand 0 is chain operand, operand 1 is
43      /// the block to branch if condition is true, operand 2 is condition code
44      /// and operand 3 is the flag operand produced by a CMP instruction.
45      BRCOND,
46
47      /// SELECT - Operands 0 and 1 are selection variables, operand 2 is
48      /// condition code and operand 3 is the flag operand.
49      SELECT
50    };
51  }
52
53  class SystemZSubtarget;
54  class SystemZTargetMachine;
55
56  class SystemZTargetLowering : public TargetLowering {
57  public:
58    explicit SystemZTargetLowering(SystemZTargetMachine &TM);
59
60    /// LowerOperation - Provide custom lowering hooks for some operations.
61    virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
62
63    /// getTargetNodeName - This method returns the name of a target specific
64    /// DAG node.
65    virtual const char *getTargetNodeName(unsigned Opcode) const;
66
67    /// getFunctionAlignment - Return the Log2 alignment of this function.
68    virtual unsigned getFunctionAlignment(const Function *F) const {
69      return 1;
70    }
71
72    SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG);
73    SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
74    SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
75    SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
76    SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
77
78    SDValue EmitCmp(SDValue LHS, SDValue RHS,
79                    ISD::CondCode CC, SDValue &SystemZCC,
80                    SelectionDAG &DAG);
81
82
83    MachineBasicBlock* EmitInstrWithCustomInserter(MachineInstr *MI,
84                                                   MachineBasicBlock *BB) const;
85
86  private:
87    SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
88                           unsigned CallConv, bool isVarArg,
89                           bool isTailCall,
90                           const SmallVectorImpl<ISD::OutputArg> &Outs,
91                           const SmallVectorImpl<ISD::InputArg> &Ins,
92                           DebugLoc dl, SelectionDAG &DAG,
93                           SmallVectorImpl<SDValue> &InVals);
94
95    SDValue LowerCCCArguments(SDValue Chain,
96                              unsigned CallConv,
97                              bool isVarArg,
98                              const SmallVectorImpl<ISD::InputArg> &Ins,
99                              DebugLoc dl,
100                              SelectionDAG &DAG,
101                              SmallVectorImpl<SDValue> &InVals);
102
103    SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
104                            unsigned CallConv, bool isVarArg,
105                            const SmallVectorImpl<ISD::InputArg> &Ins,
106                            DebugLoc dl, SelectionDAG &DAG,
107                            SmallVectorImpl<SDValue> &InVals);
108
109    virtual SDValue
110      LowerFormalArguments(SDValue Chain,
111                           unsigned CallConv, bool isVarArg,
112                           const SmallVectorImpl<ISD::InputArg> &Ins,
113                           DebugLoc dl, SelectionDAG &DAG,
114                           SmallVectorImpl<SDValue> &InVals);
115    virtual SDValue
116      LowerCall(SDValue Chain, SDValue Callee,
117                unsigned CallConv, bool isVarArg, bool isTailCall,
118                const SmallVectorImpl<ISD::OutputArg> &Outs,
119                const SmallVectorImpl<ISD::InputArg> &Ins,
120                DebugLoc dl, SelectionDAG &DAG,
121                SmallVectorImpl<SDValue> &InVals);
122
123    virtual SDValue
124      LowerReturn(SDValue Chain,
125                  unsigned CallConv, bool isVarArg,
126                  const SmallVectorImpl<ISD::OutputArg> &Outs,
127                  DebugLoc dl, SelectionDAG &DAG);
128
129    const SystemZSubtarget &Subtarget;
130    const SystemZTargetMachine &TM;
131    const SystemZRegisterInfo *RegInfo;
132  };
133} // namespace llvm
134
135#endif // LLVM_TARGET_SystemZ_ISELLOWERING_H
136