X86InstrBuilder.h revision 491f54f1fd700204db0a19efde0cc2627641d711 
1//===-- X86InstrBuilder.h - Functions to aid building x86 insts -*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file exposes functions that may be used with BuildMI from the
11// MachineInstrBuilder.h file to handle X86'isms in a clean way.
12//
13// The BuildMem function may be used with the BuildMI function to add entire
14// memory references in a single, typed, function call.  X86 memory references
15// can be very complex expressions (described in the README), so wrapping them
16// up behind an easier to use interface makes sense.  Descriptions of the
17// functions are included below.
18//
19// For reference, the order of operands for memory references is:
20// (Operand), Base, Scale, Index, Displacement.
21//
22//===----------------------------------------------------------------------===//
23
24#ifndef X86INSTRBUILDER_H
25#define X86INSTRBUILDER_H
26
27#include "llvm/CodeGen/MachineFrameInfo.h"
28#include "llvm/CodeGen/MachineInstrBuilder.h"
29#include "llvm/CodeGen/MachineMemOperand.h"
30#include "llvm/CodeGen/PseudoSourceValue.h"
31
32namespace llvm {
33
34/// X86AddressMode - This struct holds a generalized full x86 address mode.
35/// The base register can be a frame index, which will eventually be replaced
36/// with BP or SP and Disp being offsetted accordingly.  The displacement may
37/// also include the offset of a global value.
38struct X86AddressMode {
39  enum {
40    RegBase,
41    FrameIndexBase
42  } BaseType;
43
44  union {
45    unsigned Reg;
46    int FrameIndex;
47  } Base;
48
49  unsigned Scale;
50  unsigned IndexReg;
51  int Disp;
52  GlobalValue *GV;
53  unsigned GVOpFlags;
54
55  X86AddressMode()
56    : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) {
57    Base.Reg = 0;
58  }
59};
60
61/// addDirectMem - This function is used to add a direct memory reference to the
62/// current instruction -- that is, a dereference of an address in a register,
63/// with no scale, index or displacement. An example is: DWORD PTR [EAX].
64///
65static inline const MachineInstrBuilder &
66addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) {
67  // Because memory references are always represented with four
68  // values, this adds: Reg, [1, NoReg, 0] to the instruction.
69  return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0);
70}
71
72static inline const MachineInstrBuilder &
73addLeaOffset(const MachineInstrBuilder &MIB, int Offset) {
74  return MIB.addImm(1).addReg(0).addImm(Offset);
75}
76
77static inline const MachineInstrBuilder &
78addOffset(const MachineInstrBuilder &MIB, int Offset) {
79  return addLeaOffset(MIB, Offset).addReg(0);
80}
81
82/// addRegOffset - This function is used to add a memory reference of the form
83/// [Reg + Offset], i.e., one with no scale or index, but with a
84/// displacement. An example is: DWORD PTR [EAX + 4].
85///
86static inline const MachineInstrBuilder &
87addRegOffset(const MachineInstrBuilder &MIB,
88             unsigned Reg, bool isKill, int Offset) {
89  return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset);
90}
91
92static inline const MachineInstrBuilder &
93addLeaRegOffset(const MachineInstrBuilder &MIB,
94                unsigned Reg, bool isKill, int Offset) {
95  return addLeaOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset);
96}
97
98/// addRegReg - This function is used to add a memory reference of the form:
99/// [Reg + Reg].
100static inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB,
101                                            unsigned Reg1, bool isKill1,
102                                            unsigned Reg2, bool isKill2) {
103  return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1)
104    .addReg(Reg2, getKillRegState(isKill2)).addImm(0);
105}
106
107static inline const MachineInstrBuilder &
108addLeaAddress(const MachineInstrBuilder &MIB, const X86AddressMode &AM) {
109  assert (AM.Scale == 1 || AM.Scale == 2 || AM.Scale == 4 || AM.Scale == 8);
110
111  if (AM.BaseType == X86AddressMode::RegBase)
112    MIB.addReg(AM.Base.Reg);
113  else if (AM.BaseType == X86AddressMode::FrameIndexBase)
114    MIB.addFrameIndex(AM.Base.FrameIndex);
115  else
116    assert (0);
117  MIB.addImm(AM.Scale).addReg(AM.IndexReg);
118  if (AM.GV)
119    return MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags);
120  else
121    return MIB.addImm(AM.Disp);
122}
123
124static inline const MachineInstrBuilder &
125addFullAddress(const MachineInstrBuilder &MIB,
126               const X86AddressMode &AM) {
127  return addLeaAddress(MIB, AM).addReg(0);
128}
129
130/// addFrameReference - This function is used to add a reference to the base of
131/// an abstract object on the stack frame of the current function.  This
132/// reference has base register as the FrameIndex offset until it is resolved.
133/// This allows a constant offset to be specified as well...
134///
135static inline const MachineInstrBuilder &
136addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
137  MachineInstr *MI = MIB;
138  MachineFunction &MF = *MI->getParent()->getParent();
139  MachineFrameInfo &MFI = *MF.getFrameInfo();
140  const TargetInstrDesc &TID = MI->getDesc();
141  unsigned Flags = 0;
142  if (TID.mayLoad())
143    Flags |= MachineMemOperand::MOLoad;
144  if (TID.mayStore())
145    Flags |= MachineMemOperand::MOStore;
146  const Value *SV = (MFI.isFixedObjectIndex(FI) ||
147                     MFI.isSpillSlotObjectIndex(FI))
148    ? PseudoSourceValue::getFixedStack(FI) : PseudoSourceValue::getStack();
149  MachineMemOperand *MMO =
150    MF.getMachineMemOperand(SV,
151                            Flags, Offset,
152                            MFI.getObjectSize(FI),
153                            MFI.getObjectAlignment(FI));
154  return addOffset(MIB.addFrameIndex(FI), Offset)
155            .addMemOperand(MMO);
156}
157
158/// addConstantPoolReference - This function is used to add a reference to the
159/// base of a constant value spilled to the per-function constant pool.  The
160/// reference uses the abstract ConstantPoolIndex which is retained until
161/// either machine code emission or assembly output. In PIC mode on x86-32,
162/// the GlobalBaseReg parameter can be used to make this a
163/// GlobalBaseReg-relative reference.
164///
165static inline const MachineInstrBuilder &
166addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
167                         unsigned GlobalBaseReg, unsigned char OpFlags) {
168  //FIXME: factor this
169  return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0)
170    .addConstantPoolIndex(CPI, 0, OpFlags).addReg(0);
171}
172
173} // End llvm namespace
174
175#endif
176