r300_render.c revision 500160a3c9b0a777586c60abd3d136a5c30937f4
1/* 2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 22 23/* r300_render: Vertex and index buffer primitive emission. Contains both 24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */ 25 26#include "draw/draw_context.h" 27#include "draw/draw_vbuf.h" 28 29#include "util/u_inlines.h" 30 31#include "util/u_format.h" 32#include "util/u_memory.h" 33#include "util/u_upload_mgr.h" 34#include "util/u_prim.h" 35 36#include "r300_cs.h" 37#include "r300_context.h" 38#include "r300_screen_buffer.h" 39#include "r300_emit.h" 40#include "r300_reg.h" 41#include "r300_state_derived.h" 42 43static uint32_t r300_translate_primitive(unsigned prim) 44{ 45 switch (prim) { 46 case PIPE_PRIM_POINTS: 47 return R300_VAP_VF_CNTL__PRIM_POINTS; 48 case PIPE_PRIM_LINES: 49 return R300_VAP_VF_CNTL__PRIM_LINES; 50 case PIPE_PRIM_LINE_LOOP: 51 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP; 52 case PIPE_PRIM_LINE_STRIP: 53 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP; 54 case PIPE_PRIM_TRIANGLES: 55 return R300_VAP_VF_CNTL__PRIM_TRIANGLES; 56 case PIPE_PRIM_TRIANGLE_STRIP: 57 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP; 58 case PIPE_PRIM_TRIANGLE_FAN: 59 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN; 60 case PIPE_PRIM_QUADS: 61 return R300_VAP_VF_CNTL__PRIM_QUADS; 62 case PIPE_PRIM_QUAD_STRIP: 63 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP; 64 case PIPE_PRIM_POLYGON: 65 return R300_VAP_VF_CNTL__PRIM_POLYGON; 66 default: 67 return 0; 68 } 69} 70 71static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300, 72 unsigned mode) 73{ 74 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state; 75 uint32_t color_control = rs->color_control; 76 77 /* By default (see r300_state.c:r300_create_rs_state) color_control is 78 * initialized to provoking the first vertex. 79 * 80 * Triangle fans must be reduced to the second vertex, not the first, in 81 * Gallium flatshade-first mode, as per the GL spec. 82 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt) 83 * 84 * Quads never provoke correctly in flatshade-first mode. The first 85 * vertex is never considered as provoking, so only the second, third, 86 * and fourth vertices can be selected, and both "third" and "last" modes 87 * select the fourth vertex. This is probably due to D3D lacking quads. 88 * 89 * Similarly, polygons reduce to the first, not the last, vertex, when in 90 * "last" mode, and all other modes start from the second vertex. 91 * 92 * ~ C. 93 */ 94 95 if (rs->rs.flatshade_first) { 96 switch (mode) { 97 case PIPE_PRIM_TRIANGLE_FAN: 98 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND; 99 break; 100 case PIPE_PRIM_QUADS: 101 case PIPE_PRIM_QUAD_STRIP: 102 case PIPE_PRIM_POLYGON: 103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 104 break; 105 default: 106 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST; 107 break; 108 } 109 } else { 110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 111 } 112 113 return color_control; 114} 115 116static void r500_emit_index_offset(struct r300_context *r300, int index_bias) 117{ 118 CS_LOCALS(r300); 119 120 if (r300->screen->caps.is_r500 && 121 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) { 122 BEGIN_CS(2); 123 OUT_CS_REG(R500_VAP_INDEX_OFFSET, 124 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0)); 125 END_CS; 126 } else { 127 if (index_bias) { 128 fprintf(stderr, "r300: Non-zero index bias is unsupported " 129 "on this hardware.\n"); 130 assert(0); 131 } 132 } 133} 134 135enum r300_prepare_flags { 136 PREP_FIRST_DRAW = (1 << 0), 137 PREP_VALIDATE_VBOS = (1 << 1), 138 PREP_EMIT_AOS = (1 << 2), 139 PREP_INDEXED = (1 << 3) 140}; 141 142/* Check if the requested number of dwords is available in the CS and 143 * if not, flush. Then validate buffers and emit dirty state. 144 * Return TRUE if flush occured. */ 145static void r300_prepare_for_rendering(struct r300_context *r300, 146 enum r300_prepare_flags flags, 147 struct pipe_resource *index_buffer, 148 unsigned cs_dwords, 149 unsigned aos_offset, 150 int index_bias) 151{ 152 boolean flushed = FALSE; 153 boolean first_draw = flags & PREP_FIRST_DRAW; 154 boolean emit_aos = flags & PREP_EMIT_AOS; 155 156 /* Stencil ref fallback. */ 157 if (r300->stencil_ref_bf_fallback) { 158 cs_dwords = cs_dwords * 2 + 10; 159 } 160 161 /* Add dirty state, index offset, and AOS. */ 162 if (first_draw) { 163 cs_dwords += r300_get_num_dirty_dwords(r300); 164 165 if (r300->screen->caps.is_r500) 166 cs_dwords += 2; /* emit_index_offset */ 167 168 if (emit_aos) 169 cs_dwords += 55; /* emit_aos */ 170 } 171 172 /* Emitted in flush. */ 173 cs_dwords += 26; /* emit_query_end */ 174 175 /* Reserve requested CS space. */ 176 if (!r300_check_cs(r300, cs_dwords)) { 177 r300->context.flush(&r300->context, 0, NULL); 178 flushed = TRUE; 179 } 180 181 /* Validate buffers and emit dirty state if needed. */ 182 if (first_draw || flushed) { 183 r300_emit_buffer_validate(r300, flags & PREP_VALIDATE_VBOS, index_buffer); 184 r300_emit_dirty_state(r300); 185 r500_emit_index_offset(r300, index_bias); 186 if (emit_aos) 187 r300_emit_aos(r300, aos_offset, flags & PREP_INDEXED); 188 } 189} 190 191static boolean immd_is_good_idea(struct r300_context *r300, 192 unsigned count) 193{ 194 struct pipe_vertex_element* velem; 195 struct pipe_vertex_buffer* vbuf; 196 boolean checked[PIPE_MAX_ATTRIBS] = {0}; 197 unsigned vertex_element_count = r300->velems->count; 198 unsigned i, vbi; 199 200 if (DBG_ON(r300, DBG_NO_IMMD)) { 201 return FALSE; 202 } 203 204 if (r300->draw) { 205 return FALSE; 206 } 207 208 if (count > 10) { 209 return FALSE; 210 } 211 212 /* We shouldn't map buffers referenced by CS, busy buffers, 213 * and ones placed in VRAM. */ 214 /* XXX Check for VRAM buffers. */ 215 for (i = 0; i < vertex_element_count; i++) { 216 velem = &r300->velems->velem[i]; 217 vbi = velem->vertex_buffer_index; 218 219 if (!checked[vbi]) { 220 vbuf = &r300->vertex_buffer[vbi]; 221 222 if (r300_buffer_is_referenced(&r300->context, 223 vbuf->buffer, 224 R300_REF_CS | R300_REF_HW)) { 225 /* It's a very bad idea to map it... */ 226 return FALSE; 227 } 228 checked[vbi] = TRUE; 229 } 230 } 231 return TRUE; 232} 233 234/***************************************************************************** 235 * The emission of draw packets for r500. Older GPUs may use these functions * 236 * after resolving fallback issues (e.g. stencil ref two-sided). * 237 ****************************************************************************/ 238 239static void r500_emit_draw_arrays_immediate(struct r300_context *r300, 240 unsigned mode, 241 unsigned start, 242 unsigned count) 243{ 244 struct pipe_vertex_element* velem; 245 struct pipe_vertex_buffer* vbuf; 246 unsigned vertex_element_count = r300->velems->count; 247 unsigned i, v, vbi, dw, elem_offset, dwords; 248 249 /* Size of the vertex, in dwords. */ 250 unsigned vertex_size = 0; 251 252 /* Offsets of the attribute, in dwords, from the start of the vertex. */ 253 unsigned offset[PIPE_MAX_ATTRIBS]; 254 255 /* Size of the vertex element, in dwords. */ 256 unsigned size[PIPE_MAX_ATTRIBS]; 257 258 /* Stride to the same attrib in the next vertex in the vertex buffer, 259 * in dwords. */ 260 unsigned stride[PIPE_MAX_ATTRIBS] = {0}; 261 262 /* Mapped vertex buffers. */ 263 uint32_t* map[PIPE_MAX_ATTRIBS] = {0}; 264 struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {NULL}; 265 266 CS_LOCALS(r300); 267 268 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */ 269 for (i = 0; i < vertex_element_count; i++) { 270 velem = &r300->velems->velem[i]; 271 offset[i] = velem->src_offset / 4; 272 size[i] = util_format_get_blocksize(velem->src_format) / 4; 273 vertex_size += size[i]; 274 vbi = velem->vertex_buffer_index; 275 276 /* Map the buffer. */ 277 if (!map[vbi]) { 278 vbuf = &r300->vertex_buffer[vbi]; 279 map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context, 280 vbuf->buffer, 281 PIPE_TRANSFER_READ, 282 &transfer[vbi]); 283 map[vbi] += vbuf->buffer_offset / 4; 284 stride[vbi] = vbuf->stride / 4; 285 } 286 } 287 288 dwords = 9 + count * vertex_size; 289 290 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0); 291 292 BEGIN_CS(dwords); 293 OUT_CS_REG(R300_GA_COLOR_CONTROL, 294 r300_provoking_vertex_fixes(r300, mode)); 295 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size); 296 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 297 OUT_CS(count - 1); 298 OUT_CS(0); 299 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size); 300 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) | 301 r300_translate_primitive(mode)); 302 303 /* Emit vertices. */ 304 for (v = 0; v < count; v++) { 305 for (i = 0; i < vertex_element_count; i++) { 306 velem = &r300->velems->velem[i]; 307 vbi = velem->vertex_buffer_index; 308 elem_offset = offset[i] + stride[vbi] * (v + start); 309 310 for (dw = 0; dw < size[i]; dw++) { 311 OUT_CS(map[vbi][elem_offset + dw]); 312 } 313 } 314 } 315 END_CS; 316 317 /* Unmap buffers. */ 318 for (i = 0; i < vertex_element_count; i++) { 319 vbi = r300->velems->velem[i].vertex_buffer_index; 320 321 if (map[vbi]) { 322 vbuf = &r300->vertex_buffer[vbi]; 323 pipe_buffer_unmap(&r300->context, vbuf->buffer, transfer[vbi]); 324 map[vbi] = NULL; 325 } 326 } 327} 328 329static void r500_emit_draw_arrays(struct r300_context *r300, 330 unsigned mode, 331 unsigned count) 332{ 333 boolean alt_num_verts = count > 65535; 334 CS_LOCALS(r300); 335 336 if (count >= (1 << 24)) { 337 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 338 "refusing to render.\n", count); 339 return; 340 } 341 342 BEGIN_CS(7 + (alt_num_verts ? 2 : 0)); 343 if (alt_num_verts) { 344 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 345 } 346 OUT_CS_REG(R300_GA_COLOR_CONTROL, 347 r300_provoking_vertex_fixes(r300, mode)); 348 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 349 OUT_CS(count - 1); 350 OUT_CS(0); 351 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 352 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 353 r300_translate_primitive(mode) | 354 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 355 END_CS; 356} 357 358static void r500_emit_draw_elements(struct r300_context *r300, 359 struct pipe_resource* indexBuffer, 360 unsigned indexSize, 361 unsigned minIndex, 362 unsigned maxIndex, 363 unsigned mode, 364 unsigned start, 365 unsigned count) 366{ 367 uint32_t count_dwords; 368 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t); 369 boolean alt_num_verts = count > 65535; 370 CS_LOCALS(r300); 371 372 if (count >= (1 << 24)) { 373 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 374 "refusing to render.\n", count); 375 return; 376 } 377 378 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index); 379 380 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n", 381 count, minIndex, maxIndex); 382 383 BEGIN_CS(13 + (alt_num_verts ? 2 : 0)); 384 if (alt_num_verts) { 385 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 386 } 387 OUT_CS_REG(R300_GA_COLOR_CONTROL, 388 r300_provoking_vertex_fixes(r300, mode)); 389 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 390 OUT_CS(maxIndex); 391 OUT_CS(minIndex); 392 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); 393 if (indexSize == 4) { 394 count_dwords = count; 395 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 396 R300_VAP_VF_CNTL__INDEX_SIZE_32bit | 397 r300_translate_primitive(mode) | 398 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 399 } else { 400 count_dwords = (count + 1) / 2; 401 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 402 r300_translate_primitive(mode) | 403 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 404 } 405 406 /* INDX_BUFFER is a truly special packet3. 407 * Unlike most other packet3, where the offset is after the count, 408 * the order is reversed, so the relocation ends up carrying the 409 * size of the indexbuf instead of the offset. 410 */ 411 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); 412 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) | 413 (0 << R300_INDX_BUFFER_SKIP_SHIFT)); 414 OUT_CS(offset_dwords << 2); 415 OUT_CS_BUF_RELOC(indexBuffer, count_dwords, 416 RADEON_GEM_DOMAIN_GTT, 0, 0); 417 418 END_CS; 419} 420 421/***************************************************************************** 422 * The emission of draw packets for r300 which take care of the two-sided * 423 * stencil ref fallback and call r500's functions. * 424 ****************************************************************************/ 425 426/* Set drawing for front faces. */ 427static void r300_begin_stencil_ref_fallback(struct r300_context *r300) 428{ 429 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; 430 CS_LOCALS(r300); 431 432 BEGIN_CS(2); 433 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_BACK); 434 END_CS; 435} 436 437/* Set drawing for back faces. */ 438static void r300_switch_stencil_ref_side(struct r300_context *r300) 439{ 440 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; 441 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; 442 CS_LOCALS(r300); 443 444 BEGIN_CS(4); 445 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_FRONT); 446 OUT_CS_REG(R300_ZB_STENCILREFMASK, 447 dsa->stencil_ref_bf | r300->stencil_ref.ref_value[1]); 448 END_CS; 449} 450 451/* Restore the original state. */ 452static void r300_end_stencil_ref_fallback(struct r300_context *r300) 453{ 454 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; 455 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; 456 CS_LOCALS(r300); 457 458 BEGIN_CS(4); 459 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode); 460 OUT_CS_REG(R300_ZB_STENCILREFMASK, 461 dsa->stencil_ref_mask | r300->stencil_ref.ref_value[0]); 462 END_CS; 463} 464 465static void r300_emit_draw_arrays_immediate(struct r300_context *r300, 466 unsigned mode, 467 unsigned start, 468 unsigned count) 469{ 470 if (!r300->stencil_ref_bf_fallback) { 471 r500_emit_draw_arrays_immediate(r300, mode, start, count); 472 } else { 473 r300_begin_stencil_ref_fallback(r300); 474 r500_emit_draw_arrays_immediate(r300, mode, start, count); 475 r300_switch_stencil_ref_side(r300); 476 r500_emit_draw_arrays_immediate(r300, mode, start, count); 477 r300_end_stencil_ref_fallback(r300); 478 } 479} 480 481static void r300_emit_draw_arrays(struct r300_context *r300, 482 unsigned mode, 483 unsigned count) 484{ 485 if (!r300->stencil_ref_bf_fallback) { 486 r500_emit_draw_arrays(r300, mode, count); 487 } else { 488 r300_begin_stencil_ref_fallback(r300); 489 r500_emit_draw_arrays(r300, mode, count); 490 r300_switch_stencil_ref_side(r300); 491 r500_emit_draw_arrays(r300, mode, count); 492 r300_end_stencil_ref_fallback(r300); 493 } 494} 495 496static void r300_emit_draw_elements(struct r300_context *r300, 497 struct pipe_resource* indexBuffer, 498 unsigned indexSize, 499 unsigned minIndex, 500 unsigned maxIndex, 501 unsigned mode, 502 unsigned start, 503 unsigned count) 504{ 505 if (!r300->stencil_ref_bf_fallback) { 506 r500_emit_draw_elements(r300, indexBuffer, indexSize, 507 minIndex, maxIndex, mode, start, count); 508 } else { 509 r300_begin_stencil_ref_fallback(r300); 510 r500_emit_draw_elements(r300, indexBuffer, indexSize, 511 minIndex, maxIndex, mode, start, count); 512 r300_switch_stencil_ref_side(r300); 513 r500_emit_draw_elements(r300, indexBuffer, indexSize, 514 minIndex, maxIndex, mode, start, count); 515 r300_end_stencil_ref_fallback(r300); 516 } 517} 518 519static void r300_shorten_ubyte_elts(struct r300_context* r300, 520 struct pipe_resource** elts, 521 unsigned start, 522 unsigned count) 523{ 524 struct pipe_context* context = &r300->context; 525 struct pipe_screen* screen = r300->context.screen; 526 struct pipe_resource* new_elts; 527 unsigned char *in_map; 528 unsigned short *out_map; 529 struct pipe_transfer *src_transfer, *dst_transfer; 530 unsigned i; 531 532 new_elts = pipe_buffer_create(screen, 533 PIPE_BIND_INDEX_BUFFER, 534 2 * count); 535 536 in_map = pipe_buffer_map(context, *elts, PIPE_TRANSFER_READ, &src_transfer); 537 out_map = pipe_buffer_map(context, new_elts, PIPE_TRANSFER_WRITE, &dst_transfer); 538 539 in_map += start; 540 541 for (i = 0; i < count; i++) { 542 *out_map = (unsigned short)*in_map; 543 in_map++; 544 out_map++; 545 } 546 547 pipe_buffer_unmap(context, *elts, src_transfer); 548 pipe_buffer_unmap(context, new_elts, dst_transfer); 549 550 *elts = new_elts; 551} 552 553static void r300_align_ushort_elts(struct r300_context *r300, 554 struct pipe_resource **elts, 555 unsigned start, unsigned count) 556{ 557 struct pipe_context* context = &r300->context; 558 struct pipe_transfer *in_transfer = NULL; 559 struct pipe_transfer *out_transfer = NULL; 560 struct pipe_resource* new_elts; 561 unsigned short *in_map; 562 unsigned short *out_map; 563 564 new_elts = pipe_buffer_create(context->screen, 565 PIPE_BIND_INDEX_BUFFER, 566 2 * count); 567 568 in_map = pipe_buffer_map(context, *elts, 569 PIPE_TRANSFER_READ, &in_transfer); 570 out_map = pipe_buffer_map(context, new_elts, 571 PIPE_TRANSFER_WRITE, &out_transfer); 572 573 memcpy(out_map, in_map+start, 2 * count); 574 575 pipe_buffer_unmap(context, *elts, in_transfer); 576 pipe_buffer_unmap(context, new_elts, out_transfer); 577 578 *elts = new_elts; 579} 580 581/* This is the fast-path drawing & emission for HW TCL. */ 582static void r300_draw_range_elements(struct pipe_context* pipe, 583 struct pipe_resource* indexBuffer, 584 unsigned indexSize, 585 int indexBias, 586 unsigned minIndex, 587 unsigned maxIndex, 588 unsigned mode, 589 unsigned start, 590 unsigned count) 591{ 592 struct r300_context* r300 = r300_context(pipe); 593 struct pipe_resource* orgIndexBuffer = indexBuffer; 594 boolean alt_num_verts = r300->screen->caps.is_r500 && 595 count > 65536 && 596 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0); 597 unsigned short_count; 598 599 if (r300->skip_rendering) { 600 return; 601 } 602 603 if (!u_trim_pipe_prim(mode, &count)) { 604 return; 605 } 606 607 if (indexSize == 1) { 608 r300_shorten_ubyte_elts(r300, &indexBuffer, start, count); 609 indexSize = 2; 610 start = 0; 611 } else if (indexSize == 2 && start % 2 != 0) { 612 r300_align_ushort_elts(r300, &indexBuffer, start, count); 613 start = 0; 614 } 615 616 r300_update_derived_state(r300); 617 r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count); 618 619 /* 15 dwords for emit_draw_elements */ 620 r300_prepare_for_rendering(r300, 621 PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED, 622 indexBuffer, 15, 0, indexBias); 623 624 u_upload_flush(r300->upload_vb); 625 u_upload_flush(r300->upload_ib); 626 if (alt_num_verts || count <= 65535) { 627 r300->emit_draw_elements(r300, indexBuffer, indexSize, 628 minIndex, maxIndex, mode, start, count); 629 } else { 630 do { 631 short_count = MIN2(count, 65534); 632 r300->emit_draw_elements(r300, indexBuffer, indexSize, 633 minIndex, maxIndex, 634 mode, start, short_count); 635 636 start += short_count; 637 count -= short_count; 638 639 /* 15 dwords for emit_draw_elements */ 640 if (count) { 641 r300_prepare_for_rendering(r300, 642 PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED, 643 indexBuffer, 15, 0, indexBias); 644 } 645 } while (count); 646 } 647 648 if (indexBuffer != orgIndexBuffer) { 649 pipe_resource_reference( &indexBuffer, NULL ); 650 } 651} 652 653/* Simple helpers for context setup. Should probably be moved to util. */ 654static void r300_draw_elements(struct pipe_context* pipe, 655 struct pipe_resource* indexBuffer, 656 unsigned indexSize, int indexBias, unsigned mode, 657 unsigned start, unsigned count) 658{ 659 struct r300_context *r300 = r300_context(pipe); 660 661 pipe->draw_range_elements(pipe, indexBuffer, indexSize, indexBias, 662 0, r300->vertex_buffer_max_index, 663 mode, start, count); 664} 665 666static void r300_draw_arrays(struct pipe_context* pipe, unsigned mode, 667 unsigned start, unsigned count) 668{ 669 struct r300_context* r300 = r300_context(pipe); 670 boolean alt_num_verts = r300->screen->caps.is_r500 && 671 count > 65536 && 672 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0); 673 unsigned short_count; 674 675 if (r300->skip_rendering) { 676 return; 677 } 678 679 if (!u_trim_pipe_prim(mode, &count)) { 680 return; 681 } 682 683 r300_update_derived_state(r300); 684 685 if (immd_is_good_idea(r300, count)) { 686 r300->emit_draw_arrays_immediate(r300, mode, start, count); 687 } else { 688 /* 9 spare dwords for emit_draw_arrays. */ 689 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS, 690 NULL, 9, start, 0); 691 692 if (alt_num_verts || count <= 65535) { 693 r300->emit_draw_arrays(r300, mode, count); 694 } else { 695 do { 696 short_count = MIN2(count, 65535); 697 r300->emit_draw_arrays(r300, mode, short_count); 698 699 start += short_count; 700 count -= short_count; 701 702 /* 9 spare dwords for emit_draw_arrays. */ 703 if (count) { 704 r300_prepare_for_rendering(r300, 705 PREP_VALIDATE_VBOS | PREP_EMIT_AOS, NULL, 9, 706 start, 0); 707 } 708 } while (count); 709 } 710 u_upload_flush(r300->upload_vb); 711 } 712} 713 714/**************************************************************************** 715 * The rest of this file is for SW TCL rendering only. Please be polite and * 716 * keep these functions separated so that they are easier to locate. ~C. * 717 ***************************************************************************/ 718 719/* SW TCL arrays, using Draw. */ 720static void r300_swtcl_draw_arrays(struct pipe_context* pipe, 721 unsigned mode, 722 unsigned start, 723 unsigned count) 724{ 725 struct r300_context* r300 = r300_context(pipe); 726 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; 727 int i; 728 729 if (r300->skip_rendering) { 730 return; 731 } 732 733 if (!u_trim_pipe_prim(mode, &count)) { 734 return; 735 } 736 737 r300_update_derived_state(r300); 738 739 for (i = 0; i < r300->vertex_buffer_count; i++) { 740 void* buf = pipe_buffer_map(pipe, 741 r300->vertex_buffer[i].buffer, 742 PIPE_TRANSFER_READ, 743 &vb_transfer[i]); 744 draw_set_mapped_vertex_buffer(r300->draw, i, buf); 745 } 746 747 draw_set_mapped_element_buffer(r300->draw, 0, 0, NULL); 748 749 draw_arrays(r300->draw, mode, start, count); 750 751 /* XXX Not sure whether this is the best fix. 752 * It prevents CS from being rejected and weird assertion failures. */ 753 draw_flush(r300->draw); 754 755 for (i = 0; i < r300->vertex_buffer_count; i++) { 756 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer, 757 vb_transfer[i]); 758 draw_set_mapped_vertex_buffer(r300->draw, i, NULL); 759 } 760} 761 762/* SW TCL elements, using Draw. */ 763static void r300_swtcl_draw_range_elements(struct pipe_context* pipe, 764 struct pipe_resource* indexBuffer, 765 unsigned indexSize, 766 int indexBias, 767 unsigned minIndex, 768 unsigned maxIndex, 769 unsigned mode, 770 unsigned start, 771 unsigned count) 772{ 773 struct r300_context* r300 = r300_context(pipe); 774 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; 775 struct pipe_transfer *ib_transfer; 776 int i; 777 void* indices; 778 779 if (r300->skip_rendering) { 780 return; 781 } 782 783 if (!u_trim_pipe_prim(mode, &count)) { 784 return; 785 } 786 787 r300_update_derived_state(r300); 788 789 for (i = 0; i < r300->vertex_buffer_count; i++) { 790 void* buf = pipe_buffer_map(pipe, 791 r300->vertex_buffer[i].buffer, 792 PIPE_TRANSFER_READ, 793 &vb_transfer[i]); 794 draw_set_mapped_vertex_buffer(r300->draw, i, buf); 795 } 796 797 indices = pipe_buffer_map(pipe, indexBuffer, 798 PIPE_TRANSFER_READ, &ib_transfer); 799 draw_set_mapped_element_buffer_range(r300->draw, indexSize, indexBias, 800 minIndex, maxIndex, indices); 801 802 draw_arrays(r300->draw, mode, start, count); 803 804 /* XXX Not sure whether this is the best fix. 805 * It prevents CS from being rejected and weird assertion failures. */ 806 draw_flush(r300->draw); 807 808 for (i = 0; i < r300->vertex_buffer_count; i++) { 809 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer, 810 vb_transfer[i]); 811 draw_set_mapped_vertex_buffer(r300->draw, i, NULL); 812 } 813 814 pipe_buffer_unmap(pipe, indexBuffer, 815 ib_transfer); 816 draw_set_mapped_element_buffer_range(r300->draw, 0, 0, 817 start, start + count - 1, 818 NULL); 819} 820 821/* Object for rendering using Draw. */ 822struct r300_render { 823 /* Parent class */ 824 struct vbuf_render base; 825 826 /* Pipe context */ 827 struct r300_context* r300; 828 829 /* Vertex information */ 830 size_t vertex_size; 831 unsigned prim; 832 unsigned hwprim; 833 834 /* VBO */ 835 struct pipe_resource* vbo; 836 size_t vbo_size; 837 size_t vbo_offset; 838 size_t vbo_max_used; 839 void * vbo_ptr; 840 841 struct pipe_transfer *vbo_transfer; 842}; 843 844static INLINE struct r300_render* 845r300_render(struct vbuf_render* render) 846{ 847 return (struct r300_render*)render; 848} 849 850static const struct vertex_info* 851r300_render_get_vertex_info(struct vbuf_render* render) 852{ 853 struct r300_render* r300render = r300_render(render); 854 struct r300_context* r300 = r300render->r300; 855 856 return &r300->vertex_info; 857} 858 859static boolean r300_render_allocate_vertices(struct vbuf_render* render, 860 ushort vertex_size, 861 ushort count) 862{ 863 struct r300_render* r300render = r300_render(render); 864 struct r300_context* r300 = r300render->r300; 865 struct pipe_screen* screen = r300->context.screen; 866 size_t size = (size_t)vertex_size * (size_t)count; 867 868 if (size + r300render->vbo_offset > r300render->vbo_size) 869 { 870 pipe_resource_reference(&r300->vbo, NULL); 871 r300render->vbo = pipe_buffer_create(screen, 872 PIPE_BIND_VERTEX_BUFFER, 873 R300_MAX_DRAW_VBO_SIZE); 874 r300render->vbo_offset = 0; 875 r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE; 876 } 877 878 r300render->vertex_size = vertex_size; 879 r300->vbo = r300render->vbo; 880 r300->vbo_offset = r300render->vbo_offset; 881 882 return (r300render->vbo) ? TRUE : FALSE; 883} 884 885static void* r300_render_map_vertices(struct vbuf_render* render) 886{ 887 struct r300_render* r300render = r300_render(render); 888 889 assert(!r300render->vbo_transfer); 890 891 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context, 892 r300render->vbo, 893 PIPE_TRANSFER_WRITE, 894 &r300render->vbo_transfer); 895 896 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset); 897} 898 899static void r300_render_unmap_vertices(struct vbuf_render* render, 900 ushort min, 901 ushort max) 902{ 903 struct r300_render* r300render = r300_render(render); 904 struct pipe_context* context = &r300render->r300->context; 905 906 assert(r300render->vbo_transfer); 907 908 r300render->vbo_max_used = MAX2(r300render->vbo_max_used, 909 r300render->vertex_size * (max + 1)); 910 pipe_buffer_unmap(context, r300render->vbo, r300render->vbo_transfer); 911 912 r300render->vbo_transfer = NULL; 913} 914 915static void r300_render_release_vertices(struct vbuf_render* render) 916{ 917 struct r300_render* r300render = r300_render(render); 918 919 r300render->vbo_offset += r300render->vbo_max_used; 920 r300render->vbo_max_used = 0; 921} 922 923static boolean r300_render_set_primitive(struct vbuf_render* render, 924 unsigned prim) 925{ 926 struct r300_render* r300render = r300_render(render); 927 928 r300render->prim = prim; 929 r300render->hwprim = r300_translate_primitive(prim); 930 931 return TRUE; 932} 933 934static void r500_render_draw_arrays(struct vbuf_render* render, 935 unsigned start, 936 unsigned count) 937{ 938 struct r300_render* r300render = r300_render(render); 939 struct r300_context* r300 = r300render->r300; 940 uint8_t* ptr; 941 unsigned i; 942 unsigned dwords = 6; 943 944 CS_LOCALS(r300); 945 946 (void) i; (void) ptr; 947 948 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0); 949 950 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count); 951 952 /* Uncomment to dump all VBOs rendered through this interface. 953 * Slow and noisy! 954 ptr = pipe_buffer_map(&r300render->r300->context, 955 r300render->vbo, PIPE_TRANSFER_READ, 956 &r300render->vbo_transfer); 957 958 for (i = 0; i < count; i++) { 959 printf("r300: Vertex %d\n", i); 960 draw_dump_emitted_vertex(&r300->vertex_info, ptr); 961 ptr += r300->vertex_info.size * 4; 962 printf("\n"); 963 } 964 965 pipe_buffer_unmap(&r300render->r300->context, r300render->vbo, 966 r300render->vbo_transfer); 967 */ 968 969 BEGIN_CS(dwords); 970 OUT_CS_REG(R300_GA_COLOR_CONTROL, 971 r300_provoking_vertex_fixes(r300, r300render->prim)); 972 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1); 973 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 974 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 975 r300render->hwprim); 976 END_CS; 977} 978 979static void r500_render_draw_elements(struct vbuf_render* render, 980 const ushort* indices, 981 uint count) 982{ 983 struct r300_render* r300render = r300_render(render); 984 struct r300_context* r300 = r300render->r300; 985 int i; 986 unsigned dwords = 6 + (count+1)/2; 987 unsigned max_index = (r300render->vbo_size - r300render->vbo_offset) / 988 (r300render->r300->vertex_info.size * 4) - 1; 989 990 CS_LOCALS(r300); 991 992 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0); 993 994 BEGIN_CS(dwords); 995 OUT_CS_REG(R300_GA_COLOR_CONTROL, 996 r300_provoking_vertex_fixes(r300, r300render->prim)); 997 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index); 998 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2); 999 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 1000 r300render->hwprim); 1001 for (i = 0; i < count-1; i += 2) { 1002 OUT_CS(indices[i+1] << 16 | indices[i]); 1003 } 1004 if (count % 2) { 1005 OUT_CS(indices[count-1]); 1006 } 1007 END_CS; 1008} 1009 1010static void r300_render_draw_arrays(struct vbuf_render* render, 1011 unsigned start, 1012 unsigned count) 1013{ 1014 struct r300_context* r300 = r300_render(render)->r300; 1015 1016 if (!r300->stencil_ref_bf_fallback) { 1017 r500_render_draw_arrays(render, start, count); 1018 } else { 1019 r300_begin_stencil_ref_fallback(r300); 1020 r500_render_draw_arrays(render, start, count); 1021 r300_switch_stencil_ref_side(r300); 1022 r500_render_draw_arrays(render, start, count); 1023 r300_end_stencil_ref_fallback(r300); 1024 } 1025} 1026 1027static void r300_render_draw_elements(struct vbuf_render* render, 1028 const ushort* indices, 1029 uint count) 1030{ 1031 struct r300_context* r300 = r300_render(render)->r300; 1032 1033 if (!r300->stencil_ref_bf_fallback) { 1034 r500_render_draw_elements(render, indices, count); 1035 } else { 1036 r300_begin_stencil_ref_fallback(r300); 1037 r500_render_draw_elements(render, indices, count); 1038 r300_switch_stencil_ref_side(r300); 1039 r500_render_draw_elements(render, indices, count); 1040 r300_end_stencil_ref_fallback(r300); 1041 } 1042} 1043 1044static void r300_render_destroy(struct vbuf_render* render) 1045{ 1046 FREE(render); 1047} 1048 1049static struct vbuf_render* r300_render_create(struct r300_context* r300) 1050{ 1051 struct r300_render* r300render = CALLOC_STRUCT(r300_render); 1052 1053 r300render->r300 = r300; 1054 1055 /* XXX find real numbers plz */ 1056 r300render->base.max_vertex_buffer_bytes = 128 * 1024; 1057 r300render->base.max_indices = 16 * 1024; 1058 1059 r300render->base.get_vertex_info = r300_render_get_vertex_info; 1060 r300render->base.allocate_vertices = r300_render_allocate_vertices; 1061 r300render->base.map_vertices = r300_render_map_vertices; 1062 r300render->base.unmap_vertices = r300_render_unmap_vertices; 1063 r300render->base.set_primitive = r300_render_set_primitive; 1064 if (r300->screen->caps.is_r500) { 1065 r300render->base.draw_elements = r500_render_draw_elements; 1066 r300render->base.draw_arrays = r500_render_draw_arrays; 1067 } else { 1068 r300render->base.draw_elements = r300_render_draw_elements; 1069 r300render->base.draw_arrays = r300_render_draw_arrays; 1070 } 1071 r300render->base.release_vertices = r300_render_release_vertices; 1072 r300render->base.destroy = r300_render_destroy; 1073 1074 r300render->vbo = NULL; 1075 r300render->vbo_size = 0; 1076 r300render->vbo_offset = 0; 1077 1078 return &r300render->base; 1079} 1080 1081struct draw_stage* r300_draw_stage(struct r300_context* r300) 1082{ 1083 struct vbuf_render* render; 1084 struct draw_stage* stage; 1085 1086 render = r300_render_create(r300); 1087 1088 if (!render) { 1089 return NULL; 1090 } 1091 1092 stage = draw_vbuf_stage(r300->draw, render); 1093 1094 if (!stage) { 1095 render->destroy(render); 1096 return NULL; 1097 } 1098 1099 draw_set_render(r300->draw, render); 1100 1101 return stage; 1102} 1103 1104void r300_init_render_functions(struct r300_context *r300) 1105{ 1106 if (r300->screen->caps.has_tcl) { 1107 r300->context.draw_arrays = r300_draw_arrays; 1108 r300->context.draw_elements = r300_draw_elements; 1109 r300->context.draw_range_elements = r300_draw_range_elements; 1110 1111 if (r300->screen->caps.is_r500) { 1112 r300->emit_draw_arrays_immediate = r500_emit_draw_arrays_immediate; 1113 r300->emit_draw_arrays = r500_emit_draw_arrays; 1114 r300->emit_draw_elements = r500_emit_draw_elements; 1115 } else { 1116 r300->emit_draw_arrays_immediate = r300_emit_draw_arrays_immediate; 1117 r300->emit_draw_arrays = r300_emit_draw_arrays; 1118 r300->emit_draw_elements = r300_emit_draw_elements; 1119 } 1120 } else { 1121 r300->context.draw_arrays = r300_swtcl_draw_arrays; 1122 r300->context.draw_elements = r300_draw_elements; 1123 r300->context.draw_range_elements = r300_swtcl_draw_range_elements; 1124 } 1125} 1126