r300_render.c revision 578d4539ba72a9f52e0cb3f615bb04bf9407b574
1/* 2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2010 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24/* r300_render: Vertex and index buffer primitive emission. Contains both 25 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */ 26 27#include "draw/draw_context.h" 28#include "draw/draw_vbuf.h" 29 30#include "util/u_inlines.h" 31 32#include "util/u_format.h" 33#include "util/u_memory.h" 34#include "util/u_upload_mgr.h" 35#include "util/u_prim.h" 36 37#include "r300_cs.h" 38#include "r300_context.h" 39#include "r300_screen_buffer.h" 40#include "r300_emit.h" 41#include "r300_reg.h" 42 43#include <limits.h> 44 45#define IMMD_DWORDS 32 46 47static uint32_t r300_translate_primitive(unsigned prim) 48{ 49 static const int prim_conv[] = { 50 R300_VAP_VF_CNTL__PRIM_POINTS, 51 R300_VAP_VF_CNTL__PRIM_LINES, 52 R300_VAP_VF_CNTL__PRIM_LINE_LOOP, 53 R300_VAP_VF_CNTL__PRIM_LINE_STRIP, 54 R300_VAP_VF_CNTL__PRIM_TRIANGLES, 55 R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP, 56 R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN, 57 R300_VAP_VF_CNTL__PRIM_QUADS, 58 R300_VAP_VF_CNTL__PRIM_QUAD_STRIP, 59 R300_VAP_VF_CNTL__PRIM_POLYGON, 60 -1, 61 -1, 62 -1, 63 -1 64 }; 65 unsigned hwprim = prim_conv[prim]; 66 67 assert(hwprim != -1); 68 return hwprim; 69} 70 71static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300, 72 unsigned mode) 73{ 74 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state; 75 uint32_t color_control = rs->color_control; 76 77 /* By default (see r300_state.c:r300_create_rs_state) color_control is 78 * initialized to provoking the first vertex. 79 * 80 * Triangle fans must be reduced to the second vertex, not the first, in 81 * Gallium flatshade-first mode, as per the GL spec. 82 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt) 83 * 84 * Quads never provoke correctly in flatshade-first mode. The first 85 * vertex is never considered as provoking, so only the second, third, 86 * and fourth vertices can be selected, and both "third" and "last" modes 87 * select the fourth vertex. This is probably due to D3D lacking quads. 88 * 89 * Similarly, polygons reduce to the first, not the last, vertex, when in 90 * "last" mode, and all other modes start from the second vertex. 91 * 92 * ~ C. 93 */ 94 95 if (rs->rs.flatshade_first) { 96 switch (mode) { 97 case PIPE_PRIM_TRIANGLE_FAN: 98 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND; 99 break; 100 case PIPE_PRIM_QUADS: 101 case PIPE_PRIM_QUAD_STRIP: 102 case PIPE_PRIM_POLYGON: 103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 104 break; 105 default: 106 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST; 107 break; 108 } 109 } else { 110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 111 } 112 113 return color_control; 114} 115 116void r500_emit_index_bias(struct r300_context *r300, int index_bias) 117{ 118 CS_LOCALS(r300); 119 120 BEGIN_CS(2); 121 OUT_CS_REG(R500_VAP_INDEX_OFFSET, 122 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0)); 123 END_CS; 124} 125 126static void r300_emit_draw_init(struct r300_context *r300, unsigned mode, 127 unsigned min_index, unsigned max_index) 128{ 129 CS_LOCALS(r300); 130 131 BEGIN_CS(5); 132 OUT_CS_REG(R300_GA_COLOR_CONTROL, 133 r300_provoking_vertex_fixes(r300, mode)); 134 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 135 OUT_CS(max_index); 136 OUT_CS(min_index); 137 END_CS; 138} 139 140/* This function splits the index bias value into two parts: 141 * - buffer_offset: the value that can be safely added to buffer offsets 142 * in r300_emit_vertex_arrays (it must yield a positive offset when added to 143 * a vertex buffer offset) 144 * - index_offset: the value that must be manually subtracted from indices 145 * in an index buffer to achieve negative offsets. */ 146static void r300_split_index_bias(struct r300_context *r300, int index_bias, 147 int *buffer_offset, int *index_offset) 148{ 149 struct pipe_vertex_buffer *vb, *vbufs = r300->vbuf_mgr->vertex_buffer; 150 struct pipe_vertex_element *velem = r300->velems->velem; 151 unsigned i, size; 152 int max_neg_bias; 153 154 if (index_bias < 0) { 155 /* See how large index bias we may subtract. We must be careful 156 * here because negative buffer offsets are not allowed 157 * by the DRM API. */ 158 max_neg_bias = INT_MAX; 159 for (i = 0; i < r300->velems->count; i++) { 160 vb = &vbufs[velem[i].vertex_buffer_index]; 161 size = (vb->buffer_offset + velem[i].src_offset) / vb->stride; 162 max_neg_bias = MIN2(max_neg_bias, size); 163 } 164 165 /* Now set the minimum allowed value. */ 166 *buffer_offset = MAX2(-max_neg_bias, index_bias); 167 } else { 168 /* A positive index bias is OK. */ 169 *buffer_offset = index_bias; 170 } 171 172 *index_offset = index_bias - *buffer_offset; 173} 174 175enum r300_prepare_flags { 176 PREP_EMIT_STATES = (1 << 0), /* call emit_dirty_state and friends? */ 177 PREP_VALIDATE_VBOS = (1 << 1), /* validate VBOs? */ 178 PREP_EMIT_AOS = (1 << 2), /* call emit_vertex_arrays? */ 179 PREP_EMIT_AOS_SWTCL = (1 << 3), /* call emit_vertex_arrays_swtcl? */ 180 PREP_INDEXED = (1 << 4) /* is this draw_elements? */ 181}; 182 183/** 184 * Check if the requested number of dwords is available in the CS and 185 * if not, flush. 186 * \param r300 The context. 187 * \param flags See r300_prepare_flags. 188 * \param cs_dwords The number of dwords to reserve in CS. 189 * \return TRUE if the CS was flushed 190 */ 191static boolean r300_reserve_cs_dwords(struct r300_context *r300, 192 enum r300_prepare_flags flags, 193 unsigned cs_dwords) 194{ 195 boolean flushed = FALSE; 196 boolean first_draw = flags & PREP_EMIT_STATES; 197 boolean emit_vertex_arrays = flags & PREP_EMIT_AOS; 198 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_AOS_SWTCL; 199 200 /* Add dirty state, index offset, and AOS. */ 201 if (first_draw) { 202 cs_dwords += r300_get_num_dirty_dwords(r300); 203 204 if (r300->screen->caps.is_r500) 205 cs_dwords += 2; /* emit_index_offset */ 206 207 if (emit_vertex_arrays) 208 cs_dwords += 55; /* emit_vertex_arrays */ 209 210 if (emit_vertex_arrays_swtcl) 211 cs_dwords += 7; /* emit_vertex_arrays_swtcl */ 212 } 213 214 cs_dwords += r300_get_num_cs_end_dwords(r300); 215 216 /* Reserve requested CS space. */ 217 if (cs_dwords > (RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw)) { 218 r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL); 219 flushed = TRUE; 220 } 221 222 return flushed; 223} 224 225/** 226 * Validate buffers and emit dirty state. 227 * \param r300 The context. 228 * \param flags See r300_prepare_flags. 229 * \param index_buffer The index buffer to validate. The parameter may be NULL. 230 * \param buffer_offset The offset passed to emit_vertex_arrays. 231 * \param index_bias The index bias to emit. 232 * \param instance_id Index of instance to render 233 * \return TRUE if rendering should be skipped 234 */ 235static boolean r300_emit_states(struct r300_context *r300, 236 enum r300_prepare_flags flags, 237 struct pipe_resource *index_buffer, 238 int buffer_offset, 239 int index_bias, int instance_id) 240{ 241 boolean first_draw = flags & PREP_EMIT_STATES; 242 boolean emit_vertex_arrays = flags & PREP_EMIT_AOS; 243 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_AOS_SWTCL; 244 boolean indexed = flags & PREP_INDEXED; 245 boolean validate_vbos = flags & PREP_VALIDATE_VBOS; 246 247 /* Validate buffers and emit dirty state if needed. */ 248 if (first_draw) { 249 if (!r300_emit_buffer_validate(r300, validate_vbos, 250 index_buffer)) { 251 fprintf(stderr, "r300: CS space validation failed. " 252 "(not enough memory?) Skipping rendering.\n"); 253 return FALSE; 254 } 255 256 r300_emit_dirty_state(r300); 257 if (r300->screen->caps.is_r500) { 258 if (r300->screen->caps.has_tcl) 259 r500_emit_index_bias(r300, index_bias); 260 else 261 r500_emit_index_bias(r300, 0); 262 } 263 264 if (emit_vertex_arrays && 265 (r300->vertex_arrays_dirty || 266 r300->vertex_arrays_indexed != indexed || 267 r300->vertex_arrays_offset != buffer_offset || 268 r300->vertex_arrays_instance_id != instance_id)) { 269 r300_emit_vertex_arrays(r300, buffer_offset, indexed, instance_id); 270 271 r300->vertex_arrays_dirty = FALSE; 272 r300->vertex_arrays_indexed = indexed; 273 r300->vertex_arrays_offset = buffer_offset; 274 r300->vertex_arrays_instance_id = instance_id; 275 } 276 277 if (emit_vertex_arrays_swtcl) 278 r300_emit_vertex_arrays_swtcl(r300, indexed); 279 } 280 281 return TRUE; 282} 283 284/** 285 * Check if the requested number of dwords is available in the CS and 286 * if not, flush. Then validate buffers and emit dirty state. 287 * \param r300 The context. 288 * \param flags See r300_prepare_flags. 289 * \param index_buffer The index buffer to validate. The parameter may be NULL. 290 * \param cs_dwords The number of dwords to reserve in CS. 291 * \param buffer_offset The offset passed to emit_vertex_arrays. 292 * \param index_bias The index bias to emit. 293 * \param instance_id The instance to render. 294 * \return TRUE if rendering should be skipped 295 */ 296static boolean r300_prepare_for_rendering(struct r300_context *r300, 297 enum r300_prepare_flags flags, 298 struct pipe_resource *index_buffer, 299 unsigned cs_dwords, 300 int buffer_offset, 301 int index_bias, 302 int instance_id) 303{ 304 /* Make sure there is enough space in the command stream and emit states. */ 305 if (r300_reserve_cs_dwords(r300, flags, cs_dwords)) 306 flags |= PREP_EMIT_STATES; 307 308 return r300_emit_states(r300, flags, index_buffer, buffer_offset, 309 index_bias, instance_id); 310} 311 312static boolean immd_is_good_idea(struct r300_context *r300, 313 unsigned count) 314{ 315 struct pipe_vertex_element* velem; 316 struct pipe_resource *buf; 317 boolean checked[PIPE_MAX_ATTRIBS] = {0}; 318 unsigned vertex_element_count = r300->velems->count; 319 unsigned i, vbi; 320 321 if (DBG_ON(r300, DBG_NO_IMMD)) { 322 return FALSE; 323 } 324 325 if (r300->draw) { 326 return FALSE; 327 } 328 329 if (count * r300->velems->vertex_size_dwords > IMMD_DWORDS) { 330 return FALSE; 331 } 332 333 /* We shouldn't map buffers referenced by CS, busy buffers, 334 * and ones placed in VRAM. */ 335 for (i = 0; i < vertex_element_count; i++) { 336 velem = &r300->velems->velem[i]; 337 vbi = velem->vertex_buffer_index; 338 339 if (!checked[vbi]) { 340 buf = r300->vbuf_mgr->real_vertex_buffer[vbi]; 341 342 if ((r300_resource(buf)->domain != RADEON_DOMAIN_GTT)) { 343 return FALSE; 344 } 345 346 checked[vbi] = TRUE; 347 } 348 } 349 return TRUE; 350} 351 352/***************************************************************************** 353 * The HWTCL draw functions. * 354 ****************************************************************************/ 355 356static void r300_draw_arrays_immediate(struct r300_context *r300, 357 const struct pipe_draw_info *info) 358{ 359 struct pipe_vertex_element* velem; 360 struct pipe_vertex_buffer* vbuf; 361 unsigned vertex_element_count = r300->velems->count; 362 unsigned i, v, vbi; 363 364 /* Size of the vertex, in dwords. */ 365 unsigned vertex_size = r300->velems->vertex_size_dwords; 366 367 /* The number of dwords for this draw operation. */ 368 unsigned dwords = 4 + info->count * vertex_size; 369 370 /* Size of the vertex element, in dwords. */ 371 unsigned size[PIPE_MAX_ATTRIBS]; 372 373 /* Stride to the same attrib in the next vertex in the vertex buffer, 374 * in dwords. */ 375 unsigned stride[PIPE_MAX_ATTRIBS]; 376 377 /* Mapped vertex buffers. */ 378 uint32_t* map[PIPE_MAX_ATTRIBS] = {0}; 379 uint32_t* mapelem[PIPE_MAX_ATTRIBS]; 380 381 CS_LOCALS(r300); 382 383 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1)) 384 return; 385 386 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */ 387 for (i = 0; i < vertex_element_count; i++) { 388 velem = &r300->velems->velem[i]; 389 size[i] = r300->velems->format_size[i] / 4; 390 vbi = velem->vertex_buffer_index; 391 vbuf = &r300->vbuf_mgr->vertex_buffer[vbi]; 392 stride[i] = vbuf->stride / 4; 393 394 /* Map the buffer. */ 395 if (!map[vbi]) { 396 map[vbi] = (uint32_t*)r300->rws->buffer_map( 397 r300_resource(r300->vbuf_mgr->real_vertex_buffer[vbi])->buf, 398 r300->cs, PIPE_TRANSFER_READ | PIPE_TRANSFER_UNSYNCHRONIZED); 399 map[vbi] += (vbuf->buffer_offset / 4) + stride[i] * info->start; 400 } 401 mapelem[i] = map[vbi] + (velem->src_offset / 4); 402 } 403 404 r300_emit_draw_init(r300, info->mode, 0, info->count-1); 405 406 BEGIN_CS(dwords); 407 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size); 408 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, info->count * vertex_size); 409 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (info->count << 16) | 410 r300_translate_primitive(info->mode)); 411 412 /* Emit vertices. */ 413 for (v = 0; v < info->count; v++) { 414 for (i = 0; i < vertex_element_count; i++) { 415 OUT_CS_TABLE(&mapelem[i][stride[i] * v], size[i]); 416 } 417 } 418 END_CS; 419 420 /* Unmap buffers. */ 421 for (i = 0; i < vertex_element_count; i++) { 422 vbi = r300->velems->velem[i].vertex_buffer_index; 423 424 if (map[vbi]) { 425 r300->rws->buffer_unmap(r300_resource(r300->vbuf_mgr->real_vertex_buffer[vbi])->buf); 426 map[vbi] = NULL; 427 } 428 } 429} 430 431static void r300_emit_draw_arrays(struct r300_context *r300, 432 unsigned mode, 433 unsigned count) 434{ 435 boolean alt_num_verts = count > 65535; 436 CS_LOCALS(r300); 437 438 if (count >= (1 << 24)) { 439 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 440 "refusing to render.\n", count); 441 return; 442 } 443 444 r300_emit_draw_init(r300, mode, 0, count-1); 445 446 BEGIN_CS(2 + (alt_num_verts ? 2 : 0)); 447 if (alt_num_verts) { 448 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 449 } 450 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 451 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 452 r300_translate_primitive(mode) | 453 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 454 END_CS; 455} 456 457static void r300_emit_draw_elements(struct r300_context *r300, 458 struct pipe_resource* indexBuffer, 459 unsigned indexSize, 460 unsigned min_index, 461 unsigned max_index, 462 unsigned mode, 463 unsigned start, 464 unsigned count, 465 uint16_t *imm_indices3) 466{ 467 uint32_t count_dwords, offset_dwords; 468 boolean alt_num_verts = count > 65535; 469 CS_LOCALS(r300); 470 471 if (count >= (1 << 24) || max_index >= (1 << 24)) { 472 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 473 "refusing to render (max_index: %i).\n", count, max_index); 474 return; 475 } 476 477 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n", 478 count, min_index, max_index); 479 480 r300_emit_draw_init(r300, mode, min_index, max_index); 481 482 /* If start is odd, render the first triangle with indices embedded 483 * in the command stream. This will increase start by 3 and make it 484 * even. We can then proceed without a fallback. */ 485 if (indexSize == 2 && (start & 1) && 486 mode == PIPE_PRIM_TRIANGLES) { 487 BEGIN_CS(4); 488 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 2); 489 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (3 << 16) | 490 R300_VAP_VF_CNTL__PRIM_TRIANGLES); 491 OUT_CS(imm_indices3[1] << 16 | imm_indices3[0]); 492 OUT_CS(imm_indices3[2]); 493 END_CS; 494 495 start += 3; 496 count -= 3; 497 if (!count) 498 return; 499 } 500 501 offset_dwords = indexSize * start / sizeof(uint32_t); 502 503 BEGIN_CS(8 + (alt_num_verts ? 2 : 0)); 504 if (alt_num_verts) { 505 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 506 } 507 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); 508 if (indexSize == 4) { 509 count_dwords = count; 510 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 511 R300_VAP_VF_CNTL__INDEX_SIZE_32bit | 512 r300_translate_primitive(mode) | 513 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 514 } else { 515 count_dwords = (count + 1) / 2; 516 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 517 r300_translate_primitive(mode) | 518 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 519 } 520 521 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); 522 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) | 523 (0 << R300_INDX_BUFFER_SKIP_SHIFT)); 524 OUT_CS(offset_dwords << 2); 525 OUT_CS(count_dwords); 526 OUT_CS_RELOC(r300_resource(indexBuffer)); 527 END_CS; 528} 529 530static void r300_draw_elements_immediate(struct r300_context *r300, 531 const struct pipe_draw_info *info) 532{ 533 uint8_t *ptr1; 534 uint16_t *ptr2; 535 uint32_t *ptr4; 536 unsigned index_size = r300->index_buffer.index_size; 537 unsigned i, count_dwords = index_size == 4 ? info->count : 538 (info->count + 1) / 2; 539 CS_LOCALS(r300); 540 541 /* 19 dwords for r300_draw_elements_immediate. Give up if the function fails. */ 542 if (!r300_prepare_for_rendering(r300, 543 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_AOS | 544 PREP_INDEXED, NULL, 2+count_dwords, 0, info->index_bias, -1)) 545 return; 546 547 r300_emit_draw_init(r300, info->mode, info->min_index, info->max_index); 548 549 BEGIN_CS(2 + count_dwords); 550 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, count_dwords); 551 552 switch (index_size) { 553 case 1: 554 ptr1 = r300_resource(r300->index_buffer.buffer)->b.user_ptr; 555 ptr1 += info->start; 556 557 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) | 558 r300_translate_primitive(info->mode)); 559 560 if (info->index_bias && !r300->screen->caps.is_r500) { 561 for (i = 0; i < info->count-1; i += 2) 562 OUT_CS(((ptr1[i+1] + info->index_bias) << 16) | 563 (ptr1[i] + info->index_bias)); 564 565 if (info->count & 1) 566 OUT_CS(ptr1[i] + info->index_bias); 567 } else { 568 for (i = 0; i < info->count-1; i += 2) 569 OUT_CS(((ptr1[i+1]) << 16) | 570 (ptr1[i] )); 571 572 if (info->count & 1) 573 OUT_CS(ptr1[i]); 574 } 575 break; 576 577 case 2: 578 ptr2 = (uint16_t*)r300_resource(r300->index_buffer.buffer)->b.user_ptr; 579 ptr2 += info->start; 580 581 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) | 582 r300_translate_primitive(info->mode)); 583 584 if (info->index_bias && !r300->screen->caps.is_r500) { 585 for (i = 0; i < info->count-1; i += 2) 586 OUT_CS(((ptr2[i+1] + info->index_bias) << 16) | 587 (ptr2[i] + info->index_bias)); 588 589 if (info->count & 1) 590 OUT_CS(ptr2[i] + info->index_bias); 591 } else { 592 OUT_CS_TABLE(ptr2, count_dwords); 593 } 594 break; 595 596 case 4: 597 ptr4 = (uint32_t*)r300_resource(r300->index_buffer.buffer)->b.user_ptr; 598 ptr4 += info->start; 599 600 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) | 601 R300_VAP_VF_CNTL__INDEX_SIZE_32bit | 602 r300_translate_primitive(info->mode)); 603 604 if (info->index_bias && !r300->screen->caps.is_r500) { 605 for (i = 0; i < info->count; i++) 606 OUT_CS(ptr4[i] + info->index_bias); 607 } else { 608 OUT_CS_TABLE(ptr4, count_dwords); 609 } 610 break; 611 } 612 END_CS; 613} 614 615static void r300_draw_elements(struct r300_context *r300, 616 const struct pipe_draw_info *info, 617 int instance_id) 618{ 619 struct pipe_resource *indexBuffer = r300->index_buffer.buffer; 620 unsigned indexSize = r300->index_buffer.index_size; 621 struct pipe_resource* orgIndexBuffer = indexBuffer; 622 unsigned start = info->start; 623 unsigned count = info->count; 624 boolean alt_num_verts = r300->screen->caps.is_r500 && 625 count > 65536; 626 unsigned short_count; 627 int buffer_offset = 0, index_offset = 0; /* for index bias emulation */ 628 uint16_t indices3[3]; 629 630 if (info->index_bias && !r300->screen->caps.is_r500) { 631 r300_split_index_bias(r300, info->index_bias, &buffer_offset, &index_offset); 632 } 633 634 r300_translate_index_buffer(r300, &indexBuffer, &indexSize, index_offset, 635 &start, count); 636 637 /* Fallback for misaligned ushort indices. */ 638 if (indexSize == 2 && (start & 1) && 639 !r300_resource(indexBuffer)->b.user_ptr) { 640 /* If we got here, then orgIndexBuffer == indexBuffer. */ 641 uint16_t *ptr = r300->rws->buffer_map(r300_resource(orgIndexBuffer)->buf, 642 r300->cs, 643 PIPE_TRANSFER_READ | 644 PIPE_TRANSFER_UNSYNCHRONIZED); 645 646 if (info->mode == PIPE_PRIM_TRIANGLES) { 647 memcpy(indices3, ptr + start, 6); 648 } else { 649 /* Copy the mapped index buffer directly to the upload buffer. 650 * The start index will be aligned simply from the fact that 651 * every sub-buffer in the upload buffer is aligned. */ 652 r300_upload_index_buffer(r300, &indexBuffer, indexSize, &start, 653 count, (uint8_t*)ptr); 654 } 655 r300->rws->buffer_unmap(r300_resource(orgIndexBuffer)->buf); 656 } else { 657 if (r300_resource(indexBuffer)->b.user_ptr) 658 r300_upload_index_buffer(r300, &indexBuffer, indexSize, 659 &start, count, 660 r300_resource(indexBuffer)->b.user_ptr); 661 } 662 663 /* 19 dwords for emit_draw_elements. Give up if the function fails. */ 664 if (!r300_prepare_for_rendering(r300, 665 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_AOS | 666 PREP_INDEXED, indexBuffer, 19, buffer_offset, info->index_bias, 667 instance_id)) 668 goto done; 669 670 if (alt_num_verts || count <= 65535) { 671 r300_emit_draw_elements(r300, indexBuffer, indexSize, info->min_index, 672 info->max_index, info->mode, start, count, 673 indices3); 674 } else { 675 do { 676 /* The maximum must be divisible by 4 and 3, 677 * so that quad and triangle lists are split correctly. 678 * 679 * Strips, loops, and fans won't work. */ 680 short_count = MIN2(count, 65532); 681 682 r300_emit_draw_elements(r300, indexBuffer, indexSize, 683 info->min_index, info->max_index, 684 info->mode, start, short_count, indices3); 685 686 start += short_count; 687 count -= short_count; 688 689 /* 15 dwords for emit_draw_elements */ 690 if (count) { 691 if (!r300_prepare_for_rendering(r300, 692 PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED, 693 indexBuffer, 19, buffer_offset, info->index_bias, 694 instance_id)) 695 goto done; 696 } 697 } while (count); 698 } 699 700done: 701 if (indexBuffer != orgIndexBuffer) { 702 pipe_resource_reference( &indexBuffer, NULL ); 703 } 704} 705 706static void r300_draw_arrays(struct r300_context *r300, 707 const struct pipe_draw_info *info, 708 int instance_id) 709{ 710 boolean alt_num_verts = r300->screen->caps.is_r500 && 711 info->count > 65536; 712 unsigned start = info->start; 713 unsigned count = info->count; 714 unsigned short_count; 715 716 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */ 717 if (!r300_prepare_for_rendering(r300, 718 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_AOS, 719 NULL, 9, start, 0, instance_id)) 720 return; 721 722 if (alt_num_verts || count <= 65535) { 723 r300_emit_draw_arrays(r300, info->mode, count); 724 } else { 725 do { 726 /* The maximum must be divisible by 4 and 3, 727 * so that quad and triangle lists are split correctly. 728 * 729 * Strips, loops, and fans won't work. */ 730 short_count = MIN2(count, 65532); 731 r300_emit_draw_arrays(r300, info->mode, short_count); 732 733 start += short_count; 734 count -= short_count; 735 736 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */ 737 if (count) { 738 if (!r300_prepare_for_rendering(r300, 739 PREP_VALIDATE_VBOS | PREP_EMIT_AOS, NULL, 9, 740 start, 0, instance_id)) 741 return; 742 } 743 } while (count); 744 } 745} 746 747static void r300_draw_arrays_instanced(struct r300_context *r300, 748 const struct pipe_draw_info *info) 749{ 750 int i; 751 752 for (i = 0; i < info->instance_count; i++) 753 r300_draw_arrays(r300, info, i); 754} 755 756static void r300_draw_elements_instanced(struct r300_context *r300, 757 const struct pipe_draw_info *info) 758{ 759 int i; 760 761 for (i = 0; i < info->instance_count; i++) 762 r300_draw_elements(r300, info, i); 763} 764 765static void r300_draw_vbo(struct pipe_context* pipe, 766 const struct pipe_draw_info *dinfo) 767{ 768 struct r300_context* r300 = r300_context(pipe); 769 struct pipe_draw_info info = *dinfo; 770 boolean buffers_updated, uploader_flushed; 771 772 info.indexed = info.indexed && r300->index_buffer.buffer; 773 774 if (r300->skip_rendering || 775 !u_trim_pipe_prim(info.mode, &info.count)) { 776 return; 777 } 778 779 r300_update_derived_state(r300); 780 781 /* Start the vbuf manager and update buffers if needed. */ 782 u_vbuf_mgr_draw_begin(r300->vbuf_mgr, &info, 783 &buffers_updated, &uploader_flushed); 784 if (buffers_updated) { 785 r300->vertex_arrays_dirty = TRUE; 786 } 787 788 /* Draw. */ 789 if (info.indexed) { 790 info.start += r300->index_buffer.offset; 791 info.max_index = MIN2(r300->vbuf_mgr->max_index, info.max_index); 792 793 if (info.instance_count <= 1) { 794 if (info.count <= 8 && 795 r300_resource(r300->index_buffer.buffer)->b.user_ptr) { 796 r300_draw_elements_immediate(r300, &info); 797 } else { 798 r300_draw_elements(r300, &info, -1); 799 } 800 } else { 801 r300_draw_elements_instanced(r300, &info); 802 } 803 } else { 804 if (info.instance_count <= 1) { 805 if (immd_is_good_idea(r300, info.count)) { 806 r300_draw_arrays_immediate(r300, &info); 807 } else { 808 r300_draw_arrays(r300, &info, -1); 809 } 810 } else { 811 r300_draw_arrays_instanced(r300, &info); 812 } 813 } 814 815 u_vbuf_mgr_draw_end(r300->vbuf_mgr); 816} 817 818/**************************************************************************** 819 * The rest of this file is for SW TCL rendering only. Please be polite and * 820 * keep these functions separated so that they are easier to locate. ~C. * 821 ***************************************************************************/ 822 823/* SW TCL elements, using Draw. */ 824static void r300_swtcl_draw_vbo(struct pipe_context* pipe, 825 const struct pipe_draw_info *info) 826{ 827 struct r300_context* r300 = r300_context(pipe); 828 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; 829 struct pipe_transfer *ib_transfer = NULL; 830 unsigned count = info->count; 831 int i; 832 void *indices = NULL; 833 boolean indexed = info->indexed && r300->index_buffer.buffer; 834 835 if (r300->skip_rendering) { 836 return; 837 } 838 839 if (!u_trim_pipe_prim(info->mode, &count)) { 840 return; 841 } 842 843 r300_update_derived_state(r300); 844 845 r300_reserve_cs_dwords(r300, 846 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL | 847 (indexed ? PREP_INDEXED : 0), 848 indexed ? 256 : 6); 849 850 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) { 851 if (r300->vbuf_mgr->vertex_buffer[i].buffer) { 852 void *buf = pipe_buffer_map(pipe, 853 r300->vbuf_mgr->vertex_buffer[i].buffer, 854 PIPE_TRANSFER_READ | 855 PIPE_TRANSFER_UNSYNCHRONIZED, 856 &vb_transfer[i]); 857 draw_set_mapped_vertex_buffer(r300->draw, i, buf); 858 } 859 } 860 861 if (indexed) { 862 indices = pipe_buffer_map(pipe, r300->index_buffer.buffer, 863 PIPE_TRANSFER_READ | 864 PIPE_TRANSFER_UNSYNCHRONIZED, &ib_transfer); 865 } 866 867 draw_set_mapped_index_buffer(r300->draw, indices); 868 869 r300->draw_vbo_locked = TRUE; 870 r300->draw_first_emitted = FALSE; 871 draw_vbo(r300->draw, info); 872 draw_flush(r300->draw); 873 r300->draw_vbo_locked = FALSE; 874 875 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) { 876 if (r300->vbuf_mgr->vertex_buffer[i].buffer) { 877 pipe_buffer_unmap(pipe, vb_transfer[i]); 878 draw_set_mapped_vertex_buffer(r300->draw, i, NULL); 879 } 880 } 881 882 if (indexed) { 883 pipe_buffer_unmap(pipe, ib_transfer); 884 draw_set_mapped_index_buffer(r300->draw, NULL); 885 } 886} 887 888/* Object for rendering using Draw. */ 889struct r300_render { 890 /* Parent class */ 891 struct vbuf_render base; 892 893 /* Pipe context */ 894 struct r300_context* r300; 895 896 /* Vertex information */ 897 size_t vertex_size; 898 unsigned prim; 899 unsigned hwprim; 900 901 /* VBO */ 902 size_t vbo_max_used; 903 void * vbo_ptr; 904 905 struct pipe_transfer *vbo_transfer; 906}; 907 908static INLINE struct r300_render* 909r300_render(struct vbuf_render* render) 910{ 911 return (struct r300_render*)render; 912} 913 914static const struct vertex_info* 915r300_render_get_vertex_info(struct vbuf_render* render) 916{ 917 struct r300_render* r300render = r300_render(render); 918 struct r300_context* r300 = r300render->r300; 919 920 return &r300->vertex_info; 921} 922 923static boolean r300_render_allocate_vertices(struct vbuf_render* render, 924 ushort vertex_size, 925 ushort count) 926{ 927 struct r300_render* r300render = r300_render(render); 928 struct r300_context* r300 = r300render->r300; 929 struct pipe_screen* screen = r300->context.screen; 930 size_t size = (size_t)vertex_size * (size_t)count; 931 932 DBG(r300, DBG_DRAW, "r300: render_allocate_vertices (size: %d)\n", size); 933 934 if (size + r300->draw_vbo_offset > r300->draw_vbo_size) 935 { 936 pipe_resource_reference(&r300->vbo, NULL); 937 r300->vbo = pipe_buffer_create(screen, 938 PIPE_BIND_VERTEX_BUFFER, 939 PIPE_USAGE_STREAM, 940 R300_MAX_DRAW_VBO_SIZE); 941 r300->draw_vbo_offset = 0; 942 r300->draw_vbo_size = R300_MAX_DRAW_VBO_SIZE; 943 } 944 945 r300render->vertex_size = vertex_size; 946 947 return (r300->vbo) ? TRUE : FALSE; 948} 949 950static void* r300_render_map_vertices(struct vbuf_render* render) 951{ 952 struct r300_render* r300render = r300_render(render); 953 struct r300_context* r300 = r300render->r300; 954 955 assert(!r300render->vbo_transfer); 956 957 DBG(r300, DBG_DRAW, "r300: render_map_vertices\n"); 958 959 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context, 960 r300->vbo, 961 PIPE_TRANSFER_WRITE | 962 PIPE_TRANSFER_UNSYNCHRONIZED, 963 &r300render->vbo_transfer); 964 965 assert(r300render->vbo_ptr); 966 967 return ((uint8_t*)r300render->vbo_ptr + r300->draw_vbo_offset); 968} 969 970static void r300_render_unmap_vertices(struct vbuf_render* render, 971 ushort min, 972 ushort max) 973{ 974 struct r300_render* r300render = r300_render(render); 975 struct pipe_context* context = &r300render->r300->context; 976 struct r300_context* r300 = r300render->r300; 977 978 assert(r300render->vbo_transfer); 979 980 DBG(r300, DBG_DRAW, "r300: render_unmap_vertices\n"); 981 982 r300render->vbo_max_used = MAX2(r300render->vbo_max_used, 983 r300render->vertex_size * (max + 1)); 984 pipe_buffer_unmap(context, r300render->vbo_transfer); 985 986 r300render->vbo_transfer = NULL; 987} 988 989static void r300_render_release_vertices(struct vbuf_render* render) 990{ 991 struct r300_render* r300render = r300_render(render); 992 struct r300_context* r300 = r300render->r300; 993 994 DBG(r300, DBG_DRAW, "r300: render_release_vertices\n"); 995 996 r300->draw_vbo_offset += r300render->vbo_max_used; 997 r300render->vbo_max_used = 0; 998} 999 1000static boolean r300_render_set_primitive(struct vbuf_render* render, 1001 unsigned prim) 1002{ 1003 struct r300_render* r300render = r300_render(render); 1004 1005 r300render->prim = prim; 1006 r300render->hwprim = r300_translate_primitive(prim); 1007 1008 return TRUE; 1009} 1010 1011static void r300_render_draw_arrays(struct vbuf_render* render, 1012 unsigned start, 1013 unsigned count) 1014{ 1015 struct r300_render* r300render = r300_render(render); 1016 struct r300_context* r300 = r300render->r300; 1017 uint8_t* ptr; 1018 unsigned i; 1019 unsigned dwords = 6; 1020 1021 CS_LOCALS(r300); 1022 (void) i; (void) ptr; 1023 1024 DBG(r300, DBG_DRAW, "r300: render_draw_arrays (count: %d)\n", count); 1025 1026 if (r300->draw_first_emitted) { 1027 if (!r300_prepare_for_rendering(r300, 1028 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL, 1029 NULL, dwords, 0, 0, -1)) 1030 return; 1031 } else { 1032 if (!r300_emit_states(r300, 1033 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL, 1034 NULL, 0, 0, -1)) 1035 return; 1036 } 1037 1038 BEGIN_CS(dwords); 1039 OUT_CS_REG(R300_GA_COLOR_CONTROL, 1040 r300_provoking_vertex_fixes(r300, r300render->prim)); 1041 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1); 1042 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 1043 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 1044 r300render->hwprim); 1045 END_CS; 1046 1047 r300->draw_first_emitted = TRUE; 1048} 1049 1050static void r300_render_draw_elements(struct vbuf_render* render, 1051 const ushort* indices, 1052 uint count) 1053{ 1054 struct r300_render* r300render = r300_render(render); 1055 struct r300_context* r300 = r300render->r300; 1056 int i; 1057 unsigned end_cs_dwords; 1058 unsigned max_index = (r300->draw_vbo_size - r300->draw_vbo_offset) / 1059 (r300render->r300->vertex_info.size * 4) - 1; 1060 unsigned short_count; 1061 unsigned free_dwords; 1062 1063 CS_LOCALS(r300); 1064 DBG(r300, DBG_DRAW, "r300: render_draw_elements (count: %d)\n", count); 1065 1066 if (r300->draw_first_emitted) { 1067 if (!r300_prepare_for_rendering(r300, 1068 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL | PREP_INDEXED, 1069 NULL, 256, 0, 0, -1)) 1070 return; 1071 } else { 1072 if (!r300_emit_states(r300, 1073 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL | PREP_INDEXED, 1074 NULL, 0, 0, -1)) 1075 return; 1076 } 1077 1078 /* Below we manage the CS space manually because there may be more 1079 * indices than it can fit in CS. */ 1080 1081 end_cs_dwords = r300_get_num_cs_end_dwords(r300); 1082 1083 while (count) { 1084 free_dwords = RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw; 1085 1086 short_count = MIN2(count, (free_dwords - end_cs_dwords - 6) * 2); 1087 1088 BEGIN_CS(6 + (short_count+1)/2); 1089 OUT_CS_REG(R300_GA_COLOR_CONTROL, 1090 r300_provoking_vertex_fixes(r300, r300render->prim)); 1091 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index); 1092 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (short_count+1)/2); 1093 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (short_count << 16) | 1094 r300render->hwprim); 1095 for (i = 0; i < short_count-1; i += 2) { 1096 OUT_CS(indices[i+1] << 16 | indices[i]); 1097 } 1098 if (short_count % 2) { 1099 OUT_CS(indices[short_count-1]); 1100 } 1101 END_CS; 1102 1103 /* OK now subtract the emitted indices and see if we need to emit 1104 * another draw packet. */ 1105 indices += short_count; 1106 count -= short_count; 1107 1108 if (count) { 1109 if (!r300_prepare_for_rendering(r300, 1110 PREP_EMIT_AOS_SWTCL | PREP_INDEXED, 1111 NULL, 256, 0, 0, -1)) 1112 return; 1113 1114 end_cs_dwords = r300_get_num_cs_end_dwords(r300); 1115 } 1116 } 1117 1118 r300->draw_first_emitted = TRUE; 1119} 1120 1121static void r300_render_destroy(struct vbuf_render* render) 1122{ 1123 FREE(render); 1124} 1125 1126static struct vbuf_render* r300_render_create(struct r300_context* r300) 1127{ 1128 struct r300_render* r300render = CALLOC_STRUCT(r300_render); 1129 1130 r300render->r300 = r300; 1131 1132 r300render->base.max_vertex_buffer_bytes = 1024 * 1024; 1133 r300render->base.max_indices = 16 * 1024; 1134 1135 r300render->base.get_vertex_info = r300_render_get_vertex_info; 1136 r300render->base.allocate_vertices = r300_render_allocate_vertices; 1137 r300render->base.map_vertices = r300_render_map_vertices; 1138 r300render->base.unmap_vertices = r300_render_unmap_vertices; 1139 r300render->base.set_primitive = r300_render_set_primitive; 1140 r300render->base.draw_elements = r300_render_draw_elements; 1141 r300render->base.draw_arrays = r300_render_draw_arrays; 1142 r300render->base.release_vertices = r300_render_release_vertices; 1143 r300render->base.destroy = r300_render_destroy; 1144 1145 return &r300render->base; 1146} 1147 1148struct draw_stage* r300_draw_stage(struct r300_context* r300) 1149{ 1150 struct vbuf_render* render; 1151 struct draw_stage* stage; 1152 1153 render = r300_render_create(r300); 1154 1155 if (!render) { 1156 return NULL; 1157 } 1158 1159 stage = draw_vbuf_stage(r300->draw, render); 1160 1161 if (!stage) { 1162 render->destroy(render); 1163 return NULL; 1164 } 1165 1166 draw_set_render(r300->draw, render); 1167 1168 return stage; 1169} 1170 1171void r300_draw_flush_vbuf(struct r300_context *r300) 1172{ 1173 pipe_resource_reference(&r300->vbo, NULL); 1174 r300->draw_vbo_size = 0; 1175} 1176 1177/**************************************************************************** 1178 * End of SW TCL functions * 1179 ***************************************************************************/ 1180 1181/* This functions is used to draw a rectangle for the blitter module. 1182 * 1183 * If we rendered a quad, the pixels on the main diagonal 1184 * would be computed and stored twice, which makes the clear/copy codepaths 1185 * somewhat inefficient. Instead we use a rectangular point sprite. */ 1186static void r300_blitter_draw_rectangle(struct blitter_context *blitter, 1187 unsigned x1, unsigned y1, 1188 unsigned x2, unsigned y2, 1189 float depth, 1190 enum blitter_attrib_type type, 1191 const float attrib[4]) 1192{ 1193 struct r300_context *r300 = r300_context(util_blitter_get_pipe(blitter)); 1194 unsigned last_sprite_coord_enable = r300->sprite_coord_enable; 1195 unsigned width = x2 - x1; 1196 unsigned height = y2 - y1; 1197 unsigned vertex_size = 1198 type == UTIL_BLITTER_ATTRIB_COLOR || !r300->draw ? 8 : 4; 1199 unsigned dwords = 13 + vertex_size + 1200 (type == UTIL_BLITTER_ATTRIB_TEXCOORD ? 7 : 0); 1201 const float zeros[4] = {0, 0, 0, 0}; 1202 CS_LOCALS(r300); 1203 1204 if (r300->skip_rendering) 1205 return; 1206 1207 r300->context.set_vertex_buffers(&r300->context, 0, NULL); 1208 1209 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) 1210 r300->sprite_coord_enable = 1; 1211 1212 r300_update_derived_state(r300); 1213 1214 /* Mark some states we don't care about as non-dirty. */ 1215 r300->clip_state.dirty = FALSE; 1216 r300->viewport_state.dirty = FALSE; 1217 1218 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1)) 1219 goto done; 1220 1221 DBG(r300, DBG_DRAW, "r300: draw_rectangle\n"); 1222 1223 BEGIN_CS(dwords); 1224 /* Set up GA. */ 1225 OUT_CS_REG(R300_GA_POINT_SIZE, (height * 6) | ((width * 6) << 16)); 1226 1227 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) { 1228 /* Set up the GA to generate texcoords. */ 1229 OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | 1230 (R300_GB_TEX_STR << R300_GB_TEX0_SOURCE_SHIFT)); 1231 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4); 1232 OUT_CS_32F(attrib[0]); 1233 OUT_CS_32F(attrib[3]); 1234 OUT_CS_32F(attrib[2]); 1235 OUT_CS_32F(attrib[1]); 1236 } 1237 1238 /* Set up VAP controls. */ 1239 OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE); 1240 OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VTX_XY_FMT | R300_VTX_Z_FMT); 1241 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size); 1242 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 1243 OUT_CS(1); 1244 OUT_CS(0); 1245 1246 /* Draw. */ 1247 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, vertex_size); 1248 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (1 << 16) | 1249 R300_VAP_VF_CNTL__PRIM_POINTS); 1250 1251 OUT_CS_32F(x1 + width * 0.5f); 1252 OUT_CS_32F(y1 + height * 0.5f); 1253 OUT_CS_32F(depth); 1254 OUT_CS_32F(1); 1255 1256 if (vertex_size == 8) { 1257 if (!attrib) 1258 attrib = zeros; 1259 OUT_CS_TABLE(attrib, 4); 1260 } 1261 END_CS; 1262 1263done: 1264 /* Restore the state. */ 1265 r300_mark_atom_dirty(r300, &r300->clip_state); 1266 r300_mark_atom_dirty(r300, &r300->rs_state); 1267 r300_mark_atom_dirty(r300, &r300->viewport_state); 1268 1269 r300->sprite_coord_enable = last_sprite_coord_enable; 1270} 1271 1272static void r300_resource_resolve(struct pipe_context* pipe, 1273 struct pipe_resource* dest, 1274 unsigned dst_layer, 1275 struct pipe_resource* src, 1276 unsigned src_layer) 1277{ 1278 struct r300_context* r300 = r300_context(pipe); 1279 struct pipe_surface* srcsurf, surf_tmpl; 1280 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state; 1281 float color[] = {0, 0, 0, 0}; 1282 1283 memset(&surf_tmpl, 0, sizeof(surf_tmpl)); 1284 surf_tmpl.format = src->format; 1285 surf_tmpl.usage = 0; /* not really a surface hence no bind flags */ 1286 surf_tmpl.u.tex.level = 0; /* msaa resources cannot have mipmaps */ 1287 surf_tmpl.u.tex.first_layer = src_layer; 1288 surf_tmpl.u.tex.last_layer = src_layer; 1289 srcsurf = pipe->create_surface(pipe, src, &surf_tmpl); 1290 surf_tmpl.format = dest->format; 1291 surf_tmpl.u.tex.first_layer = dst_layer; 1292 surf_tmpl.u.tex.last_layer = dst_layer; 1293 1294 DBG(r300, DBG_DRAW, "r300: Resolving resource...\n"); 1295 1296 /* Enable AA resolve. */ 1297 aa->dest = r300_surface(pipe->create_surface(pipe, dest, &surf_tmpl)); 1298 1299 aa->aaresolve_ctl = 1300 R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE | 1301 R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE; 1302 r300->aa_state.size = 10; 1303 r300_mark_atom_dirty(r300, &r300->aa_state); 1304 1305 /* Resolve the surface. */ 1306 r300->context.clear_render_target(pipe, 1307 srcsurf, color, 0, 0, src->width0, src->height0); 1308 1309 /* Disable AA resolve. */ 1310 aa->aaresolve_ctl = 0; 1311 r300->aa_state.size = 4; 1312 r300_mark_atom_dirty(r300, &r300->aa_state); 1313 1314 pipe_surface_reference((struct pipe_surface**)&srcsurf, NULL); 1315 pipe_surface_reference((struct pipe_surface**)&aa->dest, NULL); 1316} 1317 1318void r300_init_render_functions(struct r300_context *r300) 1319{ 1320 /* Set draw functions based on presence of HW TCL. */ 1321 if (r300->screen->caps.has_tcl) { 1322 r300->context.draw_vbo = r300_draw_vbo; 1323 } else { 1324 r300->context.draw_vbo = r300_swtcl_draw_vbo; 1325 } 1326 1327 r300->context.resource_resolve = r300_resource_resolve; 1328 r300->blitter->draw_rectangle = r300_blitter_draw_rectangle; 1329 1330 /* Plug in the two-sided stencil reference value fallback if needed. */ 1331 if (!r300->screen->caps.is_r500) 1332 r300_plug_in_stencil_ref_fallback(r300); 1333} 1334