r300_render.c revision d35aeff4bb0b03450b2c3c08bd7f84db5bf43283
1/* 2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2010 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24/* r300_render: Vertex and index buffer primitive emission. Contains both 25 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */ 26 27#include "draw/draw_context.h" 28#include "draw/draw_vbuf.h" 29 30#include "util/u_inlines.h" 31 32#include "util/u_format.h" 33#include "util/u_memory.h" 34#include "util/u_upload_mgr.h" 35#include "util/u_prim.h" 36 37#include "r300_cs.h" 38#include "r300_context.h" 39#include "r300_screen_buffer.h" 40#include "r300_emit.h" 41#include "r300_reg.h" 42 43#include <limits.h> 44 45#define IMMD_DWORDS 32 46 47static uint32_t r300_translate_primitive(unsigned prim) 48{ 49 switch (prim) { 50 case PIPE_PRIM_POINTS: 51 return R300_VAP_VF_CNTL__PRIM_POINTS; 52 case PIPE_PRIM_LINES: 53 return R300_VAP_VF_CNTL__PRIM_LINES; 54 case PIPE_PRIM_LINE_LOOP: 55 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP; 56 case PIPE_PRIM_LINE_STRIP: 57 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP; 58 case PIPE_PRIM_TRIANGLES: 59 return R300_VAP_VF_CNTL__PRIM_TRIANGLES; 60 case PIPE_PRIM_TRIANGLE_STRIP: 61 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP; 62 case PIPE_PRIM_TRIANGLE_FAN: 63 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN; 64 case PIPE_PRIM_QUADS: 65 return R300_VAP_VF_CNTL__PRIM_QUADS; 66 case PIPE_PRIM_QUAD_STRIP: 67 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP; 68 case PIPE_PRIM_POLYGON: 69 return R300_VAP_VF_CNTL__PRIM_POLYGON; 70 default: 71 return 0; 72 } 73} 74 75static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300, 76 unsigned mode) 77{ 78 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state; 79 uint32_t color_control = rs->color_control; 80 81 /* By default (see r300_state.c:r300_create_rs_state) color_control is 82 * initialized to provoking the first vertex. 83 * 84 * Triangle fans must be reduced to the second vertex, not the first, in 85 * Gallium flatshade-first mode, as per the GL spec. 86 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt) 87 * 88 * Quads never provoke correctly in flatshade-first mode. The first 89 * vertex is never considered as provoking, so only the second, third, 90 * and fourth vertices can be selected, and both "third" and "last" modes 91 * select the fourth vertex. This is probably due to D3D lacking quads. 92 * 93 * Similarly, polygons reduce to the first, not the last, vertex, when in 94 * "last" mode, and all other modes start from the second vertex. 95 * 96 * ~ C. 97 */ 98 99 if (rs->rs.flatshade_first) { 100 switch (mode) { 101 case PIPE_PRIM_TRIANGLE_FAN: 102 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND; 103 break; 104 case PIPE_PRIM_QUADS: 105 case PIPE_PRIM_QUAD_STRIP: 106 case PIPE_PRIM_POLYGON: 107 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 108 break; 109 default: 110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST; 111 break; 112 } 113 } else { 114 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 115 } 116 117 return color_control; 118} 119 120void r500_emit_index_bias(struct r300_context *r300, int index_bias) 121{ 122 CS_LOCALS(r300); 123 124 BEGIN_CS(2); 125 OUT_CS_REG(R500_VAP_INDEX_OFFSET, 126 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0)); 127 END_CS; 128} 129 130static void r300_emit_draw_init(struct r300_context *r300, unsigned mode, 131 unsigned min_index, unsigned max_index) 132{ 133 CS_LOCALS(r300); 134 135 BEGIN_CS(5); 136 OUT_CS_REG(R300_GA_COLOR_CONTROL, 137 r300_provoking_vertex_fixes(r300, mode)); 138 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 139 OUT_CS(max_index); 140 OUT_CS(min_index); 141 END_CS; 142} 143 144/* This function splits the index bias value into two parts: 145 * - buffer_offset: the value that can be safely added to buffer offsets 146 * in r300_emit_vertex_arrays (it must yield a positive offset when added to 147 * a vertex buffer offset) 148 * - index_offset: the value that must be manually subtracted from indices 149 * in an index buffer to achieve negative offsets. */ 150static void r300_split_index_bias(struct r300_context *r300, int index_bias, 151 int *buffer_offset, int *index_offset) 152{ 153 struct pipe_vertex_buffer *vb, *vbufs = r300->vbuf_mgr->vertex_buffer; 154 struct pipe_vertex_element *velem = r300->velems->velem; 155 unsigned i, size; 156 int max_neg_bias; 157 158 if (index_bias < 0) { 159 /* See how large index bias we may subtract. We must be careful 160 * here because negative buffer offsets are not allowed 161 * by the DRM API. */ 162 max_neg_bias = INT_MAX; 163 for (i = 0; i < r300->velems->count; i++) { 164 vb = &vbufs[velem[i].vertex_buffer_index]; 165 size = (vb->buffer_offset + velem[i].src_offset) / vb->stride; 166 max_neg_bias = MIN2(max_neg_bias, size); 167 } 168 169 /* Now set the minimum allowed value. */ 170 *buffer_offset = MAX2(-max_neg_bias, index_bias); 171 } else { 172 /* A positive index bias is OK. */ 173 *buffer_offset = index_bias; 174 } 175 176 *index_offset = index_bias - *buffer_offset; 177} 178 179enum r300_prepare_flags { 180 PREP_EMIT_STATES = (1 << 0), /* call emit_dirty_state and friends? */ 181 PREP_VALIDATE_VBOS = (1 << 1), /* validate VBOs? */ 182 PREP_EMIT_AOS = (1 << 2), /* call emit_vertex_arrays? */ 183 PREP_EMIT_AOS_SWTCL = (1 << 3), /* call emit_vertex_arrays_swtcl? */ 184 PREP_INDEXED = (1 << 4) /* is this draw_elements? */ 185}; 186 187/** 188 * Check if the requested number of dwords is available in the CS and 189 * if not, flush. 190 * \param r300 The context. 191 * \param flags See r300_prepare_flags. 192 * \param cs_dwords The number of dwords to reserve in CS. 193 * \return TRUE if the CS was flushed 194 */ 195static boolean r300_reserve_cs_dwords(struct r300_context *r300, 196 enum r300_prepare_flags flags, 197 unsigned cs_dwords) 198{ 199 boolean flushed = FALSE; 200 boolean first_draw = flags & PREP_EMIT_STATES; 201 boolean emit_vertex_arrays = flags & PREP_EMIT_AOS; 202 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_AOS_SWTCL; 203 204 /* Add dirty state, index offset, and AOS. */ 205 if (first_draw) { 206 cs_dwords += r300_get_num_dirty_dwords(r300); 207 208 if (r300->screen->caps.is_r500) 209 cs_dwords += 2; /* emit_index_offset */ 210 211 if (emit_vertex_arrays) 212 cs_dwords += 55; /* emit_vertex_arrays */ 213 214 if (emit_vertex_arrays_swtcl) 215 cs_dwords += 7; /* emit_vertex_arrays_swtcl */ 216 } 217 218 cs_dwords += r300_get_num_cs_end_dwords(r300); 219 220 /* Reserve requested CS space. */ 221 if (cs_dwords > (RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw)) { 222 r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL); 223 flushed = TRUE; 224 } 225 226 return flushed; 227} 228 229/** 230 * Validate buffers and emit dirty state. 231 * \param r300 The context. 232 * \param flags See r300_prepare_flags. 233 * \param index_buffer The index buffer to validate. The parameter may be NULL. 234 * \param buffer_offset The offset passed to emit_vertex_arrays. 235 * \param index_bias The index bias to emit. 236 * \param instance_id Index of instance to render 237 * \return TRUE if rendering should be skipped 238 */ 239static boolean r300_emit_states(struct r300_context *r300, 240 enum r300_prepare_flags flags, 241 struct pipe_resource *index_buffer, 242 int buffer_offset, 243 int index_bias, int instance_id) 244{ 245 boolean first_draw = flags & PREP_EMIT_STATES; 246 boolean emit_vertex_arrays = flags & PREP_EMIT_AOS; 247 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_AOS_SWTCL; 248 boolean indexed = flags & PREP_INDEXED; 249 boolean validate_vbos = flags & PREP_VALIDATE_VBOS; 250 251 /* Validate buffers and emit dirty state if needed. */ 252 if (first_draw) { 253 if (!r300_emit_buffer_validate(r300, validate_vbos, 254 index_buffer)) { 255 fprintf(stderr, "r300: CS space validation failed. " 256 "(not enough memory?) Skipping rendering.\n"); 257 return FALSE; 258 } 259 260 r300_emit_dirty_state(r300); 261 if (r300->screen->caps.is_r500) { 262 if (r300->screen->caps.has_tcl) 263 r500_emit_index_bias(r300, index_bias); 264 else 265 r500_emit_index_bias(r300, 0); 266 } 267 268 if (emit_vertex_arrays && 269 (r300->vertex_arrays_dirty || 270 r300->vertex_arrays_indexed != indexed || 271 r300->vertex_arrays_offset != buffer_offset || 272 r300->vertex_arrays_instance_id != instance_id)) { 273 r300_emit_vertex_arrays(r300, buffer_offset, indexed, instance_id); 274 275 r300->vertex_arrays_dirty = FALSE; 276 r300->vertex_arrays_indexed = indexed; 277 r300->vertex_arrays_offset = buffer_offset; 278 r300->vertex_arrays_instance_id = instance_id; 279 } 280 281 if (emit_vertex_arrays_swtcl) 282 r300_emit_vertex_arrays_swtcl(r300, indexed); 283 } 284 285 return TRUE; 286} 287 288/** 289 * Check if the requested number of dwords is available in the CS and 290 * if not, flush. Then validate buffers and emit dirty state. 291 * \param r300 The context. 292 * \param flags See r300_prepare_flags. 293 * \param index_buffer The index buffer to validate. The parameter may be NULL. 294 * \param cs_dwords The number of dwords to reserve in CS. 295 * \param buffer_offset The offset passed to emit_vertex_arrays. 296 * \param index_bias The index bias to emit. 297 * \param instance_id The instance to render. 298 * \return TRUE if rendering should be skipped 299 */ 300static boolean r300_prepare_for_rendering(struct r300_context *r300, 301 enum r300_prepare_flags flags, 302 struct pipe_resource *index_buffer, 303 unsigned cs_dwords, 304 int buffer_offset, 305 int index_bias, 306 int instance_id) 307{ 308 /* Make sure there is enough space in the command stream and emit states. */ 309 if (r300_reserve_cs_dwords(r300, flags, cs_dwords)) 310 flags |= PREP_EMIT_STATES; 311 312 return r300_emit_states(r300, flags, index_buffer, buffer_offset, 313 index_bias, instance_id); 314} 315 316static boolean immd_is_good_idea(struct r300_context *r300, 317 unsigned count) 318{ 319 struct pipe_vertex_element* velem; 320 struct pipe_resource *buf; 321 boolean checked[PIPE_MAX_ATTRIBS] = {0}; 322 unsigned vertex_element_count = r300->velems->count; 323 unsigned i, vbi; 324 325 if (DBG_ON(r300, DBG_NO_IMMD)) { 326 return FALSE; 327 } 328 329 if (r300->draw) { 330 return FALSE; 331 } 332 333 if (count * r300->velems->vertex_size_dwords > IMMD_DWORDS) { 334 return FALSE; 335 } 336 337 /* We shouldn't map buffers referenced by CS, busy buffers, 338 * and ones placed in VRAM. */ 339 for (i = 0; i < vertex_element_count; i++) { 340 velem = &r300->velems->velem[i]; 341 vbi = velem->vertex_buffer_index; 342 343 if (!checked[vbi]) { 344 buf = r300->vbuf_mgr->real_vertex_buffer[vbi]; 345 346 if ((r300_resource(buf)->domain != RADEON_DOMAIN_GTT)) { 347 return FALSE; 348 } 349 350 checked[vbi] = TRUE; 351 } 352 } 353 return TRUE; 354} 355 356/***************************************************************************** 357 * The HWTCL draw functions. * 358 ****************************************************************************/ 359 360static void r300_draw_arrays_immediate(struct r300_context *r300, 361 const struct pipe_draw_info *info) 362{ 363 struct pipe_vertex_element* velem; 364 struct pipe_vertex_buffer* vbuf; 365 unsigned vertex_element_count = r300->velems->count; 366 unsigned i, v, vbi; 367 368 /* Size of the vertex, in dwords. */ 369 unsigned vertex_size = r300->velems->vertex_size_dwords; 370 371 /* The number of dwords for this draw operation. */ 372 unsigned dwords = 4 + info->count * vertex_size; 373 374 /* Size of the vertex element, in dwords. */ 375 unsigned size[PIPE_MAX_ATTRIBS]; 376 377 /* Stride to the same attrib in the next vertex in the vertex buffer, 378 * in dwords. */ 379 unsigned stride[PIPE_MAX_ATTRIBS]; 380 381 /* Mapped vertex buffers. */ 382 uint32_t* map[PIPE_MAX_ATTRIBS] = {0}; 383 uint32_t* mapelem[PIPE_MAX_ATTRIBS]; 384 385 CS_LOCALS(r300); 386 387 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1)) 388 return; 389 390 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */ 391 for (i = 0; i < vertex_element_count; i++) { 392 velem = &r300->velems->velem[i]; 393 size[i] = r300->velems->format_size[i] / 4; 394 vbi = velem->vertex_buffer_index; 395 vbuf = &r300->vbuf_mgr->vertex_buffer[vbi]; 396 stride[i] = vbuf->stride / 4; 397 398 /* Map the buffer. */ 399 if (!map[vbi]) { 400 map[vbi] = (uint32_t*)r300->rws->buffer_map( 401 r300_resource(r300->vbuf_mgr->real_vertex_buffer[vbi])->buf, 402 r300->cs, PIPE_TRANSFER_READ | PIPE_TRANSFER_UNSYNCHRONIZED); 403 map[vbi] += (vbuf->buffer_offset / 4) + stride[i] * info->start; 404 } 405 mapelem[i] = map[vbi] + (velem->src_offset / 4); 406 } 407 408 r300_emit_draw_init(r300, info->mode, 0, info->count-1); 409 410 BEGIN_CS(dwords); 411 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size); 412 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, info->count * vertex_size); 413 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (info->count << 16) | 414 r300_translate_primitive(info->mode)); 415 416 /* Emit vertices. */ 417 for (v = 0; v < info->count; v++) { 418 for (i = 0; i < vertex_element_count; i++) { 419 OUT_CS_TABLE(&mapelem[i][stride[i] * v], size[i]); 420 } 421 } 422 END_CS; 423 424 /* Unmap buffers. */ 425 for (i = 0; i < vertex_element_count; i++) { 426 vbi = r300->velems->velem[i].vertex_buffer_index; 427 428 if (map[vbi]) { 429 r300->rws->buffer_unmap(r300_resource(r300->vbuf_mgr->real_vertex_buffer[vbi])->buf); 430 map[vbi] = NULL; 431 } 432 } 433} 434 435static void r300_emit_draw_arrays(struct r300_context *r300, 436 unsigned mode, 437 unsigned count) 438{ 439 boolean alt_num_verts = count > 65535; 440 CS_LOCALS(r300); 441 442 if (count >= (1 << 24)) { 443 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 444 "refusing to render.\n", count); 445 return; 446 } 447 448 r300_emit_draw_init(r300, mode, 0, count-1); 449 450 BEGIN_CS(2 + (alt_num_verts ? 2 : 0)); 451 if (alt_num_verts) { 452 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 453 } 454 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 455 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 456 r300_translate_primitive(mode) | 457 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 458 END_CS; 459} 460 461static void r300_emit_draw_elements(struct r300_context *r300, 462 struct pipe_resource* indexBuffer, 463 unsigned indexSize, 464 unsigned min_index, 465 unsigned max_index, 466 unsigned mode, 467 unsigned start, 468 unsigned count, 469 uint16_t *imm_indices3) 470{ 471 uint32_t count_dwords, offset_dwords; 472 boolean alt_num_verts = count > 65535; 473 CS_LOCALS(r300); 474 475 if (count >= (1 << 24) || max_index >= (1 << 24)) { 476 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 477 "refusing to render (max_index: %i).\n", count, max_index); 478 return; 479 } 480 481 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n", 482 count, min_index, max_index); 483 484 r300_emit_draw_init(r300, mode, min_index, max_index); 485 486 /* If start is odd, render the first triangle with indices embedded 487 * in the command stream. This will increase start by 3 and make it 488 * even. We can then proceed without a fallback. */ 489 if (indexSize == 2 && (start & 1) && 490 mode == PIPE_PRIM_TRIANGLES) { 491 BEGIN_CS(4); 492 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 2); 493 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (3 << 16) | 494 R300_VAP_VF_CNTL__PRIM_TRIANGLES); 495 OUT_CS(imm_indices3[1] << 16 | imm_indices3[0]); 496 OUT_CS(imm_indices3[2]); 497 END_CS; 498 499 start += 3; 500 count -= 3; 501 if (!count) 502 return; 503 } 504 505 offset_dwords = indexSize * start / sizeof(uint32_t); 506 507 BEGIN_CS(8 + (alt_num_verts ? 2 : 0)); 508 if (alt_num_verts) { 509 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 510 } 511 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); 512 if (indexSize == 4) { 513 count_dwords = count; 514 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 515 R300_VAP_VF_CNTL__INDEX_SIZE_32bit | 516 r300_translate_primitive(mode) | 517 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 518 } else { 519 count_dwords = (count + 1) / 2; 520 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 521 r300_translate_primitive(mode) | 522 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 523 } 524 525 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); 526 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) | 527 (0 << R300_INDX_BUFFER_SKIP_SHIFT)); 528 OUT_CS(offset_dwords << 2); 529 OUT_CS(count_dwords); 530 OUT_CS_RELOC(r300_resource(indexBuffer)); 531 END_CS; 532} 533 534static void r300_draw_elements_immediate(struct r300_context *r300, 535 const struct pipe_draw_info *info) 536{ 537 uint8_t *ptr1; 538 uint16_t *ptr2; 539 uint32_t *ptr4; 540 unsigned index_size = r300->index_buffer.index_size; 541 unsigned i, count_dwords = index_size == 4 ? info->count : 542 (info->count + 1) / 2; 543 CS_LOCALS(r300); 544 545 /* 19 dwords for r300_draw_elements_immediate. Give up if the function fails. */ 546 if (!r300_prepare_for_rendering(r300, 547 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_AOS | 548 PREP_INDEXED, NULL, 2+count_dwords, 0, info->index_bias, -1)) 549 return; 550 551 r300_emit_draw_init(r300, info->mode, info->min_index, info->max_index); 552 553 BEGIN_CS(2 + count_dwords); 554 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, count_dwords); 555 556 switch (index_size) { 557 case 1: 558 ptr1 = r300_resource(r300->index_buffer.buffer)->b.user_ptr; 559 ptr1 += info->start; 560 561 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) | 562 r300_translate_primitive(info->mode)); 563 564 if (info->index_bias && !r300->screen->caps.is_r500) { 565 for (i = 0; i < info->count-1; i += 2) 566 OUT_CS(((ptr1[i+1] + info->index_bias) << 16) | 567 (ptr1[i] + info->index_bias)); 568 569 if (info->count & 1) 570 OUT_CS(ptr1[i] + info->index_bias); 571 } else { 572 for (i = 0; i < info->count-1; i += 2) 573 OUT_CS(((ptr1[i+1]) << 16) | 574 (ptr1[i] )); 575 576 if (info->count & 1) 577 OUT_CS(ptr1[i]); 578 } 579 break; 580 581 case 2: 582 ptr2 = (uint16_t*)r300_resource(r300->index_buffer.buffer)->b.user_ptr; 583 ptr2 += info->start; 584 585 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) | 586 r300_translate_primitive(info->mode)); 587 588 if (info->index_bias && !r300->screen->caps.is_r500) { 589 for (i = 0; i < info->count-1; i += 2) 590 OUT_CS(((ptr2[i+1] + info->index_bias) << 16) | 591 (ptr2[i] + info->index_bias)); 592 593 if (info->count & 1) 594 OUT_CS(ptr2[i] + info->index_bias); 595 } else { 596 OUT_CS_TABLE(ptr2, count_dwords); 597 } 598 break; 599 600 case 4: 601 ptr4 = (uint32_t*)r300_resource(r300->index_buffer.buffer)->b.user_ptr; 602 ptr4 += info->start; 603 604 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) | 605 R300_VAP_VF_CNTL__INDEX_SIZE_32bit | 606 r300_translate_primitive(info->mode)); 607 608 if (info->index_bias && !r300->screen->caps.is_r500) { 609 for (i = 0; i < info->count; i++) 610 OUT_CS(ptr4[i] + info->index_bias); 611 } else { 612 OUT_CS_TABLE(ptr4, count_dwords); 613 } 614 break; 615 } 616 END_CS; 617} 618 619static void r300_draw_elements(struct r300_context *r300, 620 const struct pipe_draw_info *info, 621 int instance_id) 622{ 623 struct pipe_resource *indexBuffer = r300->index_buffer.buffer; 624 unsigned indexSize = r300->index_buffer.index_size; 625 struct pipe_resource* orgIndexBuffer = indexBuffer; 626 unsigned start = info->start; 627 unsigned count = info->count; 628 boolean alt_num_verts = r300->screen->caps.is_r500 && 629 count > 65536; 630 unsigned short_count; 631 int buffer_offset = 0, index_offset = 0; /* for index bias emulation */ 632 uint16_t indices3[3]; 633 634 if (info->index_bias && !r300->screen->caps.is_r500) { 635 r300_split_index_bias(r300, info->index_bias, &buffer_offset, &index_offset); 636 } 637 638 r300_translate_index_buffer(r300, &indexBuffer, &indexSize, index_offset, 639 &start, count); 640 641 /* Fallback for misaligned ushort indices. */ 642 if (indexSize == 2 && (start & 1) && 643 !r300_resource(indexBuffer)->b.user_ptr) { 644 /* If we got here, then orgIndexBuffer == indexBuffer. */ 645 uint16_t *ptr = r300->rws->buffer_map(r300_resource(orgIndexBuffer)->buf, 646 r300->cs, 647 PIPE_TRANSFER_READ | 648 PIPE_TRANSFER_UNSYNCHRONIZED); 649 650 if (info->mode == PIPE_PRIM_TRIANGLES) { 651 memcpy(indices3, ptr + start, 6); 652 } else { 653 /* Copy the mapped index buffer directly to the upload buffer. 654 * The start index will be aligned simply from the fact that 655 * every sub-buffer in the upload buffer is aligned. */ 656 r300_upload_index_buffer(r300, &indexBuffer, indexSize, &start, 657 count, (uint8_t*)ptr); 658 } 659 r300->rws->buffer_unmap(r300_resource(orgIndexBuffer)->buf); 660 } else { 661 if (r300_resource(indexBuffer)->b.user_ptr) 662 r300_upload_index_buffer(r300, &indexBuffer, indexSize, 663 &start, count, 664 r300_resource(indexBuffer)->b.user_ptr); 665 } 666 667 /* 19 dwords for emit_draw_elements. Give up if the function fails. */ 668 if (!r300_prepare_for_rendering(r300, 669 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_AOS | 670 PREP_INDEXED, indexBuffer, 19, buffer_offset, info->index_bias, 671 instance_id)) 672 goto done; 673 674 if (alt_num_verts || count <= 65535) { 675 r300_emit_draw_elements(r300, indexBuffer, indexSize, info->min_index, 676 info->max_index, info->mode, start, count, 677 indices3); 678 } else { 679 do { 680 if (indexSize == 2 && (start & 1)) 681 short_count = MIN2(count, 65535); 682 else 683 short_count = MIN2(count, 65534); 684 685 r300_emit_draw_elements(r300, indexBuffer, indexSize, 686 info->min_index, info->max_index, 687 info->mode, start, short_count, indices3); 688 689 start += short_count; 690 count -= short_count; 691 692 /* 15 dwords for emit_draw_elements */ 693 if (count) { 694 if (!r300_prepare_for_rendering(r300, 695 PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED, 696 indexBuffer, 19, buffer_offset, info->index_bias, 697 instance_id)) 698 goto done; 699 } 700 } while (count); 701 } 702 703done: 704 if (indexBuffer != orgIndexBuffer) { 705 pipe_resource_reference( &indexBuffer, NULL ); 706 } 707} 708 709static void r300_draw_arrays(struct r300_context *r300, 710 const struct pipe_draw_info *info, 711 int instance_id) 712{ 713 boolean alt_num_verts = r300->screen->caps.is_r500 && 714 info->count > 65536; 715 unsigned start = info->start; 716 unsigned count = info->count; 717 unsigned short_count; 718 719 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */ 720 if (!r300_prepare_for_rendering(r300, 721 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_AOS, 722 NULL, 9, start, 0, instance_id)) 723 return; 724 725 if (alt_num_verts || count <= 65535) { 726 r300_emit_draw_arrays(r300, info->mode, count); 727 } else { 728 do { 729 short_count = MIN2(count, 65535); 730 r300_emit_draw_arrays(r300, info->mode, short_count); 731 732 start += short_count; 733 count -= short_count; 734 735 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */ 736 if (count) { 737 if (!r300_prepare_for_rendering(r300, 738 PREP_VALIDATE_VBOS | PREP_EMIT_AOS, NULL, 9, 739 start, 0, instance_id)) 740 return; 741 } 742 } while (count); 743 } 744} 745 746static void r300_draw_arrays_instanced(struct r300_context *r300, 747 const struct pipe_draw_info *info) 748{ 749 int i; 750 751 for (i = 0; i < info->instance_count; i++) 752 r300_draw_arrays(r300, info, i); 753} 754 755static void r300_draw_elements_instanced(struct r300_context *r300, 756 const struct pipe_draw_info *info) 757{ 758 int i; 759 760 for (i = 0; i < info->instance_count; i++) 761 r300_draw_elements(r300, info, i); 762} 763 764static void r300_draw_vbo(struct pipe_context* pipe, 765 const struct pipe_draw_info *dinfo) 766{ 767 struct r300_context* r300 = r300_context(pipe); 768 struct pipe_draw_info info = *dinfo; 769 boolean buffers_updated, uploader_flushed; 770 771 info.indexed = info.indexed && r300->index_buffer.buffer; 772 773 if (r300->skip_rendering || 774 !u_trim_pipe_prim(info.mode, &info.count)) { 775 return; 776 } 777 778 r300_update_derived_state(r300); 779 780 /* Start the vbuf manager and update buffers if needed. */ 781 u_vbuf_mgr_draw_begin(r300->vbuf_mgr, &info, 782 &buffers_updated, &uploader_flushed); 783 if (buffers_updated) { 784 r300->vertex_arrays_dirty = TRUE; 785 } 786 787 /* Draw. */ 788 if (info.indexed) { 789 info.start += r300->index_buffer.offset; 790 info.max_index = MIN2(r300->vbuf_mgr->max_index, info.max_index); 791 792 if (info.instance_count <= 1) { 793 if (info.count <= 8 && 794 r300_resource(r300->index_buffer.buffer)->b.user_ptr) { 795 r300_draw_elements_immediate(r300, &info); 796 } else { 797 r300_draw_elements(r300, &info, -1); 798 } 799 } else { 800 r300_draw_elements_instanced(r300, &info); 801 } 802 } else { 803 if (info.instance_count <= 1) { 804 if (immd_is_good_idea(r300, info.count)) { 805 r300_draw_arrays_immediate(r300, &info); 806 } else { 807 r300_draw_arrays(r300, &info, -1); 808 } 809 } else { 810 r300_draw_arrays_instanced(r300, &info); 811 } 812 } 813 814 u_vbuf_mgr_draw_end(r300->vbuf_mgr); 815} 816 817/**************************************************************************** 818 * The rest of this file is for SW TCL rendering only. Please be polite and * 819 * keep these functions separated so that they are easier to locate. ~C. * 820 ***************************************************************************/ 821 822/* SW TCL elements, using Draw. */ 823static void r300_swtcl_draw_vbo(struct pipe_context* pipe, 824 const struct pipe_draw_info *info) 825{ 826 struct r300_context* r300 = r300_context(pipe); 827 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; 828 struct pipe_transfer *ib_transfer = NULL; 829 unsigned count = info->count; 830 int i; 831 void *indices = NULL; 832 boolean indexed = info->indexed && r300->index_buffer.buffer; 833 834 if (r300->skip_rendering) { 835 return; 836 } 837 838 if (!u_trim_pipe_prim(info->mode, &count)) { 839 return; 840 } 841 842 r300_update_derived_state(r300); 843 844 r300_reserve_cs_dwords(r300, 845 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL | 846 (indexed ? PREP_INDEXED : 0), 847 indexed ? 256 : 6); 848 849 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) { 850 if (r300->vbuf_mgr->vertex_buffer[i].buffer) { 851 void *buf = pipe_buffer_map(pipe, 852 r300->vbuf_mgr->vertex_buffer[i].buffer, 853 PIPE_TRANSFER_READ | 854 PIPE_TRANSFER_UNSYNCHRONIZED, 855 &vb_transfer[i]); 856 draw_set_mapped_vertex_buffer(r300->draw, i, buf); 857 } 858 } 859 860 if (indexed) { 861 indices = pipe_buffer_map(pipe, r300->index_buffer.buffer, 862 PIPE_TRANSFER_READ | 863 PIPE_TRANSFER_UNSYNCHRONIZED, &ib_transfer); 864 } 865 866 draw_set_mapped_index_buffer(r300->draw, indices); 867 868 r300->draw_vbo_locked = TRUE; 869 r300->draw_first_emitted = FALSE; 870 draw_vbo(r300->draw, info); 871 draw_flush(r300->draw); 872 r300->draw_vbo_locked = FALSE; 873 874 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) { 875 if (r300->vbuf_mgr->vertex_buffer[i].buffer) { 876 pipe_buffer_unmap(pipe, vb_transfer[i]); 877 draw_set_mapped_vertex_buffer(r300->draw, i, NULL); 878 } 879 } 880 881 if (indexed) { 882 pipe_buffer_unmap(pipe, ib_transfer); 883 draw_set_mapped_index_buffer(r300->draw, NULL); 884 } 885} 886 887/* Object for rendering using Draw. */ 888struct r300_render { 889 /* Parent class */ 890 struct vbuf_render base; 891 892 /* Pipe context */ 893 struct r300_context* r300; 894 895 /* Vertex information */ 896 size_t vertex_size; 897 unsigned prim; 898 unsigned hwprim; 899 900 /* VBO */ 901 size_t vbo_max_used; 902 void * vbo_ptr; 903 904 struct pipe_transfer *vbo_transfer; 905}; 906 907static INLINE struct r300_render* 908r300_render(struct vbuf_render* render) 909{ 910 return (struct r300_render*)render; 911} 912 913static const struct vertex_info* 914r300_render_get_vertex_info(struct vbuf_render* render) 915{ 916 struct r300_render* r300render = r300_render(render); 917 struct r300_context* r300 = r300render->r300; 918 919 return &r300->vertex_info; 920} 921 922static boolean r300_render_allocate_vertices(struct vbuf_render* render, 923 ushort vertex_size, 924 ushort count) 925{ 926 struct r300_render* r300render = r300_render(render); 927 struct r300_context* r300 = r300render->r300; 928 struct pipe_screen* screen = r300->context.screen; 929 size_t size = (size_t)vertex_size * (size_t)count; 930 931 DBG(r300, DBG_DRAW, "r300: render_allocate_vertices (size: %d)\n", size); 932 933 if (size + r300->draw_vbo_offset > r300->draw_vbo_size) 934 { 935 pipe_resource_reference(&r300->vbo, NULL); 936 r300->vbo = pipe_buffer_create(screen, 937 PIPE_BIND_VERTEX_BUFFER, 938 PIPE_USAGE_STREAM, 939 R300_MAX_DRAW_VBO_SIZE); 940 r300->draw_vbo_offset = 0; 941 r300->draw_vbo_size = R300_MAX_DRAW_VBO_SIZE; 942 } 943 944 r300render->vertex_size = vertex_size; 945 946 return (r300->vbo) ? TRUE : FALSE; 947} 948 949static void* r300_render_map_vertices(struct vbuf_render* render) 950{ 951 struct r300_render* r300render = r300_render(render); 952 struct r300_context* r300 = r300render->r300; 953 954 assert(!r300render->vbo_transfer); 955 956 DBG(r300, DBG_DRAW, "r300: render_map_vertices\n"); 957 958 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context, 959 r300->vbo, 960 PIPE_TRANSFER_WRITE | 961 PIPE_TRANSFER_UNSYNCHRONIZED, 962 &r300render->vbo_transfer); 963 964 assert(r300render->vbo_ptr); 965 966 return ((uint8_t*)r300render->vbo_ptr + r300->draw_vbo_offset); 967} 968 969static void r300_render_unmap_vertices(struct vbuf_render* render, 970 ushort min, 971 ushort max) 972{ 973 struct r300_render* r300render = r300_render(render); 974 struct pipe_context* context = &r300render->r300->context; 975 struct r300_context* r300 = r300render->r300; 976 977 assert(r300render->vbo_transfer); 978 979 DBG(r300, DBG_DRAW, "r300: render_unmap_vertices\n"); 980 981 r300render->vbo_max_used = MAX2(r300render->vbo_max_used, 982 r300render->vertex_size * (max + 1)); 983 pipe_buffer_unmap(context, r300render->vbo_transfer); 984 985 r300render->vbo_transfer = NULL; 986} 987 988static void r300_render_release_vertices(struct vbuf_render* render) 989{ 990 struct r300_render* r300render = r300_render(render); 991 struct r300_context* r300 = r300render->r300; 992 993 DBG(r300, DBG_DRAW, "r300: render_release_vertices\n"); 994 995 r300->draw_vbo_offset += r300render->vbo_max_used; 996 r300render->vbo_max_used = 0; 997} 998 999static boolean r300_render_set_primitive(struct vbuf_render* render, 1000 unsigned prim) 1001{ 1002 struct r300_render* r300render = r300_render(render); 1003 1004 r300render->prim = prim; 1005 r300render->hwprim = r300_translate_primitive(prim); 1006 1007 return TRUE; 1008} 1009 1010static void r300_render_draw_arrays(struct vbuf_render* render, 1011 unsigned start, 1012 unsigned count) 1013{ 1014 struct r300_render* r300render = r300_render(render); 1015 struct r300_context* r300 = r300render->r300; 1016 uint8_t* ptr; 1017 unsigned i; 1018 unsigned dwords = 6; 1019 1020 CS_LOCALS(r300); 1021 (void) i; (void) ptr; 1022 1023 DBG(r300, DBG_DRAW, "r300: render_draw_arrays (count: %d)\n", count); 1024 1025 if (r300->draw_first_emitted) { 1026 if (!r300_prepare_for_rendering(r300, 1027 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL, 1028 NULL, dwords, 0, 0, -1)) 1029 return; 1030 } else { 1031 if (!r300_emit_states(r300, 1032 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL, 1033 NULL, 0, 0, -1)) 1034 return; 1035 } 1036 1037 BEGIN_CS(dwords); 1038 OUT_CS_REG(R300_GA_COLOR_CONTROL, 1039 r300_provoking_vertex_fixes(r300, r300render->prim)); 1040 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1); 1041 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 1042 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 1043 r300render->hwprim); 1044 END_CS; 1045 1046 r300->draw_first_emitted = TRUE; 1047} 1048 1049static void r300_render_draw_elements(struct vbuf_render* render, 1050 const ushort* indices, 1051 uint count) 1052{ 1053 struct r300_render* r300render = r300_render(render); 1054 struct r300_context* r300 = r300render->r300; 1055 int i; 1056 unsigned end_cs_dwords; 1057 unsigned max_index = (r300->draw_vbo_size - r300->draw_vbo_offset) / 1058 (r300render->r300->vertex_info.size * 4) - 1; 1059 unsigned short_count; 1060 unsigned free_dwords; 1061 1062 CS_LOCALS(r300); 1063 DBG(r300, DBG_DRAW, "r300: render_draw_elements (count: %d)\n", count); 1064 1065 if (r300->draw_first_emitted) { 1066 if (!r300_prepare_for_rendering(r300, 1067 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL | PREP_INDEXED, 1068 NULL, 256, 0, 0, -1)) 1069 return; 1070 } else { 1071 if (!r300_emit_states(r300, 1072 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL | PREP_INDEXED, 1073 NULL, 0, 0, -1)) 1074 return; 1075 } 1076 1077 /* Below we manage the CS space manually because there may be more 1078 * indices than it can fit in CS. */ 1079 1080 end_cs_dwords = r300_get_num_cs_end_dwords(r300); 1081 1082 while (count) { 1083 free_dwords = RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw; 1084 1085 short_count = MIN2(count, (free_dwords - end_cs_dwords - 6) * 2); 1086 1087 BEGIN_CS(6 + (short_count+1)/2); 1088 OUT_CS_REG(R300_GA_COLOR_CONTROL, 1089 r300_provoking_vertex_fixes(r300, r300render->prim)); 1090 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index); 1091 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (short_count+1)/2); 1092 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (short_count << 16) | 1093 r300render->hwprim); 1094 for (i = 0; i < short_count-1; i += 2) { 1095 OUT_CS(indices[i+1] << 16 | indices[i]); 1096 } 1097 if (short_count % 2) { 1098 OUT_CS(indices[short_count-1]); 1099 } 1100 END_CS; 1101 1102 /* OK now subtract the emitted indices and see if we need to emit 1103 * another draw packet. */ 1104 indices += short_count; 1105 count -= short_count; 1106 1107 if (count) { 1108 if (!r300_prepare_for_rendering(r300, 1109 PREP_EMIT_AOS_SWTCL | PREP_INDEXED, 1110 NULL, 256, 0, 0, -1)) 1111 return; 1112 1113 end_cs_dwords = r300_get_num_cs_end_dwords(r300); 1114 } 1115 } 1116 1117 r300->draw_first_emitted = TRUE; 1118} 1119 1120static void r300_render_destroy(struct vbuf_render* render) 1121{ 1122 FREE(render); 1123} 1124 1125static struct vbuf_render* r300_render_create(struct r300_context* r300) 1126{ 1127 struct r300_render* r300render = CALLOC_STRUCT(r300_render); 1128 1129 r300render->r300 = r300; 1130 1131 r300render->base.max_vertex_buffer_bytes = 1024 * 1024; 1132 r300render->base.max_indices = 16 * 1024; 1133 1134 r300render->base.get_vertex_info = r300_render_get_vertex_info; 1135 r300render->base.allocate_vertices = r300_render_allocate_vertices; 1136 r300render->base.map_vertices = r300_render_map_vertices; 1137 r300render->base.unmap_vertices = r300_render_unmap_vertices; 1138 r300render->base.set_primitive = r300_render_set_primitive; 1139 r300render->base.draw_elements = r300_render_draw_elements; 1140 r300render->base.draw_arrays = r300_render_draw_arrays; 1141 r300render->base.release_vertices = r300_render_release_vertices; 1142 r300render->base.destroy = r300_render_destroy; 1143 1144 return &r300render->base; 1145} 1146 1147struct draw_stage* r300_draw_stage(struct r300_context* r300) 1148{ 1149 struct vbuf_render* render; 1150 struct draw_stage* stage; 1151 1152 render = r300_render_create(r300); 1153 1154 if (!render) { 1155 return NULL; 1156 } 1157 1158 stage = draw_vbuf_stage(r300->draw, render); 1159 1160 if (!stage) { 1161 render->destroy(render); 1162 return NULL; 1163 } 1164 1165 draw_set_render(r300->draw, render); 1166 1167 return stage; 1168} 1169 1170void r300_draw_flush_vbuf(struct r300_context *r300) 1171{ 1172 pipe_resource_reference(&r300->vbo, NULL); 1173 r300->draw_vbo_size = 0; 1174} 1175 1176/**************************************************************************** 1177 * End of SW TCL functions * 1178 ***************************************************************************/ 1179 1180/* This functions is used to draw a rectangle for the blitter module. 1181 * 1182 * If we rendered a quad, the pixels on the main diagonal 1183 * would be computed and stored twice, which makes the clear/copy codepaths 1184 * somewhat inefficient. Instead we use a rectangular point sprite. */ 1185static void r300_blitter_draw_rectangle(struct blitter_context *blitter, 1186 unsigned x1, unsigned y1, 1187 unsigned x2, unsigned y2, 1188 float depth, 1189 enum blitter_attrib_type type, 1190 const float attrib[4]) 1191{ 1192 struct r300_context *r300 = r300_context(util_blitter_get_pipe(blitter)); 1193 unsigned last_sprite_coord_enable = r300->sprite_coord_enable; 1194 unsigned width = x2 - x1; 1195 unsigned height = y2 - y1; 1196 unsigned vertex_size = 1197 type == UTIL_BLITTER_ATTRIB_COLOR || !r300->draw ? 8 : 4; 1198 unsigned dwords = 13 + vertex_size + 1199 (type == UTIL_BLITTER_ATTRIB_TEXCOORD ? 7 : 0); 1200 const float zeros[4] = {0, 0, 0, 0}; 1201 CS_LOCALS(r300); 1202 1203 r300->context.set_vertex_buffers(&r300->context, 0, NULL); 1204 1205 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) 1206 r300->sprite_coord_enable = 1; 1207 1208 r300_update_derived_state(r300); 1209 1210 /* Mark some states we don't care about as non-dirty. */ 1211 r300->clip_state.dirty = FALSE; 1212 r300->viewport_state.dirty = FALSE; 1213 1214 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1)) 1215 goto done; 1216 1217 DBG(r300, DBG_DRAW, "r300: draw_rectangle\n"); 1218 1219 BEGIN_CS(dwords); 1220 /* Set up GA. */ 1221 OUT_CS_REG(R300_GA_POINT_SIZE, (height * 6) | ((width * 6) << 16)); 1222 1223 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) { 1224 /* Set up the GA to generate texcoords. */ 1225 OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | 1226 (R300_GB_TEX_STR << R300_GB_TEX0_SOURCE_SHIFT)); 1227 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4); 1228 OUT_CS_32F(attrib[0]); 1229 OUT_CS_32F(attrib[3]); 1230 OUT_CS_32F(attrib[2]); 1231 OUT_CS_32F(attrib[1]); 1232 } 1233 1234 /* Set up VAP controls. */ 1235 OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE); 1236 OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VTX_XY_FMT | R300_VTX_Z_FMT); 1237 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size); 1238 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 1239 OUT_CS(1); 1240 OUT_CS(0); 1241 1242 /* Draw. */ 1243 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, vertex_size); 1244 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (1 << 16) | 1245 R300_VAP_VF_CNTL__PRIM_POINTS); 1246 1247 OUT_CS_32F(x1 + width * 0.5f); 1248 OUT_CS_32F(y1 + height * 0.5f); 1249 OUT_CS_32F(depth); 1250 OUT_CS_32F(1); 1251 1252 if (vertex_size == 8) { 1253 if (!attrib) 1254 attrib = zeros; 1255 OUT_CS_TABLE(attrib, 4); 1256 } 1257 END_CS; 1258 1259done: 1260 /* Restore the state. */ 1261 r300_mark_atom_dirty(r300, &r300->clip_state); 1262 r300_mark_atom_dirty(r300, &r300->rs_state); 1263 r300_mark_atom_dirty(r300, &r300->viewport_state); 1264 1265 r300->sprite_coord_enable = last_sprite_coord_enable; 1266} 1267 1268static void r300_resource_resolve(struct pipe_context* pipe, 1269 struct pipe_resource* dest, 1270 unsigned dst_layer, 1271 struct pipe_resource* src, 1272 unsigned src_layer) 1273{ 1274 struct r300_context* r300 = r300_context(pipe); 1275 struct pipe_surface* srcsurf, surf_tmpl; 1276 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state; 1277 float color[] = {0, 0, 0, 0}; 1278 1279 memset(&surf_tmpl, 0, sizeof(surf_tmpl)); 1280 surf_tmpl.format = src->format; 1281 surf_tmpl.usage = 0; /* not really a surface hence no bind flags */ 1282 surf_tmpl.u.tex.level = 0; /* msaa resources cannot have mipmaps */ 1283 surf_tmpl.u.tex.first_layer = src_layer; 1284 surf_tmpl.u.tex.last_layer = src_layer; 1285 srcsurf = pipe->create_surface(pipe, src, &surf_tmpl); 1286 surf_tmpl.format = dest->format; 1287 surf_tmpl.u.tex.first_layer = dst_layer; 1288 surf_tmpl.u.tex.last_layer = dst_layer; 1289 1290 DBG(r300, DBG_DRAW, "r300: Resolving resource...\n"); 1291 1292 /* Enable AA resolve. */ 1293 aa->dest = r300_surface(pipe->create_surface(pipe, dest, &surf_tmpl)); 1294 1295 aa->aaresolve_ctl = 1296 R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE | 1297 R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE; 1298 r300->aa_state.size = 10; 1299 r300_mark_atom_dirty(r300, &r300->aa_state); 1300 1301 /* Resolve the surface. */ 1302 r300->context.clear_render_target(pipe, 1303 srcsurf, color, 0, 0, src->width0, src->height0); 1304 1305 /* Disable AA resolve. */ 1306 aa->aaresolve_ctl = 0; 1307 r300->aa_state.size = 4; 1308 r300_mark_atom_dirty(r300, &r300->aa_state); 1309 1310 pipe_surface_reference((struct pipe_surface**)&srcsurf, NULL); 1311 pipe_surface_reference((struct pipe_surface**)&aa->dest, NULL); 1312} 1313 1314void r300_init_render_functions(struct r300_context *r300) 1315{ 1316 /* Set draw functions based on presence of HW TCL. */ 1317 if (r300->screen->caps.has_tcl) { 1318 r300->context.draw_vbo = r300_draw_vbo; 1319 } else { 1320 r300->context.draw_vbo = r300_swtcl_draw_vbo; 1321 } 1322 1323 r300->context.resource_resolve = r300_resource_resolve; 1324 r300->blitter->draw_rectangle = r300_blitter_draw_rectangle; 1325 1326 /* Plug in the two-sided stencil reference value fallback if needed. */ 1327 if (!r300->screen->caps.is_r500) 1328 r300_plug_in_stencil_ref_fallback(r300); 1329} 1330