| a137f539801a05d395cfef1dd7a61b6fd8c36330 |
09-Jan-2015 |
Dmitriy Ivanov <dimitry@google.com> |
Add ARM_IRELATIVE relocation
Bug: 17399706
Change-Id: I1dea46c3a3c4572558e718283489c323794176c7
achine/elf_machdep.h
|
| 56e017306eb55c5deea795f89d2fb657757b4164 |
09-Dec-2014 |
Elliott Hughes <enh@google.com> |
Simplify our endian.h implementation.
We can rely on the compiler's builtins. Tested on arm, arm64, mips, x86,
and x86-64.
Change-Id: I0f774ed7e85b3c791a3178d8ef17c6500e6a9ace
achine/endian.h
|
| b393299b852415f2e7dd4e5bbd12d4f2aff64e2d |
06-Dec-2014 |
Elliott Hughes <enh@google.com> |
Clean up arm setjmp family.
Bug: 16918359
Change-Id: I9b986bdbdbaefe9d9896a820ee8cfe860adfe5c5
achine/setjmp.h
|
| 1309dcc842e3057336d70175e658dea51df3adc4 |
04-Dec-2014 |
Elliott Hughes <enh@google.com> |
Code using neon uses ARCH_ARM_HAVE_NEON.
Bug: 18556103
Change-Id: Ia8674dda223f81d616d15ee47b402ab4a3f98079
achine/cpu-features.h
|
| cb4c615bb9583d78efc6d00115ed5b8f1113ce2d |
04-Dec-2014 |
Elliott Hughes <enh@google.com> |
Remove __ARM_HAVE_VFP.
Bug: 18556103
Change-Id: I6d4cc6a1b359ad2df1ce6687fd26f392059f6efd
achine/cpu-features.h
|
| a5602c566edac7b88b95cee546f729feb6837ecf |
03-Dec-2014 |
Elliott Hughes <enh@google.com> |
Remove __ARM_HAVE_HALFWORD_MULTIPLY.
Bug: 18556103
Change-Id: I17e498539f77ddf7d1fb980ee93155d3c3ccd85e
achine/cpu-features.h
|
| 6651aa6bc17785fbc866c668f0fdca6484311f01 |
03-Dec-2014 |
Elliott Hughes <enh@google.com> |
Remove __ARM_HAVE_LDREXD.
No one uses this.
Bug: 18556103
Change-Id: Icecc3a7b5cb0a36960f27d030d8f4f8ee471f86c
achine/cpu-features.h
|
| b514026eb22d408da0d7090bf57b342d4ceb4097 |
03-Dec-2014 |
Elliott Hughes <enh@google.com> |
Kill <machine/exec.h>.
Bug: 18546535
Change-Id: I479e003deab21e31eb5caa5393067ed1dc558387
achine/exec.h
|
| ee369fb319cfb8f46ec6f2c7fbc102b60147da1b |
22-Nov-2014 |
Elliott Hughes <enh@google.com> |
Bring our <machine/endian.h> files back in sync.
They'd drifted slightly which led to a compilation error in toybox,
which was assuming pid_t was defined. arm and arm64 were picking it
up via <endian.h> but x86 wasn't.
Change-Id: I58401e6c0066959dfc3b305b020876aaf7074bbf
achine/endian.h
|
| 0e7f8a9e52bac84c69aa2260d2a6356584ff3674 |
20-Aug-2014 |
Elliott Hughes <enh@google.com> |
Simplify _ALIGN_TEXT.
Bug: 16872067
Change-Id: I2b622f252c21ce1b344c040f828ab3f4bf9b6c0a
achine/asm.h
|
| 651a0683ca7ba911beb776975ec893de326d62d2 |
07-Aug-2014 |
Elliott Hughes <enh@google.com> |
Remove misleading arm/arm64 PIC_SYM.
Bug: 16823325
Change-Id: Ic8ff3a628bb4cd71361e3a1c2cfde4b3d39c50b1
achine/asm.h
|
| cb65cc3fb4a8d7dfbbcbdfdb9140ab59baada28e |
17-Apr-2014 |
Elliott Hughes <enh@google.com> |
Clean up <machine/ieee.h>.
The upstream intention was for this to be architecture-dependent, but it's a
lot clearer if we just have one copy.
Change-Id: I4e8310496145f9f411cd2e847c8cd023b1d758e9
achine/ieee.h
|
| 4bd97cee28dd815fff54fc97560be60d566c1fa5 |
11-Apr-2014 |
Elliott Hughes <enh@google.com> |
Switch to gdtoa.
This gives us a real strtold for LP64 and fixes various LP64
bugs.
Bug: 13563801
Change-Id: I277858d718ee746e136b6b6308a495ba50dfa488
achine/ieee.h
|
| 02c78a386739a8a2b3007efeb00a9ca04132100a |
12-Apr-2014 |
Elliott Hughes <enh@google.com> |
Reimplement isinf/isnan/fpclassify.
Also move isinf and isnan into libc like everyone else.
Also move fpclassify to libc like the BSDs (but unlike glibc). We need
this to be able to upgrade our float/double/long double parsing to gdtoa.
Also add some missing aliases. We now have all of:
isnan, __isnan, isnanf, __isnanf, isnanl, __isnanl,
isinf, __isinf, isinff, __isinff, isinfl, __isinfl,
__fpclassify, __fpclassifyd, __fpclassifyf, __fpclassifyl.
Bug: 13469877
Change-Id: I407ffbac06c765a6c5fffda8106c37d7db04f27d
achine/ieee.h
|
| 1b0dc40980c259aa0d9a416cd1ccf497e6efe138 |
02-Apr-2014 |
Elliott Hughes <enh@google.com> |
Remove <machine/limits.h>.
Change-Id: I7f9e9538517f726d4f08bf1f4b8d57c54d3f1676
achine/limits.h
|
| ac3fc00ca2c157387164c7daaf9e10799c5ac8dc |
11-Mar-2014 |
Russell Webb <russell.webb@intel.com> |
Remove SIZE_MAX definition in limits.h
the POSIX standard is that SIZE_MAX is defined
in stdint.h, not limits.h.
Change-Id: Iafd8ec71d1840541feaca4f53b2926b398293fac
Signed-off-by: Webb, Russell <russell.webb@intel.com>
Signed-off-by: Fengwei Yin <fengwei.yin@intel.com>
Reviewed-by: Ross, Andrew J <andrew.j.ross@intel.com>
Reviewed-by: Boie, Andrew P <andrew.p.boie@intel.com>
Reviewed-by: Gumbel, Matthew K <matthew.k.gumbel@intel.com>
Tested-by: Gumbel, Matthew K <matthew.k.gumbel@intel.com>
achine/limits.h
|
| 851e68a2402fa414544e66650e09dfdaac813e51 |
20-Feb-2014 |
Elliott Hughes <enh@google.com> |
Unify our assembler macros.
Our <machine/asm.h> files were modified from upstream, to the extent
that no architecture was actually using the upstream ENTRY or END macros,
assuming that architecture even had such a macro upstream. This patch moves
everyone to the same macros, with just a few tweaks remaining in the
<machine/asm.h> files, which no one should now use directly.
I've removed most of the unused cruft from the <machine/asm.h> files, though
there's still rather a lot in the mips/mips64 ones.
Bug: 12229603
Change-Id: I2fff287dc571ac1087abe9070362fb9420d85d6d
achine/asm.h
|
| 9afe2884c7fe11f862982fd550a2ead688f2044d |
05-Feb-2014 |
Elliott Hughes <enh@google.com> |
Kill <machine/_types.h>.
Most of <machine/_types.h> was either unused, wrong, or identical across
all 32-/64-bit architectures.
I'm not a huge fan of <sys/_types.h> either, but moving the bits we need
up into there is a step forward.
Bug: 12213562
Change-Id: Id13551c78966e324beee2dd90c5575e37d2a71e6
achine/_types.h
|
| 2b333ea31ec5b5b4627f14b22253b017b346638a |
18-Dec-2013 |
Elliott Hughes <enh@google.com> |
Remove <machine/kernel.h>.
Bug: 12175484
Change-Id: I127f7f91f36bd879109d653e0c56ec56e2529d4d
achine/kernel.h
|
| c13fb75ceabb47f8292be206db80b93889fccf66 |
18-Dec-2013 |
Elliott Hughes <enh@google.com> |
Move bionic over to GCC's 'warning' attribute.
This is a better solution than the old __warn_references because it's
a compile-time rather than link-time warning, it doesn't rely on something
that doesn't appear to be supported by gold (which is why you only used
to see these warnings on mips builds), and the errors refer to the exact
call site(s) rather than just telling you which object file contains a
reference to the bad function.
This is primarily so we can build bionic for aarch64; building libc.so
caused these warnings to fire (because link time is the wrong time) and
warnings are errors.
Change-Id: I5df9281b2a9d98b164a9b11807ea9472c6faa9e3
achine/cdefs.h
|
| c54ca40aef48009e7b0e5b2b3069aad62ffd3453 |
13-Dec-2013 |
Elliott Hughes <enh@google.com> |
Clean up some ARMv4/ARMv5 cruft.
Change-Id: I29e836fea4b53901e29f96c6888869c35f6726be
achine/cpu-features.h
achine/endian.h
|
| 507cfe2e10a6c4ad61b9638820ba10bfe881a18c |
19-Nov-2013 |
Christopher Ferris <cferris@google.com> |
Add .cfi_startproc/.cfi_endproc to ENTRY/END.
Bug: 10414953
Change-Id: I711718098b9f3cc0ba8277778df64557e9c7b2a0
achine/asm.h
|
| 72645164b6840806d1681f48565bb3b54efc4628 |
05-Oct-2013 |
Elliott Hughes <enh@google.com> |
Add arch-x86_64/include/machine.
This is basically the other half of I5de76f6c46ac87779f207d568a86bb453e2414de
from Pavel Chupin <pavel.v.chupin@intel.com>, but taking the exact upstream
_types.h instead of the modified version. (I was confused when I suggested
otherwise.)
I've also cleaned up the internal_types.h situation; we weren't gaining
anything from these empty files, and there is no upstream internal_types.h
for x86_64.
Change-Id: I802a9a6a8df1c979e820659212c75a47c2ef392e
achine/internal_types.h
|
| a0ee07829a9ba7e99ef68e8c12551301cc797f0f |
31-Jan-2013 |
Elliott Hughes <enh@google.com> |
Upgrade libm.
This brings us up to date with FreeBSD HEAD, fixes various bugs, unifies
the set of functions we support on ARM, MIPS, and x86, fixes "long double",
adds ISO C99 support, and adds basic unit tests.
It turns out that our "long double" functions have always been broken
for non-normal numbers. This patch fixes that by not using the upstream
implementations and just forwarding to the regular "double" implementation
instead (since "long double" on Android is just "double" anyway, which is
what BSD doesn't support).
All the tests pass on ARM, MIPS, and x86, plus glibc on x86-64.
Bug: 3169850
Bug: 8012787
Bug: https://code.google.com/p/android/issues/detail?id=6697
Change-Id: If0c343030959c24bfc50d4d21c9530052c581837
achine/_types.h
|
| a6a3ac59243d8c95c94c3069e9332051f785c05f |
30-Jan-2013 |
Elliott Hughes <enh@google.com> |
Use the NetBSD <sys/exec_elf.h>.
Replace a kernel header file dependency with files from NetBSD.
They're more complete, and ELF is ELF, whether you're on Linux or a BSD.
Bug: 7973611
Change-Id: I83ee719e7efdf432ec2ddbe8be271d05b2f558d7
achine/elf_machdep.h
|
| 4fa35d8ae80c175425e9525831d7b6a71a3ada60 |
12-Dec-2012 |
Elliott Hughes <enh@google.com> |
Fix <endian.h> and <sys/endian.h>.
Previously we'd been relying on getting the machine-specific <endian.h>
instead of the top-level <endian.h>, and <sys/endian.h> was basically broken.
Now, with this patch and the previous patch we should have <endian.h>
and <sys/endian.h> behaving the same. This is basically how NetBSD's endian.h
works, and was probably how ours was originally intended to work.
Bug: http://code.google.com/p/android/issues/detail?id=39824
Change-Id: I71de5a507e633de166013a658b5764df9e1aa09c
ndian.h
achine/endian.h
|
| 3975cec694a0c9b42e3f7e671fcd678da92836c3 |
30-Nov-2012 |
Elliott Hughes <enh@google.com> |
Remove (near-)duplicate definitions of size_t and ssize_t.
The near duplicates upset fussier compilers that insist that
typedefs be exactly the same, but the fix isn't to make all
copies identical...
Change-Id: Icfdace41726f36ec33c9ae919dbb5a54d3529cc9
achine/_types.h
|
| b15c58bb0fe55f076751acd7a5d00ded0ec33963 |
27-Nov-2012 |
Elliott Hughes <enh@google.com> |
Clean up _BYTE_ORDER definitions for better x86 portability.
We'd manually hacked _BYTE_ORDER into the arm and mips "_types.h" headers,
but not into the x86 one. Judging by upstream, _BYTE_ORDER should be in
the "endian.h" headers instead, so let's uniformly do that.
I've also ironed out some of the other differences between the different
architectures' header files too.
Bug: http://code.google.com/p/android/issues/detail?id=39824
Change-Id: I19d3af7ffd74e1c02b1b6886aec0f0d11f44ab8d
ndian.h
achine/_types.h
|
| c1b44ecc5385e68e81667068e03b32c2084a85b1 |
17-Oct-2012 |
David 'Digit' Turner <digit@android.com> |
Revert "libc: Provide ucontext_t/mcontext_t/<sys/ucontext.h>"
This creates build issues in the internal Android tree.
Will investigate later.
Original patch: https://android-review.googlesource.com/#/c/38875/
Change-Id: I12c5995ebf172890051af42a5d3b31014c9c5117
achine/signal.h
achine/ucontext.h
|
| c124baaf29a948fd8b93e7f1fefc20b659271026 |
12-Jul-2012 |
David 'Digit' Turner <digit@android.com> |
libc: Provide ucontext_t/mcontext_t/<sys/ucontext.h>
This patch updates the C library headers to provide ucontext_t
definitions for three architectures.
+ Fix <signal.h> to always define 'struct sigcontext'.
The new declarations are announced with new macros defined in
<sys/cdefs.h> in order to make it easier to adapt client code
that already defines its own, incompatible, versions of the
structures seen here.
http://code.google.com/p/android/issues/detail?id=34784
Change-Id: Ie78c48690a4ce61c50593f6c39639be7fead3596
achine/signal.h
achine/ucontext.h
|
| 5fbf2e09921723cfdea75e83c1fac2080f0ad564 |
23-Jan-2012 |
David 'Digit' Turner <digit@android.com> |
libc: Define new symbol visibility macros
This patch defines a few new macros that can be used to control the
visibility of symbols exported by the C library:
- ENTRY_PRIVATE() can be used in assembly sources to indicate
that an assembler function should have "hidden" visibility, i.e.
will never be exported by the C library's shared library.
This is the equivalent of using __LIBC_HIDDEN__ for a C function,
but ENTRY_PRIVATE() works like ENTRY(), and must be used with
END() to tag the end of the function.
- __LIBC_ABI_PUBLIC__ can be used to tag a C functions as being
part of the C library's public ABI. This is important for a
few functions that must be exposed by the NDK to maintain
binary compatibility.
Once a symbol has been tagged with this macro, it shall
*never* be removed from the library, even if it becomes
directly unused due to implementation changes
(e.g. __is_threaded).
- __LIBC_ABI_PRIVATE__ can be used for C functions that should
always be exported by the C library because they are used by
other libraries in the platform, but should not be exposed
by the NDK. It is possible to remove such symbols from the
implementation if all callers are also modified.
+ Add missing END() assembly macro for x86
Change-Id: Ia96236ea0dbec41d57bea634b39d246b30e5e234
achine/asm.h
|
| 420878c6908cf9c2862888477ec3f424a06cf172 |
16-Feb-2011 |
Kenny Root <kroot@google.com> |
Add function marks and size indications
Add a macro to annotate function end and start using both ENTRY and END
for each function. This allows valgrind (and presumably other debugging
tools) to use the debug symbols to trace the functions.
Change-Id: I5f09cef8e22fb356eb6f5cee952b031e567599b6
achine/asm.h
|
| d29b8a51a5f95a3f38e5fb812231e12e5a66a865 |
20-Oct-2010 |
Jean-Baptiste Queru <jbq@google.com> |
am 5109146f: Merge "Reconcile assembly-only macros in <machine/cpu-features.h>"
Merge commit '5109146f954d8cca39d34689bff2762e15bc6933' into gingerbread-plus-aosp
* commit '5109146f954d8cca39d34689bff2762e15bc6933':
Reconcile assembly-only macros in <machine/cpu-features.h>
|
| 94e5c5ef3754fee833c527f12ddb18e639fe7cf2 |
01-Oct-2010 |
Jim Huang <jserv@0xlab.org> |
Reconcile assembly-only macros in <machine/cpu-features.h>
The change explicitly isolates the assembly-only macros in header
<machine/cpu-features.h> in order to prevent mis-inclusion in C/C++
source files.
Change-Id: I0258e87c5ac3fd24944fb227290ac3b9cac4bfba
achine/cpu-features.h
|
| 9aac38249b579282ae8eaa630de3deaf97c4edff |
28-Sep-2010 |
David 'Digit' Turner <digit@google.com> |
am bd8d987b: libc: remove C++ comments from public headers.
Merge commit 'bd8d987b3c3aa6d9d00cede2cb091f00bdb42204' into gingerbread-plus-aosp
* commit 'bd8d987b3c3aa6d9d00cede2cb091f00bdb42204':
libc: remove C++ comments from public headers.
|
| 8120a8df848e6dec31ef5f00bc0b41ed95ce1310 |
27-Sep-2010 |
Elliott Hughes <enh@google.com> |
am 3cf53d1a: Fixes for the ARM-specific bswap_16, bswap_32, and bswap_64.
Merge commit '3cf53d1a7814e1520df09d24b009c16f4f27db0d' into gingerbread-plus-aosp
* commit '3cf53d1a7814e1520df09d24b009c16f4f27db0d':
Fixes for the ARM-specific bswap_16, bswap_32, and bswap_64.
|
| bd8d987b3c3aa6d9d00cede2cb091f00bdb42204 |
26-Sep-2010 |
David 'Digit' Turner <digit@google.com> |
libc: remove C++ comments from public headers.
Change-Id: I4af84f912062cd2ff34711c25122fb323f20c032
achine/_types.h
|
| 3cf53d1a7814e1520df09d24b009c16f4f27db0d |
25-Sep-2010 |
Elliott Hughes <enh@google.com> |
Fixes for the ARM-specific bswap_16, bswap_32, and bswap_64.
1. Make the feature test work by excluding known-deficient processors, so
we don't have to maintain a complete list of all the processors that support
REV and REV16.
2. Don't abuse 'register' to get an effect similar to GCC's +l constraint,
but which was unnecessarily restrictive.
3. Fix __swap64md so _x isn't clobbered, breaking 64-bit swaps.
4. Make <byteswap.h> (which declars bswap_16 and friends) use <endian.h>
rather than <sys/endian.h>, so we get the machine-dependent implementations.
Change-Id: I6a38fad7a9fbe394aff141489617eb3883e1e944
ndian.h
|
| ef3644d110bcb44010672c0ad0bc7c96fd130c8f |
11-Sep-2010 |
Jean-Baptiste Queru <jbq@google.com> |
am 312be567: Merge "Use ARMv6 instruction for handling byte order"
Merge commit '312be567a03aaf851707a268807ee666b12f8c74' into gingerbread-plus-aosp
* commit '312be567a03aaf851707a268807ee666b12f8c74':
Use ARMv6 instruction for handling byte order
|
| aa35095517b78b3d2e8ee282cab93ef058479fcf |
31-Aug-2010 |
Jim Huang <jserv@0xlab.org> |
Use ARMv6 instruction for handling byte order
ARMv6 ISA has several instructions to handle data in different byte order.
For endian conversion (byte swapping) of single data words, it might be a
good idea to use the REV/REV16 instruction simply.
Change-Id: Ic4a5ed6254e082763e54aa70d428f59a0088636e
ndian.h
|
| a1727092595a65e4dd9d9a6bae3778ad8c31d77f |
08-Aug-2010 |
Jim Huang <jserv@0xlab.org> |
bionic: Rename _ARM_HAVE_LDREX_STREX to __ARM_HAVE_LDREX_STREX for consistency
The patch follows the naming manner in existing macros with prefix
__ARM_HAVE.
Change-Id: I6763ce2bf3ee85fd1da112c719543061d8d19bf4
achine/cpu-features.h
|
| b8e6c50cfa2d4c4b73e071d0e836a2667db010b1 |
25-Mar-2010 |
David 'Digit' Turner <digit@google.com> |
Fix setjmp()/longjmp() to save FP registers on ARMv7. - DO NOT MERGE
Change-Id: I3a0c2c05e295ac05ed51a531dabda668be204ca0
achine/cpu-features.h
achine/setjmp.h
|
| 4fdbadde921ec17b4ff9e97fbd41096903b21772 |
20-May-2010 |
Andy McFadden <fadden@android.com> |
Atomic/SMP update.
Added an underscore to _ARM_HAVE_LDREX_STREX to make it match the others.
Added __ARM_HAVE_DMB and __ARM_HAVE_LDREXD when appropriate.
Fixed some typos.
Change-Id: I2f55febcff4aeb7de572a514fb2cd2f820dca27c
achine/cpu-features.h
|
| 76ec6891e2bc18c9e12cd2f567358bb817b24cff |
09-Sep-2009 |
vinay harugop <vinay.harugop@stericsson.com> |
ARM architecture reference manuals for ARMv6 & ARMv7 state that the use of 'swp' instruction is deprecated
ARMv6 onwards. These architectures provide the load-linked, store-conditional pair of ldrex/strex whose use
is recommended in place of 'swp'. Also, the description of the 'swp' instruction in the ARMv6 reference
manual states that the swap operation does not include any memory barrier guarantees.This fix attempts to
address these issues by providing an atomic swap implementation using ldrex/strex under _ARM_HAVE_LDREX_STREX
macro. This Fix is verified on ST Ericsson's U8500 platform and Submitted on behalf of a third-party:
Surinder-pal SINGH from STMicroelectronics.
achine/cpu-features.h
|
| 4e468ed2eb86a2406e14f1eca82072ee501d05fd |
18-Dec-2008 |
The Android Open Source Project <initial-contribution@android.com> |
Code drop from //branches/cupcake/...@124589
sm
achine/_types.h
achine/cpu-features.h
|
| a27d2baa0c1a2ec70f47ea9199b1dd6762c8a349 |
21-Oct-2008 |
The Android Open Source Project <initial-contribution@android.com> |
Initial Contribution
sm
ndian.h
achine/_types.h
achine/asm.h
achine/cdefs.h
achine/exec.h
achine/ieee.h
achine/internal_types.h
achine/kernel.h
achine/limits.h
achine/setjmp.h
|