Lines Matching defs:rs

125 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) {
126 CHECK_NE(rs, kNoRegister);
130 static_cast<uint32_t>(rs) << kRsShift |
138 void MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) {
139 CHECK_NE(rs, kNoRegister);
142 static_cast<uint32_t>(rs) << kRsShift |
148 void MipsAssembler::EmitI21(int opcode, Register rs, uint32_t imm21) {
149 CHECK_NE(rs, kNoRegister);
152 static_cast<uint32_t>(rs) << kRsShift |
186 void MipsAssembler::Addu(Register rd, Register rs, Register rt) {
187 EmitR(0, rs, rt, rd, 0, 0x21);
190 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16) {
191 EmitI(0x9, rs, rt, imm16);
194 void MipsAssembler::Subu(Register rd, Register rs, Register rt) {
195 EmitR(0, rs, rt, rd, 0, 0x23);
198 void MipsAssembler::MultR2(Register rs, Register rt) {
200 EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x18);
203 void MipsAssembler::MultuR2(Register rs, Register rt) {
205 EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x19);
208 void MipsAssembler::DivR2(Register rs, Register rt) {
210 EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x1a);
213 void MipsAssembler::DivuR2(Register rs, Register rt) {
215 EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x1b);
218 void MipsAssembler::MulR2(Register rd, Register rs, Register rt) {
220 EmitR(0x1c, rs, rt, rd, 0, 2);
223 void MipsAssembler::DivR2(Register rd, Register rs, Register rt) {
225 DivR2(rs, rt);
229 void MipsAssembler::ModR2(Register rd, Register rs, Register rt) {
231 DivR2(rs, rt);
235 void MipsAssembler::DivuR2(Register rd, Register rs, Register rt) {
237 DivuR2(rs, rt);
241 void MipsAssembler::ModuR2(Register rd, Register rs, Register rt) {
243 DivuR2(rs, rt);
247 void MipsAssembler::MulR6(Register rd, Register rs, Register rt) {
249 EmitR(0, rs, rt, rd, 2, 0x18);
252 void MipsAssembler::MuhR6(Register rd, Register rs, Register rt) {
254 EmitR(0, rs, rt, rd, 3, 0x18);
257 void MipsAssembler::MuhuR6(Register rd, Register rs, Register rt) {
259 EmitR(0, rs, rt, rd, 3, 0x19);
262 void MipsAssembler::DivR6(Register rd, Register rs, Register rt) {
264 EmitR(0, rs, rt, rd, 2, 0x1a);
267 void MipsAssembler::ModR6(Register rd, Register rs, Register rt) {
269 EmitR(0, rs, rt, rd, 3, 0x1a);
272 void MipsAssembler::DivuR6(Register rd, Register rs, Register rt) {
274 EmitR(0, rs, rt, rd, 2, 0x1b);
277 void MipsAssembler::ModuR6(Register rd, Register rs, Register rt) {
279 EmitR(0, rs, rt, rd, 3, 0x1b);
282 void MipsAssembler::And(Register rd, Register rs, Register rt) {
283 EmitR(0, rs, rt, rd, 0, 0x24);
286 void MipsAssembler::Andi(Register rt, Register rs, uint16_t imm16) {
287 EmitI(0xc, rs, rt, imm16);
290 void MipsAssembler::Or(Register rd, Register rs, Register rt) {
291 EmitR(0, rs, rt, rd, 0, 0x25);
294 void MipsAssembler::Ori(Register rt, Register rs, uint16_t imm16) {
295 EmitI(0xd, rs, rt, imm16);
298 void MipsAssembler::Xor(Register rd, Register rs, Register rt) {
299 EmitR(0, rs, rt, rd, 0, 0x26);
302 void MipsAssembler::Xori(Register rt, Register rs, uint16_t imm16) {
303 EmitI(0xe, rs, rt, imm16);
306 void MipsAssembler::Nor(Register rd, Register rs, Register rt) {
307 EmitR(0, rs, rt, rd, 0, 0x27);
310 void MipsAssembler::Movz(Register rd, Register rs, Register rt) {
312 EmitR(0, rs, rt, rd, 0, 0x0A);
315 void MipsAssembler::Movn(Register rd, Register rs, Register rt) {
317 EmitR(0, rs, rt, rd, 0, 0x0B);
320 void MipsAssembler::Seleqz(Register rd, Register rs, Register rt) {
322 EmitR(0, rs, rt, rd, 0, 0x35);
325 void MipsAssembler::Selnez(Register rd, Register rs, Register rt) {
327 EmitR(0, rs, rt, rd, 0, 0x37);
330 void MipsAssembler::ClzR6(Register rd, Register rs) {
332 EmitR(0, rs, static_cast<Register>(0), rd, 0x01, 0x10);
335 void MipsAssembler::ClzR2(Register rd, Register rs) {
337 EmitR(0x1C, rs, rd, rd, 0, 0x20);
340 void MipsAssembler::CloR6(Register rd, Register rs) {
342 EmitR(0, rs, static_cast<Register>(0), rd, 0x01, 0x11);
345 void MipsAssembler::CloR2(Register rd, Register rs) {
347 EmitR(0x1C, rs, rd, rd, 0, 0x21);
387 void MipsAssembler::Sllv(Register rd, Register rt, Register rs) {
388 EmitR(0, rs, rt, rd, 0, 0x04);
391 void MipsAssembler::Srlv(Register rd, Register rt, Register rs) {
392 EmitR(0, rs, rt, rd, 0, 0x06);
395 void MipsAssembler::Rotrv(Register rd, Register rt, Register rs) {
396 EmitR(0, rs, rt, rd, 1, 0x06);
399 void MipsAssembler::Srav(Register rd, Register rt, Register rs) {
400 EmitR(0, rs, rt, rd, 0, 0x07);
417 void MipsAssembler::Lb(Register rt, Register rs, uint16_t imm16) {
418 EmitI(0x20, rs, rt, imm16);
421 void MipsAssembler::Lh(Register rt, Register rs, uint16_t imm16) {
422 EmitI(0x21, rs, rt, imm16);
425 void MipsAssembler::Lw(Register rt, Register rs, uint16_t imm16) {
426 EmitI(0x23, rs, rt, imm16);
429 void MipsAssembler::Lwl(Register rt, Register rs, uint16_t imm16) {
431 EmitI(0x22, rs, rt, imm16);
434 void MipsAssembler::Lwr(Register rt, Register rs, uint16_t imm16) {
436 EmitI(0x26, rs, rt, imm16);
439 void MipsAssembler::Lbu(Register rt, Register rs, uint16_t imm16) {
440 EmitI(0x24, rs, rt, imm16);
443 void MipsAssembler::Lhu(Register rt, Register rs, uint16_t imm16) {
444 EmitI(0x25, rs, rt, imm16);
466 void MipsAssembler::Sb(Register rt, Register rs, uint16_t imm16) {
467 EmitI(0x28, rs, rt, imm16);
470 void MipsAssembler::Sh(Register rt, Register rs, uint16_t imm16) {
471 EmitI(0x29, rs, rt, imm16);
474 void MipsAssembler::Sw(Register rt, Register rs, uint16_t imm16) {
475 EmitI(0x2b, rs, rt, imm16);
478 void MipsAssembler::Swl(Register rt, Register rs, uint16_t imm16) {
480 EmitI(0x2a, rs, rt, imm16);
483 void MipsAssembler::Swr(Register rt, Register rs, uint16_t imm16) {
485 EmitI(0x2e, rs, rt, imm16);
510 void MipsAssembler::Slt(Register rd, Register rs, Register rt) {
511 EmitR(0, rs, rt, rd, 0, 0x2a);
514 void MipsAssembler::Sltu(Register rd, Register rs, Register rt) {
515 EmitR(0, rs, rt, rd, 0, 0x2b);
518 void MipsAssembler::Slti(Register rt, Register rs, uint16_t imm16) {
519 EmitI(0xa, rs, rt, imm16);
522 void MipsAssembler::Sltiu(Register rt, Register rs, uint16_t imm16) {
523 EmitI(0xb, rs, rt, imm16);
530 void MipsAssembler::Beq(Register rs, Register rt, uint16_t imm16) {
531 EmitI(0x4, rs, rt, imm16);
534 void MipsAssembler::Bne(Register rs, Register rt, uint16_t imm16) {
535 EmitI(0x5, rs, rt, imm16);
590 void MipsAssembler::Jalr(Register rd, Register rs) {
591 EmitR(0, rs, static_cast<Register>(0), rd, 0, 0x09);
594 void MipsAssembler::Jalr(Register rs) {
595 Jalr(RA, rs);
598 void MipsAssembler::Jr(Register rs) {
599 Jalr(ZERO, rs);
606 void MipsAssembler::Auipc(Register rs, uint16_t imm16) {
608 EmitI(0x3B, rs, static_cast<Register>(0x1E), imm16);
611 void MipsAssembler::Addiupc(Register rs, uint32_t imm19) {
614 EmitI21(0x3B, rs, imm19);
632 void MipsAssembler::Bltc(Register rs, Register rt, uint16_t imm16) {
634 CHECK_NE(rs, ZERO);
636 CHECK_NE(rs, rt);
637 EmitI(0x17, rs, rt, imm16);
652 void MipsAssembler::Bgec(Register rs, Register rt, uint16_t imm16) {
654 CHECK_NE(rs, ZERO);
656 CHECK_NE(rs, rt);
657 EmitI(0x16, rs, rt, imm16);
672 void MipsAssembler::Bltuc(Register rs, Register rt, uint16_t imm16) {
674 CHECK_NE(rs, ZERO);
676 CHECK_NE(rs, rt);
677 EmitI(0x7, rs, rt, imm16);
680 void MipsAssembler::Bgeuc(Register rs, Register rt, uint16_t imm16) {
682 CHECK_NE(rs, ZERO);
684 CHECK_NE(rs, rt);
685 EmitI(0x6, rs, rt, imm16);
688 void MipsAssembler::Beqc(Register rs, Register rt, uint16_t imm16) {
690 CHECK_NE(rs, ZERO);
692 CHECK_NE(rs, rt);
693 EmitI(0x8, std::min(rs, rt), std::max(rs, rt), imm16);
696 void MipsAssembler::Bnec(Register rs, Register rt, uint16_t imm16) {
698 CHECK_NE(rs, ZERO);
700 CHECK_NE(rs, rt);
701 EmitI(0x18, std::min(rs, rt), std::max(rs, rt), imm16);
704 void MipsAssembler::Beqzc(Register rs, uint32_t imm21) {
706 CHECK_NE(rs, ZERO);
707 EmitI21(0x36, rs, imm21);
710 void MipsAssembler::Bnezc(Register rs, uint32_t imm21) {
712 CHECK_NE(rs, ZERO);
713 EmitI21(0x3E, rs, imm21);
726 void MipsAssembler::EmitBcondR2(BranchCondition cond, Register rs, Register rt, uint16_t imm16) {
730 Bltz(rs, imm16);
734 Bgez(rs, imm16);
738 Blez(rs, imm16);
742 Bgtz(rs, imm16);
745 Beq(rs, rt, imm16);
748 Bne(rs, rt, imm16);
752 Beqz(rs, imm16);
756 Bnez(rs, imm16);
760 Bc1f(static_cast<int>(rs), imm16);
764 Bc1t(static_cast<int>(rs), imm16);
780 void MipsAssembler::EmitBcondR6(BranchCondition cond, Register rs, Register rt, uint32_t imm16_21) {
783 Bltc(rs, rt, imm16_21);
786 Bgec(rs, rt, imm16_21);
789 Bgec(rt, rs, imm16_21);
792 Bltc(rt, rs, imm16_21);
796 Bltzc(rs, imm16_21);
800 Bgezc(rs, imm16_21);
804 Blezc(rs, imm16_21);
808 Bgtzc(rs, imm16_21);
811 Beqc(rs, rt, imm16_21);
814 Bnec(rs, rt, imm16_21);
818 Beqzc(rs, imm16_21);
822 Bnezc(rs, imm16_21);
825 Bltuc(rs, rt, imm16_21);
828 Bgeuc(rs, rt, imm16_21);
832 Bc1eqz(static_cast<FRegister>(rs), imm16_21);
836 Bc1nez(static_cast<FRegister>(rs), imm16_21);
1148 void MipsAssembler::Movf(Register rd, Register rs, int cc) {
1151 EmitR(0, rs, static_cast<Register>(cc << 2), rd, 0, 0x01);
1154 void MipsAssembler::Movt(Register rd, Register rs, int cc) {
1157 EmitR(0, rs, static_cast<Register>((cc << 2) | 1), rd, 0, 0x01);
1306 void MipsAssembler::Lwc1(FRegister ft, Register rs, uint16_t imm16) {
1307 EmitI(0x31, rs, static_cast<Register>(ft), imm16);
1310 void MipsAssembler::Ldc1(FRegister ft, Register rs, uint16_t imm16) {
1311 EmitI(0x35, rs, static_cast<Register>(ft), imm16);
1314 void MipsAssembler::Swc1(FRegister ft, Register rs, uint16_t imm16) {
1315 EmitI(0x39, rs, static_cast<Register>(ft), imm16);
1318 void MipsAssembler::Sdc1(FRegister ft, Register rs, uint16_t imm16) {
1319 EmitI(0x3d, rs, static_cast<Register>(ft), imm16);
1331 void MipsAssembler::Move(Register rd, Register rs) {
1332 Or(rd, rs, ZERO);
1339 void MipsAssembler::Not(Register rd, Register rs) {
1340 Nor(rd, rs, ZERO);
1343 void MipsAssembler::Push(Register rs) {
1345 Sw(rs, SP, 0);
1459 void MipsAssembler::Addiu32(Register rt, Register rs, int32_t value, Register temp) {
1461 Addiu(rt, rs, value);
1464 Addu(rt, rs, temp);
2163 void MipsAssembler::Beq(Register rs, Register rt, MipsLabel* label) {
2164 Bcond(label, kCondEQ, rs, rt);
2167 void MipsAssembler::Bne(Register rs, Register rt, MipsLabel* label) {
2168 Bcond(label, kCondNE, rs, rt);
2195 void MipsAssembler::Blt(Register rs, Register rt, MipsLabel* label) {
2197 Bcond(label, kCondLT, rs, rt);
2198 } else if (!Branch::IsNop(kCondLT, rs, rt)) {
2200 Slt(AT, rs, rt);
2205 void MipsAssembler::Bge(Register rs, Register rt, MipsLabel* label) {
2207 Bcond(label, kCondGE, rs, rt);
2208 } else if (Branch::IsUncond(kCondGE, rs, rt)) {
2212 Slt(AT, rs, rt);
2217 void MipsAssembler::Bltu(Register rs, Register rt, MipsLabel* label) {
2219 Bcond(label, kCondLTU, rs, rt);
2220 } else if (!Branch::IsNop(kCondLTU, rs, rt)) {
2222 Sltu(AT, rs, rt);
2227 void MipsAssembler::Bgeu(Register rs, Register rt, MipsLabel* label) {
2229 Bcond(label, kCondGEU, rs, rt);
2230 } else if (Branch::IsUncond(kCondGEU, rs, rt)) {
2234 Sltu(AT, rs, rt);