Lines Matching refs:EmitI

131 void Mips64Assembler::EmitI(int opcode, GpuRegister rs, GpuRegister rt, uint16_t imm) {
184 EmitI(0x9, rs, rt, imm16);
192 EmitI(0x19, rs, rt, imm16);
256 EmitI(0xc, rs, rt, imm16);
264 EmitI(0xd, rs, rt, imm16);
272 EmitI(0xe, rs, rt, imm16);
322 EmitI(0x1f, base, rt, ((imm9 & 0x1FF) << 7) | 0x26);
327 EmitI(0x1f, base, rt, ((imm9 & 0x1FF) << 7) | 0x27);
332 EmitI(0x1f, base, rt, ((imm9 & 0x1FF) << 7) | 0x36);
337 EmitI(0x1f, base, rt, ((imm9 & 0x1FF) << 7) | 0x37);
421 EmitI(0x20, rs, rt, imm16);
425 EmitI(0x21, rs, rt, imm16);
429 EmitI(0x23, rs, rt, imm16);
433 EmitI(0x37, rs, rt, imm16);
437 EmitI(0x24, rs, rt, imm16);
441 EmitI(0x25, rs, rt, imm16);
445 EmitI(0x27, rs, rt, imm16);
449 EmitI(0xf, static_cast<GpuRegister>(0), rt, imm16);
453 EmitI(1, rs, static_cast<GpuRegister>(6), imm16);
457 EmitI(1, rs, static_cast<GpuRegister>(0x1e), imm16);
466 EmitI(0x28, rs, rt, imm16);
470 EmitI(0x29, rs, rt, imm16);
474 EmitI(0x2b, rs, rt, imm16);
478 EmitI(0x3f, rs, rt, imm16);
490 EmitI(0xa, rs, rt, imm16);
494 EmitI(0xb, rs, rt, imm16);
534 EmitI(0x3B, rs, static_cast<GpuRegister>(0x1E), imm16);
547 EmitI(0x36, static_cast<GpuRegister>(0), rt, imm16);
551 EmitI(0x3E, static_cast<GpuRegister>(0), rt, imm16);
558 EmitI(0x17, rs, rt, imm16);
563 EmitI(0x17, rt, rt, imm16);
568 EmitI(0x17, static_cast<GpuRegister>(0), rt, imm16);
575 EmitI(0x16, rs, rt, imm16);
580 EmitI(0x16, rt, rt, imm16);
585 EmitI(0x16, static_cast<GpuRegister>(0), rt, imm16);
592 EmitI(0x7, rs, rt, imm16);
599 EmitI(0x6, rs, rt, imm16);
606 EmitI(0x8, std::min(rs, rt), std::max(rs, rt), imm16);
613 EmitI(0x18, std::min(rs, rt), std::max(rs, rt), imm16);
998 EmitI(0x31, rs, static_cast<GpuRegister>(ft), imm16);
1002 EmitI(0x35, rs, static_cast<GpuRegister>(ft), imm16);
1006 EmitI(0x39, rs, static_cast<GpuRegister>(ft), imm16);
1010 EmitI(0x3d, rs, static_cast<GpuRegister>(ft), imm16);