Cross Reference: /art/compiler/utils/x86_64/assembler_x86

Lines Matching defs:imm
78 void X86_64Assembler::pushq(const Immediate& imm) {
80   CHECK(imm.is_int32());  // pushq only supports 32b immediate.
81   if (imm.is_int8()) {
83     EmitUint8(imm.value() & 0xFF);
86     EmitImmediate(imm);
106 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) {
108   if (imm.is_int32()) {
113     EmitInt32(static_cast<int32_t>(imm.value()));
117     EmitInt64(imm.value());
122 void X86_64Assembler::movl(CpuRegister dst, const Immediate& imm) {
123   CHECK(imm.is_int32());
127   EmitImmediate(imm);
131 void X86_64Assembler::movq(const Address& dst, const Immediate& imm) {
132   CHECK(imm.is_int32());
137   EmitImmediate(imm);
189 void X86_64Assembler::movl(const Address& dst, const Immediate& imm) {
194   EmitImmediate(imm);
292 void X86_64Assembler::movb(const Address& dst, const Immediate& imm) {
297   CHECK(imm.is_int8());
298   EmitUint8(imm.value() & 0xFF);
352 void X86_64Assembler::movw(const Address& dst, const Immediate& imm) {
358   CHECK(imm.is_uint16() || imm.is_int16());
359   EmitUint8(imm.value() & 0xFF);
360   EmitUint8(imm.value() >> 8);
929 void X86_64Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) {
937   EmitUint8(imm.value());
941 void X86_64Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) {
949   EmitUint8(imm.value());
1227 void X86_64Assembler::cmpw(const Address& address, const Immediate& imm) {
1229   CHECK(imm.is_int32());
1232   EmitComplex(7, address, imm);
1236 void X86_64Assembler::cmpl(CpuRegister reg, const Immediate& imm) {
1238   CHECK(imm.is_int32());
1240   EmitComplex(7, Operand(reg), imm);
1268 void X86_64Assembler::cmpl(const Address& address, const Immediate& imm) {
1270   CHECK(imm.is_int32());
1272   EmitComplex(7, address, imm);
1284 void X86_64Assembler::cmpq(CpuRegister reg, const Immediate& imm) {
1286   CHECK(imm.is_int32());  // cmpq only supports 32b immediate.
1288   EmitComplex(7, Operand(reg), imm);
1300 void X86_64Assembler::cmpq(const Address& address, const Immediate& imm) {
1301   CHECK(imm.is_int32());  // cmpq only supports 32b immediate.
1304   EmitComplex(7, address, imm);
1398 void X86_64Assembler::andl(CpuRegister dst, const Immediate& imm) {
1401   EmitComplex(4, Operand(dst), imm);
1405 void X86_64Assembler::andq(CpuRegister reg, const Immediate& imm) {
1407   CHECK(imm.is_int32());  // andq only supports 32b immediate.
1409   EmitComplex(4, Operand(reg), imm);
1445 void X86_64Assembler::orl(CpuRegister dst, const Immediate& imm) {
1448   EmitComplex(1, Operand(dst), imm);
1452 void X86_64Assembler::orq(CpuRegister dst, const Immediate& imm) {
1454   CHECK(imm.is_int32());  // orq only supports 32b immediate.
1456   EmitComplex(1, Operand(dst), imm);
1492 void X86_64Assembler::xorl(CpuRegister dst, const Immediate& imm) {
1495   EmitComplex(6, Operand(dst), imm);
1507 void X86_64Assembler::xorq(CpuRegister dst, const Immediate& imm) {
1509   CHECK(imm.is_int32());  // xorq only supports 32b immediate.
1511   EmitComplex(6, Operand(dst), imm);
1575 void X86_64Assembler::addl(CpuRegister reg, const Immediate& imm) {
1578   EmitComplex(0, Operand(reg), imm);
1582 void X86_64Assembler::addq(CpuRegister reg, const Immediate& imm) {
1584   CHECK(imm.is_int32());  // addq only supports 32b immediate.
1586   EmitComplex(0, Operand(reg), imm);
1615 void X86_64Assembler::addl(const Address& address, const Immediate& imm) {
1618   EmitComplex(0, address, imm);
1630 void X86_64Assembler::subl(CpuRegister reg, const Immediate& imm) {
1633   EmitComplex(5, Operand(reg), imm);
1637 void X86_64Assembler::subq(CpuRegister reg, const Immediate& imm) {
1639   CHECK(imm.is_int32());  // subq only supports 32b immediate.
1641   EmitComplex(5, Operand(reg), imm);
1706 void X86_64Assembler::imull(CpuRegister dst, CpuRegister src, const Immediate& imm) {
1708   CHECK(imm.is_int32());  // imull only supports 32b immediate.
1712   // See whether imm can be represented as a sign-extended 8bit value.
1713   int32_t v32 = static_cast<int32_t>(imm.value());
1723     EmitImmediate(imm);
1728 void X86_64Assembler::imull(CpuRegister reg, const Immediate& imm) {
1729   imull(reg, reg, imm);
1751 void X86_64Assembler::imulq(CpuRegister reg, const Immediate& imm) {
1752   imulq(reg, reg, imm);
1755 void X86_64Assembler::imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm) {
1757   CHECK(imm.is_int32());  // imulq only supports 32b immediate.
1761   // See whether imm can be represented as a sign-extended 8bit value.
1762   int64_t v64 = imm.value();
1772     EmitImmediate(imm);
1825 void X86_64Assembler::shll(CpuRegister reg, const Immediate& imm) {
1826   EmitGenericShift(false, 4, reg, imm);
1830 void X86_64Assembler::shlq(CpuRegister reg, const Immediate& imm) {
1831   EmitGenericShift(true, 4, reg, imm);
1845 void X86_64Assembler::shrl(CpuRegister reg, const Immediate& imm) {
1846   EmitGenericShift(false, 5, reg, imm);
1850 void X86_64Assembler::shrq(CpuRegister reg, const Immediate& imm) {
1851   EmitGenericShift(true, 5, reg, imm);
1865 void X86_64Assembler::sarl(CpuRegister reg, const Immediate& imm) {
1866   EmitGenericShift(false, 7, reg, imm);
1875 void X86_64Assembler::sarq(CpuRegister reg, const Immediate& imm) {
1876   EmitGenericShift(true, 7, reg, imm);
1885 void X86_64Assembler::roll(CpuRegister reg, const Immediate& imm) {
1886   EmitGenericShift(false, 0, reg, imm);
1895 void X86_64Assembler::rorl(CpuRegister reg, const Immediate& imm) {
1896   EmitGenericShift(false, 1, reg, imm);
1905 void X86_64Assembler::rolq(CpuRegister reg, const Immediate& imm) {
1906   EmitGenericShift(true, 0, reg, imm);
1915 void X86_64Assembler::rorq(CpuRegister reg, const Immediate& imm) {
1916   EmitGenericShift(true, 1, reg, imm);
1957 void X86_64Assembler::enter(const Immediate& imm) {
1960   CHECK(imm.is_uint16()) << imm.value();
1961   EmitUint8(imm.value() & 0xFF);
1962   EmitUint8((imm.value() >> 8) & 0xFF);
1979 void X86_64Assembler::ret(const Immediate& imm) {
1982   CHECK(imm.is_uint16());
1983   EmitUint8(imm.value() & 0xFF);
1984   EmitUint8((imm.value() >> 8) & 0xFF);
2162 void X86_64Assembler::AddImmediate(CpuRegister reg, const Immediate& imm) {
2163   int value = imm.value();
2166       addl(reg, imm);
2396 void X86_64Assembler::EmitImmediate(const Immediate& imm) {
2397   if (imm.is_int32()) {
2398     EmitInt32(static_cast<int32_t>(imm.value()));
2400     EmitInt64(imm.value());
2464                                        const Immediate& imm) {
2466   CHECK(imm.is_int8());
2472   if (imm.value() == 1) {
2478     EmitUint8(imm.value() & 0xFF);
2791 void X86_64Assembler::StoreImmediateToFrame(FrameOffset dest, uint32_t imm,
2793   movl(Address(CpuRegister(RSP), dest), Immediate(imm));  // TODO(64) movq?
2796 void X86_64Assembler::StoreImmediateToThread64(ThreadOffset<8> dest, uint32_t imm,
2798   gs()->movl(Address::Absolute(dest, true), Immediate(imm));  // TODO(64) movq?