Lines Matching defs:instr
154 explicit RmLslImm2(uint32_t instr) : imm2((instr >> 4) & 0x3), rm(instr & 0xf) {}
205 FpRegister(uint32_t instr, uint16_t at_bit, uint16_t extra_at_bit) {
206 size = (instr >> 8) & 1;
207 uint32_t Vn = (instr >> at_bit) & 0xF;
208 uint32_t N = (instr >> extra_at_bit) & 1;
211 FpRegister(uint32_t instr, uint16_t at_bit, uint16_t extra_at_bit, uint32_t forced_size) {
213 uint32_t Vn = (instr >> at_bit) & 0xF;
214 uint32_t N = (instr >> extra_at_bit) & 1;
228 explicit FpRegisterRange(uint32_t instr)
229 : first(instr, 12, 22), imm8(instr & 0xFF) {}
485 uint32_t instr = (ReadU16(instr_ptr) << 16) | ReadU16(instr_ptr + 2);
493 uint32_t op1 = (instr >> 27) & 3;
502 uint32_t op2 = (instr >> 20) & 0x7F;
522 uint32_t op = (instr >> 23) & 3;
523 uint32_t W = (instr >> 21) & 1;
524 uint32_t L = (instr >> 20) & 1;
525 ArmRegister Rn(instr, 16);
552 args << RegisterList(instr);
555 uint32_t op3 = (instr >> 23) & 3;
556 uint32_t op4 = (instr >> 20) & 3;
557 // uint32_t op5 = (instr >> 4) & 0xF;
558 ArmRegister Rn(instr, 16);
559 ArmRegister Rt(instr, 12);
560 ArmRegister Rd(instr, 8);
561 uint32_t imm8 = instr & 0xFF;
563 int W = (instr >> 21) & 1;
564 int U = (instr >> 23) & 1;
565 int P = (instr >> 24) & 1;
594 int op5 = (instr >> 4) & 0xf;
599 Rd = ArmRegister(instr, 0);
602 Rd.r == Rn.r || Rd.r == Rt.r || (instr & 0xf00) != 0xf00) {
609 Rd = ArmRegister(instr, 0);
624 if (Rt.r == 13 || Rt.r == 15 || Rn.r == 15 || (instr & 0xf00) != 0xf00) {
629 int op5 = (instr >> 4) & 0xf;
641 if (Rt.r == 13 || Rt.r == 15 || Rn.r == 15 || (instr & 0xf0f) != 0xf0f) {
649 Rn.r == 15 || (instr & 0x00f) != 0x00f) {
663 int W = (instr >> 21) & 1;
664 int U = (instr >> 23) & 1;
665 int P = (instr >> 24) & 1;
690 uint32_t op3 = (instr >> 21) & 0xF;
691 uint32_t S = (instr >> 20) & 1;
692 uint32_t imm3 = ((instr >> 12) & 0x7);
693 uint32_t imm2 = ((instr >> 6) & 0x3);
695 uint32_t shift_type = ((instr >> 4) & 0x3);
696 ArmRegister Rd(instr, 8);
697 ArmRegister Rn(instr, 16);
698 ArmRegister Rm(instr, 0);
814 uint32_t op3 = (instr >> 20) & 0x3F;
815 uint32_t coproc = (instr >> 8) & 0xF;
816 uint32_t op4 = (instr >> 4) & 0x1;
828 uint32_t P = (instr >> 24) & 1;
829 uint32_t U = (instr >> 23) & 1;
830 uint32_t W = (instr >> 21) & 1;
834 uint32_t L = (instr >> 20) & 1;
835 uint32_t S = (instr >> 8) & 1;
836 ArmRegister Rn(instr, 16);
838 FpRegister d(instr, 12, 22);
839 uint32_t imm8 = instr & 0xFF;
848 args << FpRegisterRange(instr);
852 << FpRegisterRange(instr);
857 if ((instr & 0xD0) == 0x10) {
859 uint32_t L = (instr >> 20) & 1;
860 uint32_t S = (instr >> 8) & 1;
861 ArmRegister Rt2(instr, 16);
862 ArmRegister Rt(instr, 12);
863 FpRegister m(instr, 0, 5);
900 uint32_t S = (instr >> 8) & 1;
901 uint32_t Q = (instr >> 6) & 1;
902 FpRegister d(instr, 12, 22);
903 FpRegister n(instr, 16, 7);
904 FpRegister m(instr, 0, 5);
918 uint32_t imm8 = ((instr & 0xf0000u) >> 12) | (instr & 0xfu);
922 if ((instr & 0xa0) != 0) {
940 uint32_t op5 = (instr >> 16) & 0xF;
941 uint32_t op = (instr >> 7) & 1;
943 FpRegister Dd(instr, 12, 22, 1);
944 FpRegister Sd(instr, 12, 22, 0);
945 FpRegister Dm(instr, 0, 5, 1);
946 FpRegister Sm(instr, 0, 5, 0);
965 if ((instr & 0x2f) != 0) {
1026 ArmRegister Rt(instr, 12);
1027 FpRegister n(instr, 16, 7);
1034 if (Rt.r == 13 || Rt.r == 15 || (instr & 0x6F) != 0) {
1046 uint32_t spec_reg = (instr >> 16) & 0xF;
1047 ArmRegister Rt(instr, 12);
1068 if ((instr & 0x8000) == 0 && (op2 & 0x20) == 0) {
1078 uint32_t i = (instr >> 26) & 1;
1079 uint32_t op3 = (instr >> 21) & 0xF;
1080 uint32_t S = (instr >> 20) & 1;
1081 ArmRegister Rn(instr, 16);
1082 uint32_t imm3 = (instr >> 12) & 7;
1083 ArmRegister Rd(instr, 8);
1084 uint32_t imm8 = instr & 0xFF;
1131 } else if ((instr & 0x8000) == 0 && (op2 & 0x20) != 0) {
1140 uint32_t op3 = (instr >> 20) & 0x1F;
1144 ArmRegister Rd(instr, 8);
1145 ArmRegister Rn(instr, 16);
1146 uint32_t i = (instr >> 26) & 1;
1147 uint32_t imm3 = (instr >> 12) & 0x7;
1148 uint32_t imm8 = instr & 0xFF;
1162 ArmRegister Rd(instr, 8);
1163 uint32_t i = (instr >> 26) & 1;
1164 uint32_t imm3 = (instr >> 12) & 0x7;
1165 uint32_t imm8 = instr & 0xFF;
1166 uint32_t Rn = (instr >> 16) & 0xF;
1176 ArmRegister Rd(instr, 8);
1177 ArmRegister Rn(instr, 16);
1178 uint32_t msb = instr & 0x1F;
1179 uint32_t imm2 = (instr >> 6) & 0x3;
1180 uint32_t imm3 = (instr >> 12) & 0x7;
1195 (instr & 0x04000020) != 0u) {
1214 uint32_t op3 = (instr >> 12) & 7;
1215 // uint32_t op4 = (instr >> 8) & 0xF;
1227 uint32_t S = (instr >> 26) & 1;
1228 uint32_t J2 = (instr >> 11) & 1;
1229 uint32_t J1 = (instr >> 13) & 1;
1230 uint32_t imm6 = (instr >> 16) & 0x3F;
1231 uint32_t imm11 = instr & 0x7FF;
1232 uint32_t cond = (instr >> 22) & 0xF;
1241 uint32_t op5 = (instr >> 4) & 0xF;
1243 case 4: opcode << "dsb"; DumpMemoryDomain(args, instr & 0xF); break;
1244 case 5: opcode << "dmb"; DumpMemoryDomain(args, instr & 0xF); break;
1245 case 6: opcode << "isb"; DumpMemoryDomain(args, instr & 0xF); break;
1267 uint32_t S = (instr >> 26) & 1;
1268 uint32_t cond = (instr >> 22) & 0xF;
1269 uint32_t J2 = (instr >> 11) & 1;
1270 uint32_t form = (instr >> 12) & 1;
1271 uint32_t J1 = (instr >> 13) & 1;
1272 uint32_t imm10 = (instr >> 16) & 0x3FF;
1273 uint32_t imm6 = (instr >> 16) & 0x3F;
1274 uint32_t imm11 = instr & 0x7FF;
1300 uint32_t S = (instr >> 26) & 1;
1301 uint32_t J2 = (instr >> 11) & 1;
1302 uint32_t L = (instr >> 12) & 1;
1303 uint32_t J1 = (instr >> 13) & 1;
1304 uint32_t imm10 = (instr >> 16) & 0x3FF;
1305 uint32_t imm11 = instr & 0x7FF;
1373 bool is_load = HasBitSet(instr, 20);
1374 bool is_half = HasBitSet(instr, 21); // W for PLD/PLDW.
1375 bool is_word = HasBitSet(instr, 22);
1376 bool is_signed = HasBitSet(instr, 24);
1377 ArmRegister Rn(instr, 16);
1378 ArmRegister Rt(instr, 12);
1379 uint32_t imm12 = instr & 0xFFF;
1380 uint32_t U = (instr >> 23) & 1; // U for imm12
1381 uint32_t imm8 = instr & 0xFF;
1382 uint32_t op4 = (instr >> 8) & 0xF; // 1PUW for imm8
1395 } else if ((instr & 0xFC0) == 0) {
1397 RmLslImm2 Rm(instr);
1432 } else if ((instr & 0xFC0) == 0) {
1434 RmLslImm2 Rm(instr);
1445 uint32_t P = (instr >> 10) & 1;
1446 U = (instr >> 9) & 1;
1447 uint32_t W = (instr >> 8) & 1;
1473 if ((instr & 0xf0c0) == 0xf080) {
1474 uint32_t op3 = (instr >> 4) & 3;
1476 ArmRegister Rm(instr, 0);
1477 ArmRegister Rd(instr, 8);
1479 ArmRegister Rm2(instr, 16);
1488 if ((instr & 0xf0f0) == 0xf080) {
1490 ArmRegister Rm(instr, 0);
1491 ArmRegister Rd(instr, 8);
1493 ArmRegister Rm2(instr, 16);
1503 if ((instr & 0x0080f0f0) == 0x0000f000) {
1505 uint32_t shift_op = (instr >> 21) & 3;
1506 uint32_t S = (instr >> 20) & 1;
1507 ArmRegister Rd(instr, 8);
1508 ArmRegister Rn(instr, 16);
1509 ArmRegister Rm(instr, 0);
1515 op1 = (instr >> 20) & 0x7;
1516 op2 = (instr >> 4) & 0x1;
1517 ArmRegister Ra(instr, 12);
1518 ArmRegister Rn(instr, 16);
1519 ArmRegister Rm(instr, 0);
1520 ArmRegister Rd(instr, 8);
1546 op1 = (instr >> 20) & 0x7;
1547 op2 = (instr >> 4) & 0xf;
1548 ArmRegister Rn(instr, 16);
1549 ArmRegister Rm(instr, 0);
1550 ArmRegister Rd(instr, 8);
1551 ArmRegister RdHi(instr, 8);
1552 ArmRegister RdLo(instr, 12);
1592 << StringPrintf(": %08x\t%-7s ", instr, opcode.str().c_str())
1598 uint16_t instr = ReadU16(instr_ptr);
1599 bool is_32bit = ((instr & 0xF000) == 0xF000) || ((instr & 0xF800) == 0xE800);
1605 uint16_t opcode1 = instr >> 10;
1608 uint16_t opcode2 = instr >> 9;
1615 uint16_t imm5 = (instr >> 6) & 0x1F;
1616 ThumbRegister rm(instr, 3);
1617 ThumbRegister Rd(instr, 0);
1633 uint16_t imm3_or_Rm = (instr >> 6) & 7;
1634 ThumbRegister Rn(instr, 3);
1635 ThumbRegister Rd(instr, 0);
1662 ThumbRegister Rn(instr, 8);
1663 uint16_t imm8 = instr & 0xFF;
1678 uint16_t opcode2 = (instr >> 6) & 0xF;
1679 ThumbRegister rm(instr, 3);
1680 ThumbRegister rdn(instr, 0);
1685 uint16_t opcode2 = (instr >> 6) & 0x0F;
1690 uint16_t DN = (instr >> 7) & 1;
1691 ArmRegister rm(instr, 3);
1692 uint16_t Rdn = instr & 7;
1701 uint16_t DN = (instr >> 7) & 1;
1702 ArmRegister rm(instr, 3);
1703 uint16_t Rdn = instr & 7;
1711 uint16_t N = (instr >> 7) & 1;
1712 ArmRegister rm(instr, 3);
1713 uint16_t Rn = instr & 7;
1722 ArmRegister rm(instr, 3);
1733 ThumbRegister Rt(instr, 8);
1734 uint16_t imm8 = instr & 0xFF;
1742 uint16_t opA = (instr >> 12) & 0xF;
1744 uint16_t opB = (instr >> 9) & 0x7;
1745 ThumbRegister Rm(instr, 6);
1746 ThumbRegister Rn(instr, 3);
1747 ThumbRegister Rt(instr, 0);
1760 uint16_t opB = (instr >> 11) & 1;
1761 ThumbRegister Rt(instr, 8);
1762 uint16_t imm8 = instr & 0xFF;
1766 uint16_t imm5 = (instr >> 6) & 0x1F;
1767 uint16_t opB = (instr >> 11) & 1;
1768 ThumbRegister Rn(instr, 3);
1769 ThumbRegister Rt(instr, 0);
1787 int8_t imm8 = instr & 0xFF;
1788 uint32_t cond = (instr >> 8) & 0xF;
1792 } else if ((instr & 0xF800) == 0xA800) {
1794 ThumbRegister rd(instr, 8);
1795 int imm8 = instr & 0xFF;
1798 } else if ((instr & 0xF000) == 0xB000) {
1800 uint16_t opcode2 = (instr >> 5) & 0x7F;
1805 int imm7 = instr & 0x7F;
1819 uint16_t op = (instr >> 11) & 1;
1820 uint16_t i = (instr >> 9) & 1;
1821 uint16_t imm5 = (instr >> 3) & 0x1F;
1822 ThumbRegister Rn(instr, 0);
1832 args << RegisterList((instr & 0xFF) | ((instr & 0x100) << 6));
1838 args << RegisterList((instr & 0xFF) | ((instr & 0x100) << 7));
1843 args << "#" << (instr & 0xFF);
1849 uint16_t op = (instr >> 6) & 3;
1851 ThumbRegister Rm(instr, 3);
1852 ThumbRegister Rd(instr, 0);
1859 uint16_t opA = (instr >> 4) & 0xF;
1860 uint16_t opB = instr & 0xF;
1899 } else if (((instr & 0xF000) == 0x5000) || ((instr & 0xE000) == 0x6000) ||
1900 ((instr & 0xE000) == 0x8000)) {
1902 uint16_t opA = instr >> 12;
1903 // uint16_t opB = (instr >> 9) & 7;
1908 uint16_t imm5 = (instr >> 6) & 0x1F;
1909 ThumbRegister Rn(instr, 3);
1910 ThumbRegister Rt(instr, 0);
1911 opcode << ((instr & 0x800) == 0 ? "str" : "ldr");
1918 uint16_t imm8 = instr & 0xFF;
1919 ThumbRegister Rt(instr, 8);
1920 opcode << ((instr & 0x800) == 0 ? "str" : "ldr");
1928 uint16_t imm11 = instr & 0x7FFF;
1942 << StringPrintf(": %04x \t%-7s ", instr, opcode.str().c_str())