Lines Matching defs:op
273 uint32_t op = (instruction >> 21) & 0xf;
274 opcode = kDataProcessingOperations[op];
275 bool implicit_s = ((op & ~3) == 8); // TST, TEQ, CMP, and CMN.
276 bool is_mov = op == 13U /* 0b1101 */ || op == 15U /* 0b1111 */;
516 // |111|01|00|op|0|WL| Rn | |
522 uint32_t op = (instr >> 23) & 3;
526 if (op == 1 || op == 2) {
527 if (op == 1) {
881 } else if ((op3 >> 4) == 2 && op4 == 0) { // 10xxxx, op = 0
937 // |1110|1110|1|D|11|0100| Vd |101|S|op|1|M|0| Vm | VCMP
938 // |1110|1110|1|D|11|0101| Vd |101|S|op|1|0|0|0000| VCMPE
939 // |1110|1110|1|D|11|op5 | Vd |101|S|op|1|M|0| Vm | VCVT
941 uint32_t op = (instr >> 7) & 1;
948 opcode << (op == 0 ? "vmov" : "vabs") << (S != 0 ? ".f64" : ".f32");
951 opcode << (op != 0 ? "vsqrt" : "vneg") << (S != 0 ? ".f64" : ".f32");
956 if (op != 0) {
962 if (op != 0) {
971 opcode << "vcvt" << (op == 0 ? "r" : "") << ".s32.f64";
975 opcode << "vcvt" << (op == 0 ? "r" : "") << ".s32.f32";
981 opcode << "vcvt" << (op == 0 ? "r" : "") << ".u32.f64";
985 opcode << "vcvt" << (op == 0 ? "r" : "") << ".u32.f32";
991 opcode << "vcvt.f64." << (op == 0 ? "u" : "s") << "32";
995 opcode << "vcvt.f32." << (op == 0 ? "u" : "s") << "32";
999 if (op == 1) {
1015 } else if ((op3 >> 4) == 2 && op4 == 1) { // 10xxxx, op = 1
1024 // |1110|1110|000|op| Vn | Rt |1010|N|00|1|0000|
1025 uint32_t op = op3 & 1;
1029 if (op) {
1819 uint16_t op = (instr >> 11) & 1;
1823 opcode << (op != 0 ? "cbnz" : "cbz");
1849 uint16_t op = (instr >> 6) & 3;
1850 opcode << kThumbReverseOperations[op];