Searched defs:ABI (Results 1 - 25 of 26) sorted by relevance

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/external/lldb/include/lldb/Target/
H A DABI.h1 //===-- ABI.h ---------------------------------------------------*- C++ -*-===//
23 class ABI : class in namespace:lldb_private
28 ~ABI();
59 // This is the method the ABI will call to actually calculate the return value.
60 // Don't put it in a persistant value object, that will be done by the ABI::GetReturnValueObject.
74 // Should return true if your ABI uses frames when doing stack backtraces. This
84 // the ABI, and false otherwise. This is used by the generic stack frame unwinding
98 // thumb, so any ARM ABI plug-ins would strip those bits.
128 // Classes that inherit from ABI can see and modify these
130 ABI();
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/external/lldb/source/Target/
H A DABI.cpp1 //===-- ABI.cpp -------------------------------------------------*- C++ -*-===//
10 #include "lldb/Target/ABI.h"
22 ABI::FindPlugin (const ArchSpec &arch)
43 ABI::ABI() function in class:ABI
50 ABI::~ABI()
56 ABI::GetRegisterInfoByName (const ConstString &name, RegisterInfo &info)
85 ABI::GetRegisterInfoByKind (RegisterKind reg_kind, uint32_t reg_num, RegisterInfo &info)
107 ABI
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/external/clang/include/clang/Basic/
H A DTargetOptions.h36 /// If given, the name of the target ABI to use.
37 std::string ABI; member in class:clang::TargetOptions
/external/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsABIInfo.h1 //===---- MipsABIInfo.h - Information about MIPS ABI's --------------------===//
26 enum class ABI { Unknown, O32, N32, N64, EABI }; class in class:llvm::MipsABIInfo
29 ABI ThisABI;
32 MipsABIInfo(ABI ThisABI) : ThisABI(ThisABI) {}
34 static MipsABIInfo Unknown() { return MipsABIInfo(ABI::Unknown); }
35 static MipsABIInfo O32() { return MipsABIInfo(ABI::O32); }
36 static MipsABIInfo N32() { return MipsABIInfo(ABI::N32); }
37 static MipsABIInfo N64() { return MipsABIInfo(ABI::N64); }
38 static MipsABIInfo EABI() { return MipsABIInfo(ABI::EABI); }
42 bool IsKnown() const { return ThisABI != ABI
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/external/llvm/lib/Target/Mips/
H A DMipsTargetMachine.h32 // Selected ABI
33 MipsABIInfo ABI; member in class:llvm::MipsTargetMachine
68 const MipsABIInfo &getABI() const { return ABI; }
H A DMipsISelLowering.h277 return ABI.IsN64() ? Mips::A0_64 : Mips::A0;
284 return ABI.IsN64() ? Mips::A1_64 : Mips::A1;
393 // Cache the ABI from the TargetMachine, we use it everywhere.
394 const MipsABIInfo &ABI; member in class:llvm::MipsTargetLowering
H A DMipsRegisterInfo.cpp54 MipsABIInfo ABI = MF.getSubtarget<MipsSubtarget>().getABI(); local
55 return ABI.ArePtrs64bit() ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;
301 // to that of the stack's alignment as specified by the ABI. As a result,
H A DMipsSERegisterInfo.cpp114 MipsABIInfo ABI = local
142 FrameReg = ABI.GetStackPtr();
145 FrameReg = ABI.GetBasePtr();
149 FrameReg = ABI.GetStackPtr();
183 ABI.ArePtrs64bit() ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;
189 BuildMI(MBB, II, DL, TII.get(ABI.GetPtrAddiuOp()), Reg)
207 BuildMI(MBB, II, DL, TII.get(ABI.GetPtrAdduOp()), Reg).addReg(FrameReg)
H A DMipsTargetStreamer.h105 ABI = P.getABI();
111 assert(ABI.hasValue() && "ABI hasn't been set!");
112 return *ABI;
116 llvm::Optional<MipsABIInfo> ABI; member in class:llvm::MipsTargetStreamer
H A DMipsLongBranch.cpp68 ABI(static_cast<const MipsTargetMachine &>(TM).getABI()) {}
88 MipsABIInfo ABI; member in class:__anon12666::MipsLongBranch
278 if (!ABI.IsN64()) {
456 !IsPIC ? 2 : (ABI.IsN64() ? 10 : (!STI.isTargetNaCl() ? 9 : 10));
H A DMipsTargetMachine.cpp51 MipsABIInfo ABI = MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions); local
62 if (!ABI.IsN64())
72 if (ABI.IsN64() || ABI.IsN32())
93 ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)),
H A DMipsSEFrameLowering.cpp264 /// expandBuildPairF64 does, for the case when ABI is fpxx and mthc1 is not
265 /// available and the case where the ABI is FP64A. It is implemented here
277 // The FP64A ABI (fp64 with nooddspreg) must also use a spill/reload sequence
316 /// expandExtractElementF64 does, for the case when ABI is fpxx and mfhc1 is not
317 /// available and the case where the ABI is FP64A. It is implemented here
338 // The FP64A ABI (fp64 with nooddspreg) must also use a spill/reload sequence
389 MipsABIInfo ABI = STI.getABI(); local
390 unsigned SP = ABI.GetStackPtr();
391 unsigned FP = ABI.GetFramePtr();
392 unsigned ZERO = ABI
678 MipsABIInfo ABI = STI.getABI(); local
760 MipsABIInfo ABI = STI.getABI(); local
847 MipsABIInfo ABI = STI.getABI(); local
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H A DMipsSEInstrInfo.cpp430 MipsABIInfo ABI = Subtarget.getABI(); local
432 unsigned ADDu = ABI.GetPtrAdduOp();
433 unsigned ADDiu = ABI.GetPtrAddiuOp();
638 // Otherwise, for O32 FPXX ABI:
687 MipsABIInfo ABI = Subtarget.getABI(); local
688 unsigned ADDU = ABI.GetPtrAdduOp();
H A DMipsAsmPrinter.cpp313 case MipsABIInfo::ABI::O32: return "abi32";
314 case MipsABIInfo::ABI::N32: return "abiN32";
315 case MipsABIInfo::ABI::N64: return "abi64";
316 case MipsABIInfo::ABI::EABI: return "eabi32"; // TODO: handle eabi64
317 default: llvm_unreachable("Unknown Mips ABI");
703 const MipsABIInfo &ABI = MTM.getABI(); local
708 // Ideally it should test for properties of the ABI and not the ABI
711 if (RM == Reloc::Static && !ABI.IsN64())
715 // Tell the assembler which ABI w
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H A DMipsSEISelDAGToDAG.cpp142 const MipsABIInfo &ABI = static_cast<const MipsTargetMachine &>(TM).getABI(); local
143 RC = (ABI.IsN64()) ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;
148 if (ABI.IsN64()) {
180 if (ABI.IsN32()) {
193 assert(ABI.IsO32());
195 // For O32 ABI, the following instruction sequence is emitted to initialize
/external/llvm/lib/Target/ARM/
H A DARMTargetMachine.cpp124 auto ABI = computeTargetABI(TT, CPU, Options); local
140 if (ABI != ARMBaseTargetMachine::ARM_ABI_APCS)
143 // We have 64 bits floats. The APCS ABI requires them to be aligned to 32
145 if (ABI == ARMBaseTargetMachine::ARM_ABI_APCS)
148 // We have 128 and 64 bit vectors. The APCS ABI aligns them to 32 bits, others
150 if (ABI == ARMBaseTargetMachine::ARM_ABI_APCS)
152 else if (ABI != ARMBaseTargetMachine::ARM_ABI_AAPCS16)
164 if (TT.isOSNaCl() || ABI == ARMBaseTargetMachine::ARM_ABI_AAPCS16)
166 else if (ABI == ARMBaseTargetMachine::ARM_ABI_AAPCS)
187 // Default to triple-appropriate float ABI
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/external/llvm/lib/Analysis/
H A DDemandedBits.cpp347 auto ABI = AliveBits.find(I); local
348 if (ABI != AliveBits.end())
349 ABPrev = ABI->second;
352 if (ABNew != ABPrev || ABI == AliveBits.end()) {
/external/deqp/android/cts/runner/tests/src/com/drawelements/deqp/runner/
H A DDeqpTestRunnerTest.java61 private static final IAbi ABI = new Abi("armeabi-v7a", "32"); field in class:DeqpTestRunnerTest
172 runner.setAbi(ABI);
179 return AbiUtils.createId(ABI.getName(), runner.getPackageName());
248 EasyMock.eq(AbiUtils.createAbiFlag(ABI.getName()))))
313 AbiUtils.createAbiFlag(ABI.getName()), commandLine,
387 EasyMock.eq(true), EasyMock.eq(AbiUtils.createAbiFlag(ABI.getName()))))
553 EasyMock.eq(true), EasyMock.eq(AbiUtils.createAbiFlag(ABI.getName()))))
669 EasyMock.eq(true), EasyMock.eq(AbiUtils.createAbiFlag(ABI.getName()))))
899 EasyMock.eq(true), EasyMock.eq(AbiUtils.createAbiFlag(ABI.getName()))))
991 EasyMock.eq(AbiUtils.createAbiFlag(ABI
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/external/clang/lib/CodeGen/
H A DCodeGenModule.h26 #include "clang/Basic/ABI.h"
268 std::unique_ptr<CGCXXABI> ABI; member in class:clang::CodeGen::CodeGenModule
611 CGCXXABI &getCXXABI() const { return *ABI; }
808 // to apply any ABI rules about which other constructors/destructors
939 /// info. This applies attributes necessary for handling the ABI as well as
H A DTargetInfo.cpp11 // definition used to handle ABI compliancy.
376 // C++ record fields are never empty, at least in the Itanium ABI.
379 // current ABI.
551 /// DefaultABIInfo - The default implementation for ABI specific
554 /// conform to any particular ABI.
620 // WebAssembly ABI Implementation
622 // This is a very simple ABI that relies a lot on DefaultABIInfo.
694 // le32/PNaCl bitcode ABI Implementation
696 // This is a simplified version of the x86_32 ABI. Arguments and return values
753 // In the PNaCl ABI w
7581 StringRef ABI = getTarget().getABI(); local
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H A DItaniumCXXABI.cpp10 // This provides C++ code generation targeting the Itanium C++ ABI. The class
11 // in this file generates structures that follow the Itanium C++ ABI, which is
16 // It also supports the closely-related ARM ABI, documented at:
73 // The Itanium ABI has separate complete-object vs. base-object
99 llvm_unreachable("closure ctors in Itanium ABI?");
160 /// which is a 64-bit platform. Classically, the ABI doesn't really
343 /// Returns true if the ABI requires RTTI type_info objects to be unique
365 /// the current ABI.
494 llvm_unreachable("Microsoft ABI is not Itanium-based");
496 llvm_unreachable("bad ABI kin
2389 ItaniumRTTIBuilder(const ItaniumCXXABI &ABI) argument
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H A DMicrosoftCXXABI.cpp10 // This provides C++ code generation targeting the Microsoft Visual C++ ABI.
12 // Visual C++ ABI, which is actually not very well documented at all outside
61 // The Microsoft ABI doesn't use separate complete-object vs.
208 /// Non-base dtors should be emitted as delegating thunks in this ABI.
300 "Only deleting destructor thunks are available in this ABI");
821 // multiple x64 calling conventions and the C++ ABI code shouldn't dictate
893 // In the MS ABI, the runtime handles the copy, and the catch handler is
1097 // Otherwise, use the C ABI rules.
1190 // There's only one constructor type in this ABI.
1402 // In this ABI, ever
3395 MSRTTIBuilder(MicrosoftCXXABI &ABI, const CXXRecordDecl *RD) argument
3413 MicrosoftCXXABI &ABI; member in struct:__anon1342::MSRTTIBuilder
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/external/clang/lib/AST/
H A DRecordLayoutBuilder.cpp844 // Under the Itanium ABI, if there is no non-virtual primary base class,
1377 // Itanium C++ ABI 2.4:
1452 // The struct-layout algorithm is dictated by the platform ABI,
1455 // in the System V generic ABI. The basic bitfield layout rule in
1465 // platform ABI's struct-layout algorithm, with the high-level goal
1472 // Since it completely replaces the platform ABI's algorithm,
1984 // this doesn't affect the ABI.)
1988 // Template instantiations don't have key functions per Itanium C++ ABI 5.2.6.
2061 /// Does the target C++ ABI require us to skip over the tail-padding
2064 static bool mustSkipTailPadding(TargetCXXABI ABI, cons argument
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/external/clang/include/clang/AST/
H A DASTContext.h428 /// \brief The current C++ ABI.
429 std::unique_ptr<CXXABI> ABI; member in class:clang::ASTContext
1807 /// \brief Return the ABI-specified alignment of a (complete) type \p T, in
1812 /// \brief Return the ABI-specified alignment of a (complete) type \p T, in
1832 /// This can be different than the ABI alignment in cases where it is
1883 /// The key function is, according to the Itanium C++ ABI section 5.2.3:
1887 /// Other ABIs use the same idea. However, the ARM C++ ABI ignores
/external/clang/lib/Driver/
H A DTools.cpp639 // Select the float ABI as determined by -msoft-float, -mhard-float, and
645 arm::FloatABI ABI = FloatABI::Invalid; local
650 ABI = FloatABI::Soft;
652 ABI = FloatABI::Hard;
654 ABI = llvm::StringSwitch<arm::FloatABI>(A->getValue())
659 if (ABI == FloatABI::Invalid && !StringRef(A->getValue()).empty()) {
661 ABI = FloatABI::Soft;
665 // It is incorrect to select hard float ABI on MachO platforms if the ABI is
668 ABI
744 arm::FloatABI ABI = arm::getARMFloatABI(TC, Args); local
971 arm::FloatABI ABI = arm::getARMFloatABI(getToolChain(), Args); local
1164 getGnuCompatibleMipsABIName(StringRef ABI) argument
1174 mips::FloatABI ABI = mips::FloatABI::Invalid; local
1302 mips::FloatABI ABI = getMipsFloatABI(D, Args); local
1444 ppc::FloatABI ABI = ppc::FloatABI::Invalid; local
7803 arm::FloatABI ABI = arm::getARMFloatABI(getToolChain(), Args); local
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