Searched defs:Intr (Results 1 - 7 of 7) sorted by relevance

/external/llvm/lib/Target/Hexagon/
H A DHexagonOptimizeSZextends.cpp121 Value *Intr = Shl->getOperand(0); local
129 if (IntrinsicInst *I = dyn_cast<IntrinsicInst>(Intr)) {
/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUPromoteAlloca.cpp376 IntrinsicInst *Intr = dyn_cast<IntrinsicInst>(Call); local
377 if (!Intr) {
393 Builder.SetInsertPoint(Intr);
394 switch (Intr->getIntrinsicID()) {
398 Intr->eraseFromParent();
401 MemCpyInst *MemCpy = cast<MemCpyInst>(Intr);
405 Intr->eraseFromParent();
409 MemSetInst *MemSet = cast<MemSetInst>(Intr);
413 Intr->eraseFromParent();
417 Intr
[all...]
H A DSIISelLowering.cpp1031 SDNode *Intr = BRCOND.getOperand(1).getNode(); local
1035 if (Intr->getOpcode() == ISD::SETCC) {
1037 SDNode *SetCC = Intr;
1041 Intr = SetCC->getOperand(0).getNode();
1049 assert(Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN);
1052 ArrayRef<EVT> Res(Intr->value_begin() + 1, Intr->value_end());
1057 Ops.append(Intr->op_begin() + 1, Intr->op_end());
1079 for (unsigned i = 1, e = Intr
[all...]
/external/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1420 SDValue Intr = DAG.getNode(Opcode, SDLoc(Op), RawVTs, Ops); local
1422 SDValue NewChain = SDValue(Intr.getNode(), 0);
1424 return Intr;
/external/clang/utils/TableGen/
H A DNeonEmitter.cpp469 Intrinsic &Intr; member in class:__anon3268::Intrinsic::DagEmitter
473 DagEmitter(Intrinsic &Intr, StringRef CallPrefix) : argument
474 Intr(Intr), CallPrefix(CallPrefix) {
1495 Intrinsic &Callee = Intr.Emitter.getIntrinsic(N, Types);
1499 Intr.Dependencies.insert(&Callee);
1529 assert_with_loc(Intr.Variables.find(DI->getArgName(ArgIdx)) !=
1530 Intr.Variables.end(),
1532 castToType = Intr.Variables[DI->getArgName(ArgIdx)].getType();
1538 castToType = Intr
[all...]
/external/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp2172 static SDValue lowerMSALoadIntr(SDValue Op, SelectionDAG &DAG, unsigned Intr) { argument
2188 unsigned Intr = cast<ConstantSDNode>(Op->getOperand(1))->getZExtValue(); local
2189 switch (Intr) {
2236 return lowerMSALoadIntr(Op, DAG, Intr);
2240 static SDValue lowerMSAStoreIntr(SDValue Op, SelectionDAG &DAG, unsigned Intr) { argument
2256 unsigned Intr = cast<ConstantSDNode>(Op->getOperand(1))->getZExtValue(); local
2257 switch (Intr) {
2264 return lowerMSAStoreIntr(Op, DAG, Intr);
/external/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp10322 Intrinsic::ID Intr, IntrLD, IntrPerm; local
10325 Intr = isLittleEndian ? Intrinsic::ppc_altivec_lvsr :
10333 Intr = MemVT == MVT::v4f64 ? Intrinsic::ppc_qpx_qvlpcld :
10343 SDValue PermCntl = BuildIntrinsicOp(Intr, Ptr, DAG, dl, PermCntlTy);
10429 Intrinsic::ID Intr = (isLittleEndian ? Intrinsic::ppc_altivec_lvsr local
10431 if ((IID == Intr ||

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