Searched defs:LR (Results 1 - 25 of 56) sorted by relevance

123

/external/clang/test/PCH/
H A Dcxx-reference.h3 typedef char (&LR); typedef
10 LR &lrlr = c;
11 LR &&rrlr = c;
/external/llvm/include/llvm/ExecutionEngine/Orc/
H A DLambdaResolver.h54 typedef LambdaResolver<ExternalLookupFtorT, DylibLookupFtorT> LR; typedef
55 return make_unique<LR>(std::move(ExternalLookupFtor),
/external/valgrind/coregrind/m_dispatch/
H A Ddispatch-s390x-linux.S54 #undef LR
55 #define LR S390_REGNO_LINK_REGISTER define
172 br LR
/external/clang/lib/StaticAnalyzer/Checkers/
H A DPointerArithChecker.cpp44 const MemRegion *LR = LV.getAsRegion(); local
46 if (!LR || !RV.isConstant())
51 if (isa<VarRegion>(LR) || isa<CodeTextRegion>(LR) ||
52 isa<CompoundLiteralRegion>(LR)) {
H A DPointerSubChecker.cpp47 const MemRegion *LR = LV.getAsRegion(); local
50 if (!(LR && RR))
53 const MemRegion *BaseLR = LR->getBaseRegion();
/external/llvm/include/llvm/CodeGen/
H A DLivePhysRegs.h140 inline raw_ostream &operator<<(raw_ostream &OS, const LivePhysRegs& LR) { argument
141 LR.print(OS);
H A DLiveIntervalAnalysis.h175 void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices);
178 /// If @p LR has a live value at @p Kill, prune its live range by removing
185 void pruneValue(LiveRange &LR, SlotIndex Kill,
222 bool isLiveInToMBB(const LiveRange &LR, argument
224 return LR.liveAt(getMBBStartIdx(mbb));
227 bool isLiveOutOfMBB(const LiveRange &LR, argument
229 return LR.liveAt(getMBBEndIdx(mbb).getPrevSlot());
376 LiveRange *LR = RegUnitRanges[Unit]; local
377 if (!LR) {
380 RegUnitRanges[Unit] = LR
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/external/llvm/lib/CodeGen/
H A DLiveRangeCalc.h80 LiveRange &LR; member in struct:llvm::LiveRangeCalc::LiveInBlock
94 LiveInBlock(LiveRange &LR, MachineDomTreeNode *node, SlotIndex kill) argument
95 : LR(LR), DomNode(node), Kill(kill), Value(nullptr) {}
104 /// Assuming that @p LR is live-in to @p UseMBB, find the set of defs that can
108 /// are added to @p LR, and the function returns true.
110 /// If multiple values can reach @p UseMBB, the blocks that need @p LR to be
114 bool findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB,
128 /// Extend the live range of @p LR to reach all uses of Reg.
132 void extendToUses(LiveRange &LR, unsigne
183 extendToUses(LiveRange &LR, unsigned PhysReg) argument
225 addLiveInBlock(LiveRange &LR, MachineDomTreeNode *DomNode, SlotIndex Kill = SlotIndex()) argument
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H A DInterferenceCache.cpp226 LiveRange *LR = RegUnits[i].Fixed; local
227 if (I == LR->end() || I->start >= Stop)
229 I = LR->advanceTo(I, Stop);
230 bool Backup = I == LR->end() || I->start >= Stop;
H A DExecutionDepsFix.cpp652 const LiveReg &LR = LiveRegs[rx]; local
654 if (!LR.Value->getCommonDomains(available)) {
662 if (LR.Def < i->Def) {
664 Regs.insert(i, LR);
668 Regs.push_back(LR);
H A DLiveInterval.cpp52 LiveRange *LR; member in class:__anon12212::CalcLiveRangeUtilBase
55 CalcLiveRangeUtilBase(LiveRange *LR) : LR(LR) {} argument
66 VNInfo *VNI = LR->getNextValue(Def, VNInfoAllocator);
86 VNInfo *VNI = LR->getNextValue(Def, VNInfoAllocator);
239 CalcLiveRangeUtilVector(LiveRange *LR) : CalcLiveRangeUtilVectorBase(LR) {} argument
244 LiveRange::Segments &segmentsColl() { return LR->segments; }
246 void insertAtEnd(const Segment &S) { LR
267 CalcLiveRangeUtilSet(LiveRange *LR) argument
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H A DLiveRangeCalc.cpp44 LiveRange &LR, const MachineOperand &MO) {
49 // Create the def in LR. This may find an existing def.
50 LR.createDeadDef(DefIdx, Alloc);
131 void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) { argument
135 // LR.createDeadDef() will deduplicate.
137 createDeadDef(*Indexes, *Alloc, LR, MO);
141 void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg, argument
192 extend(LR, UseIdx, Reg);
216 Updater.setDest(&I.LR);
223 void LiveRangeCalc::extend(LiveRange &LR, SlotInde argument
43 createDeadDef(SlotIndexes &Indexes, VNInfo::Allocator &Alloc, LiveRange &LR, const MachineOperand &MO) argument
258 findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB, SlotIndex Use, unsigned PhysReg) argument
438 LiveRange &LR = I.LR; local
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H A DRegAllocFast.cpp233 void RAFast::addKillFlag(const LiveReg &LR) { argument
234 if (!LR.LastUse) return;
235 MachineOperand &MO = LR.LastUse->getOperand(LR.LastOpNum);
236 if (MO.isUse() && !LR.LastUse->isRegTiedToDefOperand(LR.LastOpNum)) {
237 if (MO.getReg() == LR.PhysReg)
240 LR.LastUse->addRegisterKilled(LR.PhysReg, TRI, true);
277 LiveReg &LR local
498 assignVirtToPhysReg(LiveReg &LR, unsigned PhysReg) argument
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H A DLiveDebugVariables.cpp227 /// @param LR Restrict liveness to where LR has the value VNI. May be null.
228 /// @param VNI When LR is not null, this is the value to restrict to.
233 LiveRange *LR, const VNInfo *VNI,
539 void UserValue::extendDef(SlotIndex Idx, unsigned LocNo, LiveRange *LR, argument
550 if (LR && VNI) {
551 LiveInterval::Segment *Segment = LR->getSegmentContaining(Start);
694 LiveRange *LR = &LIS.getRegUnit(Unit); local
695 const VNInfo *VNI = LR->getVNInfoAt(Idx);
697 extendDef(Idx, LocNo, LR, VN
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H A DLiveIntervalAnalysis.cpp159 if (LiveRange *LR = RegUnitRanges[i])
160 OS << PrintRegUnit(i, TRI) << ' ' << *LR << '\n';
269 void LiveIntervals::computeRegUnitRange(LiveRange &LR, unsigned Unit) { argument
282 LRCalc->createDeadDefs(LR, *Supers);
286 // Now extend LR to reach all uses.
293 LRCalc->extendToUses(LR, Reg);
299 LR.flushSegmentSet();
329 LiveRange *LR = RegUnitRanges[Unit]; local
330 if (!LR) {
332 LR
352 createSegmentsForValues(LiveRange &LR, iterator_range<LiveInterval::vni_iterator> VNIs) argument
364 extendSegmentsToUses(LiveRange &LR, const SlotIndexes &Indexes, ShrinkToUsesWorkList &WorkList, const LiveRange &OldRange) argument
597 extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices) argument
605 pruneValue(LiveRange &LR, SlotIndex Kill, SmallVectorImpl<SlotIndex> *EndPoints) argument
1001 updateRange(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) argument
1043 handleMoveDown(LiveRange &LR) argument
1131 handleMoveUp(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) argument
1284 repairOldRegInRange(const MachineBasicBlock::iterator Begin, const MachineBasicBlock::iterator End, const SlotIndex endIdx, LiveRange &LR, const unsigned Reg, LaneBitmask LaneMask) argument
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H A DRegisterPressure.cpp406 const LiveRange *LR = getLiveRange(LIS, Reg); local
407 if (LR != nullptr) {
408 LiveQueryResult LRQ = LR->Query(SlotIdx);
569 const LiveRange *LR = getLiveRange(*LIS, Reg); local
570 if (LR) {
571 LiveQueryResult LRQ = LR->Query(SlotIdx);
621 const LiveRange *LR = getLiveRange(*LIS, Reg); local
622 lastUse = LR && LR->Query(SlotIdx).isKill();
932 const LiveRange *LR local
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H A DSplitKit.cpp846 LiveRange &LR = LIS.getInterval(Edit->get(RegIdx)); local
852 LR.addSegment(LiveInterval::Segment(Start, End, VNI));
876 VNInfo *VNI = LR.extendInBlock(BlockStart, std::min(BlockEnd, End));
896 VNInfo *VNI = LR.extendInBlock(BlockStart, std::min(BlockEnd, End));
904 LRC.addLiveInBlock(LR, MDT[&*MBB], End);
907 LRC.addLiveInBlock(LR, MDT[&*MBB]);
932 LiveRange &LR = LIS.getInterval(Edit->get(RegIdx)); local
944 LRC.extend(LR, End);
/external/llvm/lib/Support/
H A DScaledNumber.cpp27 uint64_t UL = getU(LHS), LL = getL(LHS), UR = getU(RHS), LR = getL(RHS); local
30 uint64_t P1 = UL * UR, P2 = UL * LR, P3 = LL * UR, P4 = LL * LR;
/external/nist-sip/java/gov/nist/javax/sip/address/
H A DNetObject.java61 protected static final String LR = "lr"; field in class:NetObject
/external/llvm/lib/Fuzzer/
H A DFuzzerTraceState.cpp156 LabelRange &Join(LabelRange LR) { argument
157 return *this = Join(*this, LR);
219 LabelRange &LR = LabelRanges[L]; local
220 if (LR.Beg < LR.End || L == 0)
221 return LR;
224 return LR = LabelRange::Join(GetLabelRange(LI->l1), GetLabelRange(LI->l2));
225 return LR = LabelRange::Singleton(LI);
248 LabelRange LR = L1 ? GetLabelRange(L1) : GetLabelRange(L2); local
250 for (size_t Pos = LR
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/external/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp239 if (HasFP && (FramePtr == Reg || Reg == AArch64::LR)) {
483 // Record the location of the stored LR
484 unsigned LR = RegInfo->getDwarfRegNum(AArch64::LR, true); local
486 MCCFIInstruction::createOffset(nullptr, LR, StackGrowth));
717 if (Reg != AArch64::LR)
720 // LR maybe referred to later by an @llvm.returnaddress intrinsic.
721 bool LRLiveIn = MF.getRegInfo().isLiveIn(AArch64::LR);
889 SavedRegs.set(AArch64::LR);
948 assert(((OddReg == AArch64::LR
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/external/llvm/lib/Transforms/InstCombine/
H A DInstCombineVectorOps.cpp399 ShuffleOps LR = collectShuffleElements(VecOp, Mask, RHS); local
400 assert(LR.second == nullptr || LR.second == RHS);
402 if (LR.first->getType() != RHS->getType()) {
414 return std::make_pair(LR.first, RHS);
515 ShuffleOps LR = collectShuffleElements(&IE, Mask, nullptr); local
519 if (LR.first != &IE && LR.second != &IE) {
521 if (LR.second == nullptr)
522 LR
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/external/cblas/testing/
H A Dc_cblat2.f2583 LOGICAL FUNCTION LCE( RI, RJ, LR )
2594 INTEGER LR local in function:LCE
2600 DO 10 I = 1, LR
H A Dc_cblat3.f812 DATA ICHS/'LR'/, ICHU/'UL'/
1134 DATA ICHU/'UL'/, ICHT/'NTC'/, ICHD/'UN'/, ICHS/'LR'/
2620 LOGICAL FUNCTION LCE( RI, RJ, LR )
2633 INTEGER LR local in function:LCE
2639 DO 10 I = 1, LR
H A Dc_dblat2.f2756 LOGICAL FUNCTION LDE( RI, RJ, LR )
2767 INTEGER LR local in function:LDE
2773 DO 10 I = 1, LR

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