Searched defs:ST (Results 1 - 25 of 124) sorted by relevance

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/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUMCInstLower.h23 const AMDGPUSubtarget &ST; member in class:llvm::AMDGPUMCInstLower
26 AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &ST);
H A DAMDGPUTargetTransformInfo.h33 const AMDGPUSubtarget *ST; member in class:llvm::AMDGPUTTIImpl
36 const AMDGPUSubtarget *getST() const { return ST; }
41 : BaseT(TM, DL), ST(TM->getSubtargetImpl()),
42 TLI(ST->getTargetLowering()) {}
46 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
48 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
57 return ST->hasBCNT(TyWidth) ? TTI::PSK_FastHardware : TTI::PSK_Software;
H A DAMDGPUInstrInfo.h45 const AMDGPUSubtarget &ST; member in class:llvm::AMDGPUInstrInfo
H A DSIMachineFunctionInfo.cpp72 const AMDGPUSubtarget &ST = MF.getSubtarget<AMDGPUSubtarget>(); local
92 bool MaySpill = ST.isVGPRSpillingEnabled(this);
98 if (ST.isAmdHsaOS()) {
176 const AMDGPUSubtarget &ST = MF.getSubtarget<AMDGPUSubtarget>(); local
179 return getShaderType() == ShaderType::COMPUTE ? 256 : ST.getWavefrontSize();
/external/clang/test/CodeGenCXX/
H A Dreference-in-block-args.cpp6 struct ST { struct
11 void OUTER_BLOCK(void (^fixer)(ST& ref)) {
12 ST ref = {2, 100};
21 OUTER_BLOCK(^(ST &ref) {
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDILSIDevice.cpp16 AMDGPUSIDevice::AMDGPUSIDevice(AMDGPUSubtarget *ST) argument
17 : AMDGPUEvergreenDevice(ST)
H A DAMDILNIDevice.cpp15 AMDGPUNIDevice::AMDGPUNIDevice(AMDGPUSubtarget *ST) argument
16 : AMDGPUEvergreenDevice(ST)
18 std::string name = ST->getDeviceName();
50 AMDGPUCaymanDevice::AMDGPUCaymanDevice(AMDGPUSubtarget *ST) argument
51 : AMDGPUNIDevice(ST)
H A DAMDIL7XXDevice.cpp15 AMDGPU7XXDevice::AMDGPU7XXDevice(AMDGPUSubtarget *ST) : AMDGPUDevice(ST) argument
92 AMDGPU770Device::AMDGPU770Device(AMDGPUSubtarget *ST): AMDGPU7XXDevice(ST) argument
118 AMDGPU710Device::AMDGPU710Device(AMDGPUSubtarget *ST) : AMDGPU7XXDevice(ST) argument
H A DAMDILDevice.cpp14 AMDGPUDevice::AMDGPUDevice(AMDGPUSubtarget *ST) : mSTM(ST) argument
/external/clang/test/OpenMP/
H A Dthreadprivate_ast_print.cpp36 struct ST { struct
44 v = ST<T>::m;
H A Dparallel_copyin_messages.cpp38 class ST { class
70 #pragma omp parallel copyin(ST<int>::s) // expected-error {{copyin variable must be threadprivate}}
H A Dparallel_for_copyin_messages.cpp42 class ST { class
96 #pragma omp parallel for copyin(ST<int>::s, B::x) // expected-error {{copyin variable must be threadprivate}}
H A Dparallel_for_simd_copyin_messages.cpp42 class ST { class
96 #pragma omp parallel for simd copyin(ST < int > ::s, B::x) // expected-error {{copyin variable must be threadprivate}}
H A Dparallel_sections_copyin_messages.cpp42 class ST { class
107 #pragma omp parallel sections copyin(ST < int > ::s, B::x) // expected-error {{copyin variable must be threadprivate}}
/external/llvm/lib/Target/Hexagon/
H A DHexagonTargetTransformInfo.h32 const HexagonSubtarget *ST; member in class:llvm::HexagonTTIImpl
35 const HexagonSubtarget *getST() const { return ST; }
40 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
41 TLI(ST->getTargetLowering()) {}
45 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
47 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
/external/llvm/lib/Target/Mips/
H A DMipsFrameLowering.cpp85 const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) { argument
86 if (ST.inMips16Mode())
87 return llvm::createMips16FrameLowering(ST);
89 return llvm::createMipsSEFrameLowering(ST);
/external/llvm/lib/Target/NVPTX/
H A DNVPTXTargetTransformInfo.h33 const NVPTXSubtarget *ST; member in class:llvm::NVPTXTTIImpl
36 const NVPTXSubtarget *getST() const { return ST; };
41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl()),
42 TLI(ST->getTargetLowering()) {}
46 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
48 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
/external/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.h33 const PPCSubtarget *ST; member in class:llvm::PPCTTIImpl
36 const PPCSubtarget *getST() const { return ST; }
41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
42 TLI(ST->getTargetLowering()) {}
46 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
48 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
/external/llvm/lib/Target/SystemZ/
H A DSystemZTargetTransformInfo.h24 const SystemZSubtarget *ST; member in class:llvm::SystemZTTIImpl
27 const SystemZSubtarget *getST() const { return ST; }
32 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
33 TLI(ST->getTargetLowering()) {}
37 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
39 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
/external/llvm/lib/Target/WebAssembly/
H A DWebAssemblyTargetTransformInfo.h34 const WebAssemblySubtarget *ST; member in class:llvm::final
37 const WebAssemblySubtarget *getST() const { return ST; }
42 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
43 TLI(ST->getTargetLowering()) {}
47 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
49 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
/external/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.h33 const X86Subtarget *ST; member in class:llvm::X86TTIImpl
38 const X86Subtarget *getST() const { return ST; }
43 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
44 TLI(ST->getTargetLowering()) {}
48 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
50 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
/external/llvm/lib/Target/XCore/
H A DXCoreTargetTransformInfo.h33 const XCoreSubtarget *ST; member in class:llvm::XCoreTTIImpl
36 const XCoreSubtarget *getST() const { return ST; }
41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl()),
42 TLI(ST->getTargetLowering()) {}
46 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
48 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
/external/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.h33 const ARMSubtarget *ST; member in class:llvm::ARMTTIImpl
40 const ARMSubtarget *getST() const { return ST; }
45 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
46 TLI(ST->getTargetLowering()) {}
50 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
52 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
70 if (ST->hasNEON())
75 if (ST
[all...]
/external/llvm/lib/Target/AArch64/
H A DAArch64StorePairSuppress.cpp118 const TargetSubtargetInfo &ST = MF.getSubtarget(); local
119 TII = static_cast<const AArch64InstrInfo *>(ST.getInstrInfo());
120 TRI = ST.getRegisterInfo();
122 SchedModel.init(ST.getSchedModel(), &ST, TII);
H A DAArch64TargetTransformInfo.h34 const AArch64Subtarget *ST; member in class:llvm::AArch64TTIImpl
41 const AArch64Subtarget *getST() const { return ST; }
52 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
53 TLI(ST->getTargetLowering()) {}
57 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
59 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
82 if (ST->hasNEON())
91 if (ST
[all...]

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