| /art/compiler/utils/arm/ |
| H A D | assembler_thumb2.h | 71 virtual void and_(Register rd, Register rn, const ShifterOperand& so,
74 virtual void eor(Register rd, Register rn, const ShifterOperand& so,
77 virtual void sub(Register rd, Register rn, const ShifterOperand& so,
80 virtual void rsb(Register rd, Register rn, const ShifterOperand& so,
83 virtual void add(Register rd, Register rn, const ShifterOperand& so,
86 virtual void adc(Register rd, Register rn, const ShifterOperand& so,
89 virtual void sbc(Register rd, Register rn, const ShifterOperand& so,
92 virtual void rsc(Register rd, Register rn, const ShifterOperand& so,
95 void tst(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
97 void teq(Register rn, cons
482 CompareAndBranch(uint32_t location, Register rn, Condition cond) argument
613 Fixup(Register rn, Register rt2, SRegister sd, DRegister dd, Condition cond, Type type, Size size, uint32_t location) argument
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| H A D | assembler_arm.h | 271 Address(Register rn, int32_t offset = 0, Mode am = Offset) : rn_(rn), rm_(R0), argument
276 Address(Register rn, Register rm, Mode am = Offset) : rn_(rn), rm_(rm), offset_(0), argument
281 Address(Register rn, Register rm, Shift shift, uint32_t count, Mode am = Offset) : argument
282 rn_(rn), rm_(rm), offset_(count),
444 virtual void and_(Register rd, Register rn, const ShifterOperand& so,
447 virtual void ands(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) { argument
448 and_(rd, rn, so, cond, kCcSet);
451 virtual void eor(Register rd, Register rn, cons
454 eors(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) argument
461 subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) argument
468 rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) argument
475 adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) argument
482 adcs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) argument
489 sbcs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) argument
496 rscs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) argument
513 orrs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) argument
520 orns(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) argument
534 bics(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) argument
727 AddConstantSetFlags(Register rd, Register rn, int32_t value, Condition cond = AL) argument
857 Lsls(Register rd, Register rm, Register rn, Condition cond = AL) argument
864 Lsrs(Register rd, Register rm, Register rn, Condition cond = AL) argument
871 Asrs(Register rd, Register rm, Register rn, Condition cond = AL) argument
878 Rors(Register rd, Register rm, Register rn, Condition cond = AL) argument
890 ShifterOperandCanHold(Register rd, Register rn, Opcode opcode, uint32_t immediate, ShifterOperand* shifter_op) argument
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| H A D | assembler_arm32.cc | 57 Register rn ATTRIBUTE_UNUSED,
65 void Arm32Assembler::and_(Register rd, Register rn, const ShifterOperand& so, argument
67 EmitType01(cond, so.type(), AND, set_cc, rn, rd, so);
71 void Arm32Assembler::eor(Register rd, Register rn, const ShifterOperand& so, argument
73 EmitType01(cond, so.type(), EOR, set_cc, rn, rd, so);
77 void Arm32Assembler::sub(Register rd, Register rn, const ShifterOperand& so, argument
79 EmitType01(cond, so.type(), SUB, set_cc, rn, rd, so);
82 void Arm32Assembler::rsb(Register rd, Register rn, const ShifterOperand& so, argument
84 EmitType01(cond, so.type(), RSB, set_cc, rn, rd, so);
87 void Arm32Assembler::add(Register rd, Register rn, cons argument
93 adc(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
99 sbc(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
105 rsc(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
111 tst(Register rn, const ShifterOperand& so, Condition cond) argument
117 teq(Register rn, const ShifterOperand& so, Condition cond) argument
123 cmp(Register rn, const ShifterOperand& so, Condition cond) argument
128 cmn(Register rn, const ShifterOperand& so, Condition cond) argument
133 orr(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
154 bic(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
166 mul(Register rd, Register rn, Register rm, Condition cond) argument
172 mla(Register rd, Register rn, Register rm, Register ra, Condition cond) argument
179 mls(Register rd, Register rn, Register rm, Register ra, Condition cond) argument
186 smull(Register rd_lo, Register rd_hi, Register rn, Register rm, Condition cond) argument
193 umull(Register rd_lo, Register rd_hi, Register rn, Register rm, Condition cond) argument
200 sdiv(Register rd, Register rn, Register rm, Condition cond) argument
216 udiv(Register rd, Register rn, Register rm, Condition cond) argument
232 sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond) argument
251 ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond) argument
573 EmitType01(Condition cond, int type, Opcode opcode, SetCc set_cc, Register rn, Register rd, const ShifterOperand& so) argument
811 EmitMulOp(Condition cond, int32_t opcode, Register rd, Register rn, Register rm, Register rs) argument
830 ldrex(Register rt, Register rn, Condition cond) argument
845 ldrexd(Register rt, Register rt2, Register rn, Condition cond) argument
864 strex(Register rd, Register rt, Register rn, Condition cond) argument
882 strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond) argument
1235 Lsl(Register rd, Register rm, Register rn, Condition cond, SetCc set_cc) argument
1241 Lsr(Register rd, Register rm, Register rn, Condition cond, SetCc set_cc) argument
1247 Asr(Register rd, Register rm, Register rn, Condition cond, SetCc set_cc) argument
1253 Ror(Register rd, Register rm, Register rn, Condition cond, SetCc set_cc) argument
1398 AddConstant(Register rd, Register rn, int32_t value, Condition cond, SetCc set_cc) argument
1433 CmpConstant(Register rn, int32_t value, Condition cond) argument
[all...] |
| H A D | assembler_thumb2.cc | 361 inline int16_t Thumb2Assembler::CbxzEncoding16(Register rn, int32_t offset, Condition cond) { argument
362 DCHECK(!IsHighRegister(rn));
366 return B15 | B13 | B12 | B8 | (cond == NE ? B11 : 0) | static_cast<int32_t>(rn) |
371 inline int16_t Thumb2Assembler::CmpRnImm8Encoding16(Register rn, int32_t value) { argument
372 DCHECK(!IsHighRegister(rn));
374 return B13 | B11 | (rn << 8) | value;
378 // The high bit of rn is moved across 4-bit rm.
418 inline int32_t Thumb2Assembler::LdrdEncoding32(Register rt, Register rt2, Register rn, int32_t offset) { argument
423 (static_cast<int32_t>(rn) << 16) | (static_cast<int32_t>(rt) << 12) |
427 inline int32_t Thumb2Assembler::VldrsEncoding32(SRegister sd, Register rn, int32_ argument
438 VldrdEncoding32(DRegister dd, Register rn, int32_t offset) argument
449 LdrRtRnImm5Encoding16(Register rt, Register rn, int32_t offset) argument
473 LdrRtRnImm12Encoding(Register rt, Register rn, int32_t offset) argument
542 and_(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
548 eor(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
554 sub(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
560 rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
566 add(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
572 adc(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
578 sbc(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
584 rsc(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
590 tst(Register rn, const ShifterOperand& so, Condition cond) argument
596 teq(Register rn, const ShifterOperand& so, Condition cond) argument
602 cmp(Register rn, const ShifterOperand& so, Condition cond) argument
607 cmn(Register rn, const ShifterOperand& so, Condition cond) argument
612 orr(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
618 orn(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
630 bic(Register rd, Register rn, const ShifterOperand& so, Condition cond, SetCc set_cc) argument
642 mul(Register rd, Register rn, Register rm, Condition cond) argument
667 mla(Register rd, Register rn, Register rm, Register ra, Condition cond) argument
685 mls(Register rd, Register rn, Register rm, Register ra, Condition cond) argument
703 smull(Register rd_lo, Register rd_hi, Register rn, Register rm, Condition cond) argument
721 umull(Register rd_lo, Register rd_hi, Register rn, Register rm, Condition cond) argument
739 sdiv(Register rd, Register rn, Register rm, Condition cond) argument
756 udiv(Register rd, Register rn, Register rm, Condition cond) argument
773 sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond) argument
794 ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond) argument
1175 Is32BitDataProcessing(Condition cond, Opcode opcode, SetCc set_cc, Register rn, Register rd, const ShifterOperand& so) argument
1338 Emit32BitDataProcessing(Condition cond ATTRIBUTE_UNUSED, Opcode opcode, SetCc set_cc, Register rn, Register rd, const ShifterOperand& so) argument
1425 Emit16BitDataProcessing(Condition cond, Opcode opcode, SetCc set_cc, Register rn, Register rd, const ShifterOperand& so) argument
1616 Emit16BitAddSub(Condition cond, Opcode opcode, SetCc set_cc, Register rn, Register rd, const ShifterOperand& so) argument
1776 EmitDataProcessing(Condition cond, Opcode opcode, SetCc set_cc, Register rn, Register rd, const ShifterOperand& so) argument
1837 EmitShift(Register rd, Register rn, Shift shift, Register rm, Condition cond, SetCc set_cc) argument
2302 EmitCompareAndBranch(Register rn, uint16_t prev, bool n) argument
2328 Register rn = ad.GetRegister(); local
2725 ldrex(Register rt, Register rn, uint16_t imm, Condition cond) argument
2740 ldrex(Register rt, Register rn, Condition cond) argument
2745 strex(Register rd, Register rt, Register rn, uint16_t imm, Condition cond) argument
2765 ldrexd(Register rt, Register rt2, Register rn, Condition cond) argument
2781 strex(Register rd, Register rt, Register rn, Condition cond) argument
2789 strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond) argument
3199 cbz(Register rn, Label* label) argument
3214 cbnz(Register rn, Label* label) argument
3317 Lsl(Register rd, Register rm, Register rn, Condition cond, SetCc set_cc) argument
3324 Lsr(Register rd, Register rm, Register rn, Condition cond, SetCc set_cc) argument
3331 Asr(Register rd, Register rm, Register rn, Condition cond, SetCc set_cc) argument
3338 Ror(Register rd, Register rm, Register rn, Condition cond, SetCc set_cc) argument
3492 AddConstant(Register rd, Register rn, int32_t value, Condition cond, SetCc set_cc) argument
3532 CmpConstant(Register rn, int32_t value, Condition cond) argument
[all...] |
| /art/compiler/utils/arm64/ |
| H A D | assembler_arm64.cc | 81 void Arm64Assembler::AddConstant(XRegister rd, XRegister rn, int32_t value, argument
85 ___ Add(reg_x(rd), reg_x(rn), value);
88 // rd = cond ? temp : rn
90 temps.Exclude(reg_x(rd), reg_x(rn));
92 ___ Add(temp, reg_x(rn), value);
|