/art/compiler/utils/arm64/ |
H A D | assembler_arm64.cc | 401 void Arm64Assembler::Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, argument 404 Arm64ManagedRegister base = src_base.AsArm64(); 439 void Arm64Assembler::Copy(FrameOffset /*dst*/, FrameOffset /*src_base*/, Offset /*src_offset*/,
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/art/compiler/optimizing/ |
H A D | intrinsics_arm64.cc | 1818 const Register& src_base, 1829 __ Add(src_base, src, element_size * constant + data_offset); 1831 __ Add(src_base, src, data_offset); 1832 __ Add(src_base, src_base, Operand(XRegisterFrom(src_pos), LSL, element_size_shift)); 1845 __ Add(src_end, src_base, element_size * constant); 1847 __ Add(src_end, src_base, Operand(XRegisterFrom(copy_length), LSL, element_size_shift)); 1811 GenSystemArrayCopyAddresses(vixl::MacroAssembler* masm, Primitive::Type type, const Register& src, const Location& src_pos, const Register& dst, const Location& dst_pos, const Location& copy_length, const Register& src_base, const Register& dst_base, const Register& src_end) argument
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H A D | intrinsics_x86.cc | 1181 Register src_base = locations->GetTemp(0).AsRegister<Register>(); local 1182 DCHECK_EQ(src_base, ESI); 1218 CheckPosition(assembler, srcPos, src, count, slow_path, src_base, dest_base); 1221 CheckPosition(assembler, destPos, dest, count, slow_path, src_base, dest_base); 1232 __ leal(src_base, Address(src, char_size * srcPos_const + data_offset)); 1234 __ leal(src_base, Address(src, srcPos.AsRegister<Register>(),
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H A D | intrinsics_x86_64.cc | 1053 CpuRegister src_base = locations->GetTemp(0).AsRegister<CpuRegister>(); local 1054 DCHECK_EQ(src_base.AsRegister(), RSI); 1083 CheckPosition(assembler, src_pos, src, length, slow_path, src_base, dest_base); 1086 CheckPosition(assembler, dest_pos, dest, length, slow_path, src_base, dest_base); 1104 __ leal(src_base, Address(src, char_size * src_pos_const + data_offset)); 1106 __ leal(src_base, Address(src, src_pos.AsRegister<CpuRegister>(),
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/art/compiler/utils/x86/ |
H A D | assembler_x86.cc | 2241 void X86Assembler::Copy(FrameOffset /*dst*/, ManagedRegister /*src_base*/, Offset /*src_offset*/, 2254 void X86Assembler::Copy(FrameOffset dest, FrameOffset src_base, Offset src_offset, argument 2258 movl(scratch, Address(ESP, src_base));
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/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.cc | 2993 void X86_64Assembler::Copy(FrameOffset /*dst*/, ManagedRegister /*src_base*/, Offset /*src_offset*/, 3006 void X86_64Assembler::Copy(FrameOffset dest, FrameOffset src_base, Offset src_offset, argument 3010 movq(scratch, Address(CpuRegister(RSP), src_base));
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/art/compiler/utils/mips/ |
H A D | assembler_mips.cc | 2730 void MipsAssembler::Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, argument 2734 LoadFromOffset(kLoadWord, scratch, src_base.AsMips().AsCoreRegister(), src_offset.Int32Value()); 2747 FrameOffset src_base ATTRIBUTE_UNUSED,
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/art/compiler/utils/mips64/ |
H A D | assembler_mips64.cc | 2254 void Mips64Assembler::Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, argument 2259 LoadFromOffset(kLoadWord, scratch, src_base.AsMips64().AsGpuRegister(), 2263 LoadFromOffset(kLoadDoubleword, scratch, src_base.AsMips64().AsGpuRegister(), 2289 FrameOffset src_base ATTRIBUTE_UNUSED,
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