Searched defs:trg (Results 1 - 7 of 7) sorted by relevance

/art/test/139-register-natives/
H A Dregnative.cc29 extern "C" JNIEXPORT jint JNICALL Java_Main_registerNatives(JNIEnv* env, jclass, jclass trg) { argument
30 return env->RegisterNatives(trg, gMethods, 1);
/art/runtime/arch/
H A Dstub_test.cc550 uint32_t trg[20]; local
553 trg[i] = 0;
556 Invoke3(reinterpret_cast<size_t>(&trg[4]), reinterpret_cast<size_t>(&orig[4]),
559 EXPECT_EQ(orig[0], trg[0]);
562 EXPECT_NE(orig[i], trg[i]);
566 EXPECT_EQ(orig[i], trg[i]);
570 EXPECT_NE(orig[i], trg[i]);
1670 static void set_and_check_instance(ArtField* f, mirror::Object* trg,
1675 reinterpret_cast<size_t>(trg),
1682 reinterpret_cast<size_t>(trg),
[all...]
/art/compiler/optimizing/
H A Dintrinsics_arm.cc514 Register trg = trg_loc.AsRegister<Register>(); local
515 __ ldr(trg, Address(base, offset));
523 Register trg = trg_loc.AsRegister<Register>(); local
533 __ ldr(trg, Address(base, offset));
540 __ ldr(trg, Address(base, offset));
544 __ MaybeUnpoisonHeapReference(trg);
H A Dintrinsics_mips.cc60 static void MoveFromReturnRegister(Location trg, argument
63 if (!trg.IsValid()) {
71 Register trg_reg = trg.AsRegister<Register>();
76 FRegister trg_reg = trg.AsFpuRegister<FRegister>();
1527 Register trg = locations->Out().AsRegister<Register>(); local
1530 __ Lw(trg, TMP, 0);
1532 __ Lwr(trg, TMP, 0);
1533 __ Lwl(trg, TMP, 3);
H A Dintrinsics_mips64.cc48 static void MoveFromReturnRegister(Location trg, argument
51 if (!trg.IsValid()) {
59 GpuRegister trg_reg = trg.AsRegister<GpuRegister>();
64 FpuRegister trg_reg = trg.AsFpuRegister<FpuRegister>();
946 GpuRegister trg = locations->Out().AsRegister<GpuRegister>(); local
954 __ Lw(trg, TMP, 0);
958 __ Lwu(trg, TMP, 0);
962 __ Ld(trg, TMP, 0);
H A Dintrinsics_arm64.cc69 static void MoveFromReturnRegister(Location trg, argument
72 if (!trg.IsValid()) {
80 Register trg_reg = RegisterFrom(trg, type);
84 FPRegister trg_reg = FPRegisterFrom(trg, type);
787 Register trg = RegisterFrom(trg_loc, type); local
799 codegen->LoadAcquire(invoke, trg, mem_op, /* needs_null_check */ true);
801 codegen->Load(type, trg, mem_op);
805 DCHECK(trg.IsW());
H A Dcode_generator_x86_64.cc6750 // TODO: trg as memory.
6751 void CodeGeneratorX86_64::MoveFromReturnRegister(Location trg, Primitive::Type type) { argument
6752 if (!trg.IsValid()) {
6760 if (trg.Equals(return_loc)) {
6766 parallel_move.AddMove(return_loc, trg, type, nullptr);

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